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authorH.J. Lu <hjl.tools@gmail.com>2016-04-01 13:26:57 -0700
committerH.J. Lu <hjl.tools@gmail.com>2016-08-08 09:41:54 -0700
commit1a54b86f007ff3895be391dfd11af6e6674e19a3 (patch)
treea48cd7e23671f3016529fa695e457106a547baf1
parenta002d9cdeb5746541441605c2a237392c15f1a06 (diff)
downloadgcc-hjl/pieces/move.tar.gz
Support 128-bit constant store in 64-bit STVhjl/pieces/move
We can load a 128-bit constant from memory and store it. gcc/ * config/i386/i386.c (timode_scalar_to_vector_candidate_p): Allow store from 128-bit constant. (timode_scalar_chain::convert_insn): Handle store from 128-bit constant. gcc/testsuite/ * gcc.target/i386/pieces-strcpy-1.c: New test. * gcc.target/i386/pieces-strcpy-2.c: Likewise.
-rw-r--r--gcc/config/i386/i386.c19
-rw-r--r--gcc/testsuite/gcc.target/i386/pieces-strcpy-1.c19
-rw-r--r--gcc/testsuite/gcc.target/i386/pieces-strcpy-2.c19
3 files changed, 57 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 60dc16052e0..00a15e028d8 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2877,6 +2877,12 @@ timode_scalar_to_vector_candidate_p (rtx_insn *insn)
case REG:
return true;
+ case CONST_WIDE_INT:
+ /* For store from 128-bit constant, memory must be aligned
+ or unaligned store is optimal. */
+ return (!misaligned_operand (dst, TImode)
+ || TARGET_SSE_UNALIGNED_STORE_OPTIMAL);
+
case CONST_INT:
return standard_sse_constant_p (src, TImode);
}
@@ -3868,6 +3874,19 @@ timode_scalar_chain::convert_insn (rtx_insn *insn)
PUT_MODE (src, V1TImode);
break;
+ case CONST_WIDE_INT:
+ if (NONDEBUG_INSN_P (insn))
+ {
+ /* Since there are no instructions to store 128-bit constant,
+ temporary register usage is required. */
+ rtx tmp = gen_reg_rtx (V1TImode);
+ src = gen_rtx_CONST_VECTOR (V1TImode, gen_rtvec (1, src));
+ src = validize_mem (force_const_mem (V1TImode, src));
+ emit_conversion_insns (gen_rtx_SET (dst, tmp), insn);
+ dst = tmp;
+ }
+ break;
+
case CONST_INT:
switch (standard_sse_constant_p (src, TImode))
{
diff --git a/gcc/testsuite/gcc.target/i386/pieces-strcpy-1.c b/gcc/testsuite/gcc.target/i386/pieces-strcpy-1.c
new file mode 100644
index 00000000000..dd77a2cccda
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pieces-strcpy-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */
+
+extern char *strcpy (char *, const char *);
+
+void
+foo (char *s)
+{
+ strcpy (s,
+ "1234567890abcdef123456abcdef5678123456abcdef567abcdef678"
+ "1234567");
+}
+
+/* { dg-final { scan-assembler-times "movdqa\[ \\t\]+\[^\n\]*%xmm" 4 } } */
+/* { dg-final { scan-assembler-times "movups\[ \\t\]+\[^\n\]*%xmm" 4 } } */
+/* No need to dynamically realign the stack here. */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
+/* Nor use a frame pointer. */
+/* { dg-final { scan-assembler-not "%\[re\]bp" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-strcpy-2.c b/gcc/testsuite/gcc.target/i386/pieces-strcpy-2.c
new file mode 100644
index 00000000000..f597e5d7c95
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pieces-strcpy-2.c
@@ -0,0 +1,19 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mno-avx2 -mavx -mtune=sandybridge" } */
+
+extern char *strcpy (char *, const char *);
+
+void
+foo (char *s)
+{
+ strcpy (s,
+ "1234567890abcdef123456abcdef5678123456abcdef567abcdef678"
+ "1234567");
+}
+
+/* { dg-final { scan-assembler-times "vmovdqa\[ \\t\]+\[^\n\]*%xmm" 4 } } */
+/* { dg-final { scan-assembler-times "vmovups\[ \\t\]+\[^\n\]*%xmm" 4 } } */
+/* No need to dynamically realign the stack here. */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
+/* Nor use a frame pointer. */
+/* { dg-final { scan-assembler-not "%\[re\]bp" } } */