diff options
Diffstat (limited to 'FreeRTOS/Source/portable/IAR')
122 files changed, 1122 insertions, 223 deletions
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h b/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h index b05182b81..4e39841d2 100644 --- a/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/port.c b/FreeRTOS/Source/portable/IAR/78K0R/port.c index ea09bdb85..4fb2047e6 100644 --- a/FreeRTOS/Source/portable/IAR/78K0R/port.c +++ b/FreeRTOS/Source/portable/IAR/78K0R/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26 b/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26 index 69f958a48..305ef8914 100644 --- a/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26 +++ b/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h b/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h index 3914b5323..79efeed05 100644 --- a/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c index 700df6846..25b5fb518 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h index a82dbe755..c05026817 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s index 9a489052b..6a3e8ebc9 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h index 6c60c5bee..da2f30b80 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c b/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c index 372f8d65f..a1d9c290e 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h index adc1d5636..4ecbc9ffc 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s index 8dd55248f..cfebd3219 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h index d09373136..2b1baa590 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c index 6aa408dd3..a7833d4ea 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s index 9afd90698..8e2d0a28a 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h index b01d1bbbc..84a5de59d 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s index 3565ccf42..65360e90e 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h index 17e5a6941..badf77062 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -217,6 +217,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Critical section management.
*/
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.c b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.c index 586e1339f..39fabbf60 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.h index 77db8b6c4..747c2c6fd 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port.c b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port.c index 4ef68b78a..5dc8e4847 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s index 669b5b0b2..02df8925c 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.c b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.c index ab167ab75..7995a7f12 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.h index 6a8452b98..aa67e39d8 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.c b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.c index d46a9365a..629186130 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.h index a8c2090b3..643873468 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_port_macros.h b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_port_macros.h index 40e186479..14ed3f022 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_port_macros.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s index 5a6377a03..61eb269c0 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index 17e5a6941..b4598d526 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -228,6 +228,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Task function macros as described on the FreeRTOS.org WEB site.
*/
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c index 67fa5dd18..3b84a2128 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s index 2040a9616..2a8aaa094 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h index 70380763d..2aa2e59ad 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s index bffed0e93..639e2a8e1 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -24,7 +24,6 @@ *
* 1 tab == 4 spaces!
*/
-
/* Including FreeRTOSConfig.h here will cause build errors if the header file
contains code not understood by the assembler - for example the 'extern' keyword.
To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h index 04d1cd628..316213bfc 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -228,6 +228,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Task function macros as described on the FreeRTOS.org WEB site.
*/
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.c b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.c index 586e1339f..39fabbf60 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.h index 77db8b6c4..747c2c6fd 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port.c b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port.c index 4ef68b78a..5dc8e4847 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s index a27e5d4df..af49db1c4 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.c b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.c index ab167ab75..7995a7f12 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.h index 6a8452b98..aa67e39d8 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.c b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.c index d46a9365a..629186130 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.h index a8c2090b3..643873468 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_port_macros.h b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_port_macros.h index 40e186479..14ed3f022 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_port_macros.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s index ad5e0f86a..89ecbb7b0 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -24,7 +24,6 @@ *
* 1 tab == 4 spaces!
*/
-
/* Including FreeRTOSConfig.h here will cause build errors if the header file
contains code not understood by the assembler - for example the 'extern' keyword.
To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index 04d1cd628..316213bfc 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -228,6 +228,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Task function macros as described on the FreeRTOS.org WEB site.
*/
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c index 89d5691b6..f7aa99fc9 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s index df7e614a5..d01793ece 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h index b2fea955b..43c1aab12 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/port.c index c5380285d..6b4dd0a78 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -506,6 +506,7 @@ __weak void vPortSetupTimerInterrupt( void ) static void prvSetupMPU( void )
{
+extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[];
extern uint32_t __FLASH_segment_start__[];
extern uint32_t __FLASH_segment_end__[];
@@ -515,7 +516,7 @@ extern uint32_t __privileged_data_end__[]; /* Check the expected MPU is present. */
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
{
- /* First setup the entire flash for unprivileged read only access. */
+ /* First setup the unprivileged flash for unprivileged read only access. */
portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portUNPRIVILEGED_FLASH_REGION );
@@ -525,16 +526,15 @@ extern uint32_t __privileged_data_end__[]; ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
- /* Setup the first 16K for privileged only access (even though less
- * than 10K is actually being used). This is where the kernel code is
- * placed. */
- portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
+ /* Setup the privileged flash for privileged only access. This is where
+ * the kernel code is placed. */
+ portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portPRIVILEGED_FLASH_REGION );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
- ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
+ ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the privileged data RAM region. This is where the kernel data
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s index 000fb6d6d..c8bca8891 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portmacro.h index 4df3372c8..db6d48e0c 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F_MPU/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c index 30d9f7064..82a294c79 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s index 410e6df4d..599176022 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h index 14d46cc12..3c5806cbe 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c index 3328fdabb..e84773bcc 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c +++ b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s index 120c1d306..49bbca263 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s +++ b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h index d8ee4596c..99fc18dbf 100644 --- a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ATMega323/port.c b/FreeRTOS/Source/portable/IAR/ATMega323/port.c index 2a7dc18d6..bc9ce9f3e 100644 --- a/FreeRTOS/Source/portable/IAR/ATMega323/port.c +++ b/FreeRTOS/Source/portable/IAR/ATMega323/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h index c4a526e50..4b7f1253f 100644 --- a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90 b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90 index 8d34de973..a43b83cd2 100644 --- a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90 +++ b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c b/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c index 683413814..4b718884e 100644 --- a/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c +++ b/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c @@ -13,7 +13,7 @@ *****************************************************************************/
/*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h b/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h index d93c6af45..ef7d1df8c 100644 --- a/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h @@ -13,7 +13,7 @@ *****************************************************************************/
/*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h index cb259739b..360fff6d5 100644 --- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c index 1e6bdb640..1dbf34c9c 100644 --- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c +++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 index d54dc60c5..beee2b543 100644 --- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h index f8a350997..86cb21142 100644 --- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c index da9447733..b65a07c0c 100644 --- a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c +++ b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h index e62170fc6..a721c9f1c 100644 --- a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h b/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h index cb259739b..360fff6d5 100644 --- a/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/port.c b/FreeRTOS/Source/portable/IAR/LPC2000/port.c index 0dee06690..1385ec0d4 100644 --- a/FreeRTOS/Source/portable/IAR/LPC2000/port.c +++ b/FreeRTOS/Source/portable/IAR/LPC2000/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79 b/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79 index be27d041d..1967218aa 100644 --- a/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79 +++ b/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h b/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h index 9261b873b..cb275c7d8 100644 --- a/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/port.c b/FreeRTOS/Source/portable/IAR/MSP430/port.c index 84de5e844..1a03448b3 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430/port.c +++ b/FreeRTOS/Source/portable/IAR/MSP430/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/portasm.h b/FreeRTOS/Source/portable/IAR/MSP430/portasm.h index eaeb0090e..d95e0ae70 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430/portasm.h +++ b/FreeRTOS/Source/portable/IAR/MSP430/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 b/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 index 8585b9d98..48673467a 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 +++ b/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h b/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h index c0a815636..c3a50aa8a 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h b/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h index b9ee5bdaa..36935cb0f 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h +++ b/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/port.c b/FreeRTOS/Source/portable/IAR/MSP430X/port.c index 90eeb70b6..fb460d089 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430X/port.c +++ b/FreeRTOS/Source/portable/IAR/MSP430X/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 b/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 index 57fe37037..09333cbfc 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 +++ b/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h b/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h index 423a4013c..cf0aace8b 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index 3445be151..2296be895 100644 --- a/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/port.c b/FreeRTOS/Source/portable/IAR/RISC-V/port.c index f100b5e8d..bf8eca07e 100644 --- a/FreeRTOS/Source/portable/IAR/RISC-V/port.c +++ b/FreeRTOS/Source/portable/IAR/RISC-V/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s b/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s index cfc3a63bd..050e63bc6 100644 --- a/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s +++ b/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -320,11 +320,6 @@ xPortStartFirstTask: portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
- load_x t0, 29 * portWORD_SIZE( sp ) /* mstatus */
- addi t0, t0, 0x08 /* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
- csrrw x0, CSR_MSTATUS, t0 /* Interrupts enabled from here! */
-
- load_x x5, 2 * portWORD_SIZE( sp ) /* t0 */
load_x x6, 3 * portWORD_SIZE( sp ) /* t1 */
load_x x7, 4 * portWORD_SIZE( sp ) /* t2 */
load_x x8, 5 * portWORD_SIZE( sp ) /* s0/fp */
@@ -351,6 +346,11 @@ xPortStartFirstTask: load_x x29, 26 * portWORD_SIZE( sp ) /* t4 */
load_x x30, 27 * portWORD_SIZE( sp ) /* t5 */
load_x x31, 28 * portWORD_SIZE( sp ) /* t6 */
+
+ load_x x5, 29 * portWORD_SIZE( sp ) /* Initial mstatus into x5 (t0) */
+ addi x5, x5, 0x08 /* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
+ csrrw x0, CSR_MSTATUS, x5 /* Interrupts enabled from here! */
+ load_x x5, 2 * portWORD_SIZE( sp ) /* Initial x5 (t0) value. */
addi sp, sp, portCONTEXT_SIZE
ret
@@ -421,6 +421,7 @@ xPortStartFirstTask: pxPortInitialiseStack:
csrr t0, CSR_MSTATUS /* Obtain current mstatus value. */
+ andi t0, t0, ~0x8 /* Ensure interrupts are disabled when the stack is restored within an ISR. Required when a task is created after the schedulre has been started, otherwise interrupts would be disabled anyway. */
addi t1, x0, 0x188 /* Generate the value 0x1880, which are the MPIE and MPP bits to set in mstatus. */
slli t1, t1, 4
or t0, t0, t1 /* Set MPIE and MPP bits in mstatus value. */
diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h b/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h index 5ab4629b3..4d31f4f77 100644 --- a/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h b/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h index 4e73aa99b..1be2a7b3f 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RL78/port.c b/FreeRTOS/Source/portable/IAR/RL78/port.c index 60906171d..3dbe43e61 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/port.c +++ b/FreeRTOS/Source/portable/IAR/RL78/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 index 2ab0844c1..0913fa482 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 +++ b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RL78/portmacro.h b/FreeRTOS/Source/portable/IAR/RL78/portmacro.h index 1ab3fadc4..c6aa995bd 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/RL78/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RX100/port.c b/FreeRTOS/Source/portable/IAR/RX100/port.c index de76a4863..083e740f3 100644 --- a/FreeRTOS/Source/portable/IAR/RX100/port.c +++ b/FreeRTOS/Source/portable/IAR/RX100/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RX100/port_asm.s b/FreeRTOS/Source/portable/IAR/RX100/port_asm.s index 7c8b519fb..d6de5b7f5 100644 --- a/FreeRTOS/Source/portable/IAR/RX100/port_asm.s +++ b/FreeRTOS/Source/portable/IAR/RX100/port_asm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RX100/portmacro.h b/FreeRTOS/Source/portable/IAR/RX100/portmacro.h index 6a24c47fb..8e288e8d0 100644 --- a/FreeRTOS/Source/portable/IAR/RX100/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/RX100/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RX600/port.c b/FreeRTOS/Source/portable/IAR/RX600/port.c index 14f53919d..45a7174fd 100644 --- a/FreeRTOS/Source/portable/IAR/RX600/port.c +++ b/FreeRTOS/Source/portable/IAR/RX600/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RX600/port_asm.s b/FreeRTOS/Source/portable/IAR/RX600/port_asm.s index 5734f7f77..073215b91 100644 --- a/FreeRTOS/Source/portable/IAR/RX600/port_asm.s +++ b/FreeRTOS/Source/portable/IAR/RX600/port_asm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RX600/portmacro.h b/FreeRTOS/Source/portable/IAR/RX600/portmacro.h index 1ffcd733f..66963c975 100644 --- a/FreeRTOS/Source/portable/IAR/RX600/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/RX600/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RXv2/port.c b/FreeRTOS/Source/portable/IAR/RXv2/port.c index 7bd4994b0..4024645ac 100644 --- a/FreeRTOS/Source/portable/IAR/RXv2/port.c +++ b/FreeRTOS/Source/portable/IAR/RXv2/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s b/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s index dcc624e6a..3b0d4be8f 100644 --- a/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s +++ b/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h b/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h index 9d4649795..dd9763b92 100644 --- a/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h b/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h index cb259739b..360fff6d5 100644 --- a/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/port.c b/FreeRTOS/Source/portable/IAR/STR71x/port.c index 8945cb307..a2856432a 100644 --- a/FreeRTOS/Source/portable/IAR/STR71x/port.c +++ b/FreeRTOS/Source/portable/IAR/STR71x/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79 b/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79 index 184ab43ad..e67859c7f 100644 --- a/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79 +++ b/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h b/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h index 347320be0..ca2e3bac9 100644 --- a/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h b/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h index cb259739b..360fff6d5 100644 --- a/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/port.c b/FreeRTOS/Source/portable/IAR/STR75x/port.c index 39cbdc959..20b4a3525 100644 --- a/FreeRTOS/Source/portable/IAR/STR75x/port.c +++ b/FreeRTOS/Source/portable/IAR/STR75x/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79 b/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79 index fb6d0f36a..935660059 100644 --- a/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79 +++ b/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h b/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h index fa991da63..f9a8a1e9a 100644 --- a/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h b/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h index 6b2e7db8f..c4a12a2a1 100644 --- a/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/port.c b/FreeRTOS/Source/portable/IAR/STR91x/port.c index 45d3d1948..7d4ad1d9c 100644 --- a/FreeRTOS/Source/portable/IAR/STR91x/port.c +++ b/FreeRTOS/Source/portable/IAR/STR91x/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79 b/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79 index 74582a667..4232c62cd 100644 --- a/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79 +++ b/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79 @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h b/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h index d55378df8..3f800ba76 100644 --- a/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h b/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h index eff83e419..d3822fbf5 100644 --- a/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h +++ b/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/port.c b/FreeRTOS/Source/portable/IAR/V850ES/port.c index d4c123141..82a36fd1e 100644 --- a/FreeRTOS/Source/portable/IAR/V850ES/port.c +++ b/FreeRTOS/Source/portable/IAR/V850ES/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85 b/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85 index 7512da089..f02882473 100644 --- a/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85 +++ b/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85 b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85 index 4bb2cef18..e0f8e8205 100644 --- a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85 +++ b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85 b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85 index 5436afe89..81bd08d17 100644 --- a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85 +++ b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85 @@ -1,5 +1,5 @@ ;/*
-; * FreeRTOS Kernel V10.3.0
+; * FreeRTOS Kernel V10.3.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h b/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h index 8a9d9d096..0b661e82a 100644 --- a/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|