diff options
Diffstat (limited to 'FreeRTOS/Source/portable/GCC')
130 files changed, 1145 insertions, 236 deletions
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c index 37c09a6bb..804134a06 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c index 9041fe3fd..11c46d02e 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h index 4d20e2877..f9b529fb7 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c index 55d5e1b42..f4d17b9b6 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c index a2613939c..1445b4b0c 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h index 67c105780..72df6702c 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c index 800498a27..266333f5a 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c index 40b61689e..080dc1330 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h index 7d0d0efd1..485939376 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c index b2b70ec52..d2bf4f4ca 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c index ad2e4485c..49f5e0b45 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h index 99a1e3f74..b15157f0f 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c index c29aa1ed6..1d26e8610 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S index f26ad9d4f..92b2bff4d 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S +++ b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h index c16449976..47c924844 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c index 92cb2df91..a968c1ef8 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S index a7aba3e6b..d55c5f335 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S +++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -24,7 +24,7 @@ *
* 1 tab == 4 spaces!
*/
-
+ .eabi_attribute Tag_ABI_align_preserved, 1
.text
.arm
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h index 85fca6838..c6d35d8c1 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c index f5aed42ec..2b32b2002 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h index 63fa8a56c..2e59a83dc 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -73,6 +73,7 @@ typedef unsigned long UBaseType_t; #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
+#define portDONT_DISCARD __attribute__(( used ))
/*-----------------------------------------------------------*/
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c index 97ce87f94..1c649a182 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h index ace80ee88..2e8bba256 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -228,6 +228,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Task function macros as described on the FreeRTOS.org WEB site.
*/
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.c index 586e1339f..39fabbf60 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.h index 77db8b6c4..747c2c6fd 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context_port.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context_port.c index 71db598ae..616cfd78e 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context_port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_context_port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.c index ab167ab75..7995a7f12 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.h index 6a8452b98..aa67e39d8 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_heap.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.c b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.c index d46a9365a..629186130 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.h index a8c2090b3..643873468 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_init.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_port_macros.h b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_port_macros.h index 40e186479..14ed3f022 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_port_macros.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c index e05e5942d..a34ef5185 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index ace80ee88..2e8bba256 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -228,6 +228,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Task function macros as described on the FreeRTOS.org WEB site.
*/
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c index 505c67cb6..535926067 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h index df322022a..673d93757 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -73,6 +73,7 @@ typedef unsigned long UBaseType_t; #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
+#define portDONT_DISCARD __attribute__(( used ))
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c index ea216bde5..443dc184e 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h index 0280956f9..64fea84e2 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -228,6 +228,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Task function macros as described on the FreeRTOS.org WEB site.
*/
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.c index 586e1339f..39fabbf60 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.h index 77db8b6c4..747c2c6fd 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context_port.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context_port.c index 8d9c8c6c6..6b4bc50c7 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context_port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_context_port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.c index ab167ab75..7995a7f12 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.h index 6a8452b98..aa67e39d8 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_heap.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.c b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.c index d46a9365a..629186130 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.h index a8c2090b3..643873468 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_init.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_port_macros.h b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_port_macros.h index 40e186479..14ed3f022 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_port_macros.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33/secure/secure_port_macros.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 108eb52dc..ba6bd2602 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -71,25 +71,32 @@ /**
* @brief Constants required to manipulate the NVIC.
*/
-#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE ( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
-#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK ( 0x00000004 )
-#define portNVIC_SYSTICK_INT ( 0x00000002 )
-#define portNVIC_SYSTICK_ENABLE ( 0x00000001 )
-#define portNVIC_PENDSVSET ( 0x10000000 )
+#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
+#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portMIN_INTERRUPT_PRIORITY ( 255UL )
#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
+#ifndef configSYSTICK_CLOCK_HZ
+ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
+ /* Ensure the SysTick is clocked at the same frequency as the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
+#else
+ /* The way the SysTick is clocked is not modified in case it is not the
+ * same a the core. */
+ #define portNVIC_SYSTICK_CLK_BIT ( 0 )
+#endif
/*-----------------------------------------------------------*/
/**
* @brief Constants required to manipulate the SCB.
*/
#define portSCB_SYS_HANDLER_CTRL_STATE_REG ( * ( volatile uint32_t * ) 0xe000ed24 )
-#define portSCB_MEM_FAULT_ENABLE ( 1UL << 16UL )
+#define portSCB_MEM_FAULT_ENABLE_BIT ( 1UL << 16UL )
/*-----------------------------------------------------------*/
/**
@@ -169,16 +176,31 @@ #define portMPU_RLAR_REGION_ENABLE ( 1UL )
/* Enable privileged access to unmapped region. */
-#define portMPU_PRIV_BACKGROUND_ENABLE ( 1UL << 2UL )
+#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
/* Enable MPU. */
-#define portMPU_ENABLE ( 1UL << 0UL )
+#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
/*-----------------------------------------------------------*/
/**
+ * @brief The maximum 24-bit number.
+ *
+ * It is needed because the systick is a 24-bit counter.
+ */
+#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
+
+/**
+ * @brief A fiddle factor to estimate the number of SysTick counts that would
+ * have occurred while the SysTick counter is stopped during tickless idle
+ * calculations.
+ */
+#define portMISSED_COUNTS_FACTOR ( 45UL )
+/*-----------------------------------------------------------*/
+
+/**
* @brief Constants required to set up the initial stack.
*/
#define portINITIAL_XPSR ( 0x01000000 )
@@ -332,17 +354,211 @@ static volatile uint32_t ulCriticalNesting = 0xaaaaaaaaUL; */
portDONT_DISCARD volatile SecureContextHandle_t xSecureContext = portNO_SECURE_CONTEXT;
#endif /* configENABLE_TRUSTZONE */
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ /**
+ * @brief The number of SysTick increments that make up one tick period.
+ */
+ static uint32_t ulTimerCountsForOneTick = 0;
+
+ /**
+ * @brief The maximum number of tick periods that can be suppressed is
+ * limited by the 24 bit resolution of the SysTick timer.
+ */
+ static uint32_t xMaximumPossibleSuppressedTicks = 0;
+
+ /**
+ * @brief Compensate for the CPU cycles that pass while the SysTick is
+ * stopped (low power functionality only).
+ */
+ static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE == 1 )
+ __attribute__(( weak )) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+ {
+ uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+ TickType_t xModifiableIdleTime;
+
+ /* Make sure the SysTick reload value does not overflow the counter. */
+ if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+ {
+ xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+ }
+
+ /* Stop the SysTick momentarily. The time the SysTick is stopped for is
+ * accounted for as best it can be, but using the tickless mode will
+ * inevitably result in some tiny drift of the time maintained by the
+ * kernel with respect to calendar time. */
+ portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime
+ * tick periods. -1 is used because this code will execute part way
+ * through one of the tick periods. */
+ ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL()
+ * method as that will mask interrupts that should exit sleep mode. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* If a context switch is pending or a task is waiting for the scheduler
+ * to be un-suspended then abandon the low power entry. */
+ if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+ {
+ /* Restart from whatever is left in the count register to complete
+ * this tick period. */
+ portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Reset the reload register to the value required for normal tick
+ * periods. */
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ * above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ else
+ {
+ /* Set the new reload value. */
+ portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+ /* Clear the SysTick count flag and set the count value back to
+ * zero. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+ /* Restart SysTick. */
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+ /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+ * set its parameter to 0 to indicate that its implementation
+ * contains its own wait for interrupt or wait for event
+ * instruction, and so wfi should not be executed again. However,
+ * the original expected idle time variable must remain unmodified,
+ * so a copy is taken. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm volatile( "dsb" ::: "memory" );
+ __asm volatile( "wfi" );
+ __asm volatile( "isb" );
+ }
+ configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+ /* Re-enable interrupts to allow the interrupt that brought the MCU
+ * out of sleep mode to execute immediately. See comments above
+ * the cpsid instruction above. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable interrupts again because the clock is about to be stopped
+ * and interrupts that execute while the clock is stopped will
+ * increase any slippage between the time maintained by the RTOS and
+ * calendar time. */
+ __asm volatile( "cpsid i" ::: "memory" );
+ __asm volatile( "dsb" );
+ __asm volatile( "isb" );
+
+ /* Disable the SysTick clock without reading the
+ * portNVIC_SYSTICK_CTRL_REG register to ensure the
+ * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.
+ * Again, the time the SysTick is stopped for is accounted for as
+ * best it can be, but using the tickless mode will inevitably
+ * result in some tiny drift of the time maintained by the kernel
+ * with respect to calendar time*/
+ portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+ /* Determine if the SysTick clock has already counted to zero and
+ * been set back to the current reload value (the reload back being
+ * correct for the entire expected idle time) or if the SysTick is
+ * yet to count to zero (in which case an interrupt other than the
+ * SysTick must have brought the system out of sleep mode). */
+ if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+ {
+ uint32_t ulCalculatedLoadValue;
+
+ /* The tick interrupt is already pending, and the SysTick count
+ * reloaded with ulReloadValue. Reset the
+ * portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
+ * period. */
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+ /* Don't allow a tiny value, or values that have somehow
+ * underflowed because the post sleep hook did something
+ * that took too long. */
+ if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+ {
+ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+ }
+
+ portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+ /* As the pending tick will be processed as soon as this
+ * function exits, the tick value maintained by the tick is
+ * stepped forward by one less than the time spent waiting. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep.
+ * Work out how long the sleep lasted rounded to complete tick
+ * periods (not the ulReload value which accounted for part
+ * ticks). */
+ ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+ /* How many complete tick periods passed while the processor
+ * was waiting? */
+ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ * period remains. */
+ portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+ }
+
+ /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
+ * again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
+ * value. */
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+ portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+ vTaskStepTick( ulCompleteTickPeriods );
+ portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+ /* Exit with interrupts enabled. */
+ __asm volatile( "cpsie i" ::: "memory" );
+ }
+ }
+#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void ) /* PRIVILEGED_FUNCTION */
{
+ /* Calculate the constants required to configure the tick interrupt. */
+ #if( configUSE_TICKLESS_IDLE == 1 )
+ {
+ ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
+ xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+ ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
+ }
+ #endif /* configUSE_TICKLESS_IDLE */
+
/* Stop and reset the SysTick. */
- *( portNVIC_SYSTICK_CTRL ) = 0UL;
- *( portNVIC_SYSTICK_CURRENT_VALUE ) = 0UL;
+ portNVIC_SYSTICK_CTRL_REG = 0UL;
+ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
- *( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
- *( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+ portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
@@ -446,11 +662,11 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_REGION_ENABLE );
/* Enable mem fault. */
- portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;
+ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE_BIT;
/* Enable MPU with privileged background access i.e. unmapped
* regions have privileged access. */
- portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );
+ portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT );
}
}
#endif /* configENABLE_MPU */
@@ -484,7 +700,7 @@ volatile uint32_t ulDummy = 0UL; void vPortYield( void ) /* PRIVILEGED_FUNCTION */
{
/* Set a PendSV to request a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
/* Barriers are normally not required but do ensure the code is
* completely within the specified behaviour for the architecture. */
@@ -527,7 +743,7 @@ uint32_t ulPreviousMask; if( xTaskIncrementTick() != pdFALSE )
{
/* Pend a context switch. */
- *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -772,8 +988,8 @@ uint8_t ucSVCNumber; BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
{
/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
- *( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
- *( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+ portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
#if( configENABLE_MPU == 1 )
{
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c index 2a9f21483..1e3a4fc43 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h index cc2562f27..71d711c69 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index 9a7ed8b42..d2c849c77 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -228,6 +228,15 @@ typedef struct MPU_SETTINGS /*-----------------------------------------------------------*/
/**
+ * @brief Tickless idle/low power functionality.
+ */
+#ifndef portSUPPRESS_TICKS_AND_SLEEP
+ extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
+ #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
+#endif
+/*-----------------------------------------------------------*/
+
+/**
* @brief Task function macros as described on the FreeRTOS.org WEB site.
*/
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c index 6917addca..5693a2ff7 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -584,6 +584,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) static void prvSetupMPU( void )
{
+extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[];
extern uint32_t __FLASH_segment_start__[];
extern uint32_t __FLASH_segment_end__[];
@@ -593,7 +594,7 @@ extern uint32_t __privileged_data_end__[]; /* Check the expected MPU is present. */
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
{
- /* First setup the entire flash for unprivileged read only access. */
+ /* First setup the unprivileged flash for unprivileged read only access. */
portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portUNPRIVILEGED_FLASH_REGION );
@@ -603,16 +604,15 @@ extern uint32_t __privileged_data_end__[]; ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
- /* Setup the first 16K for privileged only access (even though less
- * than 10K is actually being used). This is where the kernel code is
- * placed. */
- portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
+ /* Setup the privileged flash for privileged only access. This is where
+ * the kernel code is * placed. */
+ portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portPRIVILEGED_FLASH_REGION );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
- ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
+ ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the privileged data RAM region. This is where the kernel data
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h index 1b6c9b002..61da7413a 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -109,6 +109,7 @@ typedef struct MPU_SETTINGS #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
+#define portDONT_DISCARD __attribute__(( used ))
/*-----------------------------------------------------------*/
/* SVC numbers for various services. */
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c index eca9a3c33..9e1d1a891 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h index 2a5ca140f..b94366dfd 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -73,6 +73,7 @@ typedef unsigned long UBaseType_t; #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
+#define portDONT_DISCARD __attribute__(( used ))
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c index 4b7492b33..5f9697cea 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -640,6 +640,7 @@ static void prvSetupMPU( void ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */
+ extern uint32_t * __privileged_functions_start__;
extern uint32_t * __privileged_functions_end__;
extern uint32_t * __FLASH_segment_start__;
extern uint32_t * __FLASH_segment_end__;
@@ -647,6 +648,7 @@ static void prvSetupMPU( void ) extern uint32_t * __privileged_data_end__;
#else
/* Declaration when these variable are exported from linker scripts. */
+ extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[];
extern uint32_t __FLASH_segment_start__[];
extern uint32_t __FLASH_segment_end__[];
@@ -656,7 +658,7 @@ static void prvSetupMPU( void ) /* Check the expected MPU is present. */
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
{
- /* First setup the entire flash for unprivileged read only access. */
+ /* First setup the unprivileged flash for unprivileged read only access. */
portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portUNPRIVILEGED_FLASH_REGION );
@@ -666,16 +668,15 @@ static void prvSetupMPU( void ) ( prvGetMPURegionSizeSetting( ( uint32_t ) __FLASH_segment_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
- /* Setup the first nK for privileged only access (even though less
- than 10K is actually being used). This is where the kernel code is
- placed. */
- portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
+ /* Setup the privileged flash for privileged only access. This is where
+ the kernel code is placed. */
+ portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portPRIVILEGED_FLASH_REGION );
portMPU_REGION_ATTRIBUTE_REG = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
- ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __FLASH_segment_start__ ) ) |
+ ( prvGetMPURegionSizeSetting( ( uint32_t ) __privileged_functions_end__ - ( uint32_t ) __privileged_functions_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the privileged data RAM region. This is where the kernel data
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h index 1b6c9b002..61da7413a 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -109,6 +109,7 @@ typedef struct MPU_SETTINGS #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
+#define portDONT_DISCARD __attribute__(( used ))
/*-----------------------------------------------------------*/
/* SVC numbers for various services. */
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c index 0d08f234d..e13edf94d 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h index d73c5e352..124e8073a 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -73,6 +73,7 @@ typedef unsigned long UBaseType_t; #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
+#define portDONT_DISCARD __attribute__(( used ))
/*-----------------------------------------------------------*/
/* Scheduler utilities. */
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c b/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c index 40805e7a2..6823f94d7 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S index c3dbb9cbe..54edeb97f 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S +++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h index 3d30a5170..3f48ff609 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c index ef457bace..3e791c50f 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S index 07fe3bd1d..8ec55772e 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S +++ b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h index 442187420..e02c74fcb 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ATMega323/port.c b/FreeRTOS/Source/portable/GCC/ATMega323/port.c index e8a4aaa49..31e28b611 100644 --- a/FreeRTOS/Source/portable/GCC/ATMega323/port.c +++ b/FreeRTOS/Source/portable/GCC/ATMega323/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h b/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h index 9d319c01c..f43e78e96 100644 --- a/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c b/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c index 71eea04d0..2f5592a02 100644 --- a/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c +++ b/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c @@ -13,7 +13,7 @@ *****************************************************************************/
/*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h b/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h index 08b25914e..c4de32bcb 100644 --- a/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h @@ -13,7 +13,7 @@ *****************************************************************************/
/*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c index 4d7eec754..b6c55a372 100644 --- a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c +++ b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h index b596eb8d5..dbbe3a680 100644 --- a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c b/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c index ba37c5aae..3d7e52980 100644 --- a/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c +++ b/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S index d39ec73d4..e6067ca1e 100644 --- a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S +++ b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h index 3a32a4c4a..ad46a61fe 100644 --- a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/H8S2329/port.c b/FreeRTOS/Source/portable/GCC/H8S2329/port.c index 0493974a2..6f49b1416 100644 --- a/FreeRTOS/Source/portable/GCC/H8S2329/port.c +++ b/FreeRTOS/Source/portable/GCC/H8S2329/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h b/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h index 4a1dc577d..48fdc2c37 100644 --- a/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/HCS12/port.c b/FreeRTOS/Source/portable/GCC/HCS12/port.c index 5394eedc1..55d940258 100644 --- a/FreeRTOS/Source/portable/GCC/HCS12/port.c +++ b/FreeRTOS/Source/portable/GCC/HCS12/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h b/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h index bb373620d..d7ccb89d1 100644 --- a/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h b/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h index 610df3458..0222f4904 100644 --- a/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h +++ b/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/port.c b/FreeRTOS/Source/portable/GCC/IA32_flat/port.c index fe8ed90b2..1a20c8ea9 100644 --- a/FreeRTOS/Source/portable/GCC/IA32_flat/port.c +++ b/FreeRTOS/Source/portable/GCC/IA32_flat/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S b/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S index 031bc8696..2759d8428 100644 --- a/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S +++ b/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h b/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h index c7002b6f9..012207f90 100644 --- a/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MSP430F449/port.c b/FreeRTOS/Source/portable/GCC/MSP430F449/port.c index c6358ded8..59b8fb605 100644 --- a/FreeRTOS/Source/portable/GCC/MSP430F449/port.c +++ b/FreeRTOS/Source/portable/GCC/MSP430F449/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h b/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h index 6fc4da985..8dda84415 100644 --- a/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c b/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c index 2d6c61843..a0192b3a2 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c +++ b/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s b/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s index f6f7e3fa0..529dbb25b 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s +++ b/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h b/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h index 74782499e..948902057 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c index 1d0e4289a..bd70f2a80 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c index 08474a959..ca2a1acf6 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S index 99f5c9cf3..50e44e83f 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h index 14c400c25..19b528868 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c index 821421c6a..943615d06 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c index 08474a959..ca2a1acf6 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S index 99f5c9cf3..50e44e83f 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h index 14c400c25..19b528868 100644 --- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/NiosII/port.c b/FreeRTOS/Source/portable/GCC/NiosII/port.c index 4bb0f1249..57b53378d 100644 --- a/FreeRTOS/Source/portable/GCC/NiosII/port.c +++ b/FreeRTOS/Source/portable/GCC/NiosII/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S b/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S index 467dd25e1..265ffc110 100644 --- a/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S +++ b/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h b/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h index 368a043cf..3695fef19 100644 --- a/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h index ce0ea5afd..dd8ddee42 100644 --- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h +++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c index 3e3788d98..286e9377c 100644 --- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c +++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S index 36fc33203..7e5e09d28 100644 --- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S +++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h index b0b5e17f6..0a53e7100 100644 --- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h index ce0ea5afd..dd8ddee42 100644 --- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h +++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c index 404b72d67..2b104a5d4 100644 --- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c +++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S index 36fc33203..7e5e09d28 100644 --- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S +++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h index b0b5e17f6..0a53e7100 100644 --- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h index 901581199..8cd6cdb21 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h +++ b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h index e4c9b6050..be1908a2e 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h +++ b/FreeRTOS/Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/port.c b/FreeRTOS/Source/portable/GCC/RISC-V/port.c index 0b8a286e4..9525ff6d6 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/port.c +++ b/FreeRTOS/Source/portable/GCC/RISC-V/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S b/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S index fb9825bd6..f758674b8 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S +++ b/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -313,11 +313,6 @@ xPortStartFirstTask: portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
- load_x t0, 29 * portWORD_SIZE( sp ) /* mstatus */
- addi t0, t0, 0x08 /* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
- csrrw x0, mstatus, t0 /* Interrupts enabled from here! */
-
- load_x x5, 2 * portWORD_SIZE( sp ) /* t0 */
load_x x6, 3 * portWORD_SIZE( sp ) /* t1 */
load_x x7, 4 * portWORD_SIZE( sp ) /* t2 */
load_x x8, 5 * portWORD_SIZE( sp ) /* s0/fp */
@@ -344,6 +339,12 @@ xPortStartFirstTask: load_x x29, 26 * portWORD_SIZE( sp ) /* t4 */
load_x x30, 27 * portWORD_SIZE( sp ) /* t5 */
load_x x31, 28 * portWORD_SIZE( sp ) /* t6 */
+
+ load_x x5, 29 * portWORD_SIZE( sp ) /* Initial mstatus into x5 (t0) */
+ addi x5, x5, 0x08 /* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
+ csrrw x0, mstatus, x5 /* Interrupts enabled from here! */
+ load_x x5, 2 * portWORD_SIZE( sp ) /* Initial x5 (t0) value. */
+
addi sp, sp, portCONTEXT_SIZE
ret
.endfunc
@@ -416,6 +417,7 @@ xPortStartFirstTask: pxPortInitialiseStack:
csrr t0, mstatus /* Obtain current mstatus value. */
+ andi t0, t0, ~0x8 /* Ensure interrupts are disabled when the stack is restored within an ISR. Required when a task is created after the schedulre has been started, otherwise interrupts would be disabled anyway. */
addi t1, x0, 0x188 /* Generate the value 0x1880, which are the MPIE and MPP bits to set in mstatus. */
slli t1, t1, 4
or t0, t0, t1 /* Set MPIE and MPP bits in mstatus value. */
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h index b4f348171..0ec849618 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RL78/isr_support.h b/FreeRTOS/Source/portable/GCC/RL78/isr_support.h index 39be6c9a9..3687fdc70 100644 --- a/FreeRTOS/Source/portable/GCC/RL78/isr_support.h +++ b/FreeRTOS/Source/portable/GCC/RL78/isr_support.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RL78/port.c b/FreeRTOS/Source/portable/GCC/RL78/port.c index f501be40d..dc1fc5698 100644 --- a/FreeRTOS/Source/portable/GCC/RL78/port.c +++ b/FreeRTOS/Source/portable/GCC/RL78/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RL78/portasm.S b/FreeRTOS/Source/portable/GCC/RL78/portasm.S index 0f4d9e91a..75bc5aa62 100644 --- a/FreeRTOS/Source/portable/GCC/RL78/portasm.S +++ b/FreeRTOS/Source/portable/GCC/RL78/portasm.S @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RL78/portmacro.h b/FreeRTOS/Source/portable/GCC/RL78/portmacro.h index 9043129e2..da2ce5343 100644 --- a/FreeRTOS/Source/portable/GCC/RL78/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/RL78/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RX100/port.c b/FreeRTOS/Source/portable/GCC/RX100/port.c index d5d218747..a77efbccc 100644 --- a/FreeRTOS/Source/portable/GCC/RX100/port.c +++ b/FreeRTOS/Source/portable/GCC/RX100/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RX100/portmacro.h b/FreeRTOS/Source/portable/GCC/RX100/portmacro.h index ae1af6264..77e91a19c 100644 --- a/FreeRTOS/Source/portable/GCC/RX100/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/RX100/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RX600/port.c b/FreeRTOS/Source/portable/GCC/RX600/port.c index 4d81f288e..422b6c751 100644 --- a/FreeRTOS/Source/portable/GCC/RX600/port.c +++ b/FreeRTOS/Source/portable/GCC/RX600/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RX600/portmacro.h b/FreeRTOS/Source/portable/GCC/RX600/portmacro.h index f03e8ad78..c6cb8417f 100644 --- a/FreeRTOS/Source/portable/GCC/RX600/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/RX600/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RX600v2/port.c b/FreeRTOS/Source/portable/GCC/RX600v2/port.c index d15c39376..3480c181b 100644 --- a/FreeRTOS/Source/portable/GCC/RX600v2/port.c +++ b/FreeRTOS/Source/portable/GCC/RX600v2/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h b/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h index f03e8ad78..c6cb8417f 100644 --- a/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/STR75x/port.c b/FreeRTOS/Source/portable/GCC/STR75x/port.c index 86d4deb1e..dc27a140f 100644 --- a/FreeRTOS/Source/portable/GCC/STR75x/port.c +++ b/FreeRTOS/Source/portable/GCC/STR75x/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/STR75x/portISR.c b/FreeRTOS/Source/portable/GCC/STR75x/portISR.c index 9c6b4e99d..5d29df885 100644 --- a/FreeRTOS/Source/portable/GCC/STR75x/portISR.c +++ b/FreeRTOS/Source/portable/GCC/STR75x/portISR.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h b/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h index b03bed1c3..2bd6d4315 100644 --- a/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c b/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c index 26eb6902e..c43cfa4ad 100644 --- a/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c +++ b/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h b/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h index df0ada57a..2e2a483e5 100644 --- a/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
diff --git a/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c b/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c index 736f5e62a..039321b18 100644 --- a/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c +++ b/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c @@ -1,5 +1,5 @@ /*
- * FreeRTOS Kernel V10.3.0
+ * FreeRTOS Kernel V10.3.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
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