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authorflorian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2>2015-02-21 21:58:30 +0000
committerflorian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2>2015-02-21 21:58:30 +0000
commitb1b8e88f4fe6cc8b818c10d4edc9f18a3e084db9 (patch)
treeef1cc4dadb140db0189ff37546a0b56d21df2233 /rtl/arm
parentb81ec1788cbb0172d492014f1ae5cd686b2ad158 (diff)
downloadfpc-b1b8e88f4fe6cc8b818c10d4edc9f18a3e084db9.tar.gz
* always pass the architecture to the arm assembler
* encode pld/ldrd in arm.inc using .long, so it causes no errors with older architectures settings of the assembler git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@29780 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'rtl/arm')
-rw-r--r--rtl/arm/arm.inc27
1 files changed, 20 insertions, 7 deletions
diff --git a/rtl/arm/arm.inc b/rtl/arm/arm.inc
index 61051abb50..bdc65e47e1 100644
--- a/rtl/arm/arm.inc
+++ b/rtl/arm/arm.inc
@@ -217,7 +217,10 @@ procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];
procedure Move_pld(const source;var dest;count:longint);assembler;nostackframe;
{$endif CPUARM_HAS_EDSP}
asm
- pld [r0]
+ // pld [r0]
+ // encode this using .long so the rtl assembles also with instructions sets not supporting pld
+ .long 0xf5d0f000
+
// count <=0 ?
cmp r2,#0
{$ifdef CPUARM_HAS_BX}
@@ -237,11 +240,18 @@ asm
tsteq r1, #3 // (dest and 3) <> 0 then
bne .Lbyteloop // DoForwardByteCopy;
- pld [r0,#32]
+ // pld [r0,#32]
+ // encode this using .long so the rtl assembles also with instructions sets not supporting pld
+ .long 0xf5d0f020
+
.Ldwordloop:
ldmia r0!, {r3, ip}
+
// preload
- pld [r0,#64]
+ // pld [r0,#64]
+ // encode this using .long so the rtl assembles also with instructions sets not supporting pld
+ .long 0xf5d0f040
+
sub r2,r2,#8
cmp r2, #8
stmia r1!, {r3, ip}
@@ -526,11 +536,11 @@ asm
{$endif}
stmfd sp!, {r1, lr}
sub r0, r1, #8
-{$ifdef CPUARM_HAS_BLX}
+{$if defined(CPUARM_HAS_BX) and not(defined(WINCE))}
blx InterLockedDecrement
-{$else}
+{$else defined(CPUARM_HAS_BX) and not(defined(WINCE))}
bl InterLockedDecrement
-{$endif}
+{$endif defined(CPUARM_HAS_BX) and not(defined(WINCE))}
// InterLockedDecrement is a nice guy and sets the z flag for us
// if the reference count dropped to 0
ldmnefd sp!, {r1, pc}
@@ -962,7 +972,10 @@ begin
in_edsp_test:=true;
asm
bic r0,sp,#7
- ldrd r0,r1,[r0]
+
+ // ldrd r0,r1,[r0]
+ // encode this using .long so the rtl assembles also with instructions sets not supporting pld
+ .long 0xe1c000d0
end;
in_edsp_test:=false;
if cpu_has_edsp then