Merge from armiw branch.

Update ARM internal assembler to support most ARM, Thumb and Thumb-2 instructions.
Changed generation of VFP instructions to use UAL mnemonics.
Added divided and unified assembler syntax support to ARM assembly reader.

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@30181 3ad0048d-3df7-0310-abae-a5850022a9f2

4 files changed, 10 insertions, 12 deletions

diff --git a/rtl/arm/arm.inc b/rtl/arm/arm.inc
index bdc65e47e1..ff5af344d1 100644
--- a/rtl/arm/arm.inc
+++ b/rtl/arm/arm.inc
@@ -15,8 +15,6 @@
 
  **********************************************************************}
 
-{$asmmode gas}
-
 {$ifndef FPC_SYSTEM_HAS_MOVE}
 {$define FPC_SYSTEM_FPC_MOVE}
 {$endif FPC_SYSTEM_HAS_MOVE}
@@ -46,7 +44,7 @@ Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
 begin
   { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
   asm
-    fmrx r0,fpscr
+    vmrs r0,fpscr
     // set "round to nearest" mode
     and  r0,r0,#0xff3fffff
     // mask "exception happened" and overflow flags
@@ -61,7 +59,7 @@ begin
     // enable invalid operation, div-by-zero and overflow exceptions
     orr  r0,r0,#0x00000700
 {$endif}
-    fmxr fpscr,r0
+    vmsr fpscr,r0
   end;
 end;
 {$endif}
diff --git a/rtl/arm/mathu.inc b/rtl/arm/mathu.inc
index f41e0630c6..fc8f30c622 100644
--- a/rtl/arm/mathu.inc
+++ b/rtl/arm/mathu.inc
@@ -161,13 +161,13 @@ const
 
 function VFP_GetCW : dword; nostackframe; assembler;
   asm
-    fmrx r0,fpscr
+    vmrs r0,fpscr
   end;
 
 
 procedure VFP_SetCW(cw : dword); nostackframe; assembler;
   asm
-    fmxr fpscr,r0
+    vmsr fpscr,r0
   end;
 
 
diff --git a/rtl/arm/setjump.inc b/rtl/arm/setjump.inc
index bcd66193d1..ebd55b817b 100644
--- a/rtl/arm/setjump.inc
+++ b/rtl/arm/setjump.inc
@@ -18,12 +18,12 @@ function fpc_setjmp(var S : jmp_buf) : longint;assembler;[Public, alias : 'FPC_S
   asm
     {$if defined(FPUVFPV2) or defined(FPUVFPV3) or defined(FPUVFPV3_D16)}
     {$if defined(CPUARMV3) or defined(CPUARMV4) or defined(CPUARMV5)}
-    fstmiax r0!, {d8-d15}
+    vstmia r0!, {d8-d15}
     // according to the ARM Developer Suite Assembler Guide Version 1.2
     // fstmiad increases the address register always by 2n+1 words, so fix this
     sub r0,r0,#4
     {$else}
-    fstmiad r0!, {d8-d15}
+    vstmia r0!, {d8-d15}
     {$endif}
     {$endif}
 
@@ -70,7 +70,7 @@ procedure fpc_longjmp(var S : jmp_buf;value : longint);assembler;[Public, alias
     it eq
     moveq   r0, #1
     {$if defined(FPUVFPV2) or defined(FPUVFPV3) or defined(FPUVFPV3_D16)}
-    fldmiad ip!, {d8-d15}
+    vldmia ip!, {d8-d15}
     {$endif}
     ldmia   ip!, {v1-v6, sl, fp}
     ldr     sp, [ip]
@@ -103,12 +103,12 @@ procedure fpc_longjmp(var S : jmp_buf;value : longint);assembler;[Public, alias
     moveq   r0, #1
     {$if defined(FPUVFPV2) or defined(FPUVFPV3) or defined(FPUVFPV3_D16)}
     {$if defined(CPUARMV3) or defined(CPUARMV4) or defined(CPUARMV5)}
-    fldmiax ip!, {d8-d15}
+    vldmia ip!, {d8-d15}
     // according to the ARM Developer Suite Assembler Guide Version 1.2
     // increases fldmiax the address register always by 2n+1 words, so fix this
     sub ip,ip,#4
     {$else}
-    fldmiad ip!, {d8-d15}
+    vldmia ip!, {d8-d15}
     {$endif}
     {$endif}
     ldmia   ip,{v1-v6, sl, fp, sp, pc}
diff --git a/rtl/arm/thumb2.inc b/rtl/arm/thumb2.inc
index 921ae24345..248744d8c0 100644
--- a/rtl/arm/thumb2.inc
+++ b/rtl/arm/thumb2.inc
@@ -15,7 +15,7 @@
 
  **********************************************************************}
 
-{$asmmode gas}
+{$asmmode divided}
 
 {$ifndef FPC_SYSTEM_HAS_MOVE}
 {$define FPC_SYSTEM_FPC_MOVE}