fix various typos

Saw a couple of typos fixes in the patch DragonFlyBSD carries [1], so
I ran codespell (a spell checker for code) on the whole repo.

[1] https://github.com/DragonFlyBSD/DPorts/blob/master/graphics/libdrm/files/patch-xf86drm.c

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

5 files changed, 9 insertions, 9 deletions

diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index e3a97da4..d0701ffc 100644
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -204,9 +204,9 @@ union drm_amdgpu_bo_list {
 /* unknown cause */
 #define AMDGPU_CTX_UNKNOWN_RESET	3
 
-/* indicate gpu reset occured after ctx created */
+/* indicate gpu reset occurred after ctx created */
 #define AMDGPU_CTX_QUERY2_FLAGS_RESET    (1<<0)
-/* indicate vram lost occured after ctx created */
+/* indicate vram lost occurred after ctx created */
 #define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1)
 /* indicate some job from this context once cause gpu hang */
 #define AMDGPU_CTX_QUERY2_FLAGS_GUILTY   (1<<2)
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 3feeaa3f..5c69090d 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -381,7 +381,7 @@ extern "C" {
  * This is a tiled layout using 4Kb tiles in row-major layout.
  * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
  * are arranged in four groups (two wide, two high) with column-major layout.
- * Each group therefore consits out of four 256 byte units, which are also laid
+ * Each group therefore consists out of four 256 byte units, which are also laid
  * out as 2x2 column-major.
  * 256 byte units are made out of four 64 byte blocks of pixels, producing
  * either a square block or a 2:1 unit.
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 83cd1636..5fe6c649 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -402,7 +402,7 @@ struct drm_mode_get_connector {
 /* the PROP_ATOMIC flag is used to hide properties from userspace that
  * is not aware of atomic properties.  This is mostly to work around
  * older userspace (DDX drivers) that read/write each prop they find,
- * witout being aware that this could be triggering a lengthy modeset.
+ * without being aware that this could be triggering a lengthy modeset.
  */
 #define DRM_MODE_PROP_ATOMIC        0x80000000
 
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 2ab257c8..72afd94e 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -520,7 +520,7 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_EXEC_FENCE	 44
 
 /* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to capture
- * user specified bufffers for post-mortem debugging of GPU hangs. See
+ * user specified buffers for post-mortem debugging of GPU hangs. See
  * EXEC_OBJECT_CAPTURE.
  */
 #define I915_PARAM_HAS_EXEC_CAPTURE	 45
@@ -1220,7 +1220,7 @@ struct drm_i915_gem_caching {
 	__u32 handle;
 
 	/**
-	 * Cacheing level to apply or return value
+	 * Caching level to apply or return value
 	 *
 	 * bits0-15 are for generic caching control (i.e. the above defined
 	 * values). bits16-31 are reserved for platform-specific variations
diff --git a/include/drm/vmwgfx_drm.h b/include/drm/vmwgfx_drm.h
index 0bc784f5..2b8d47ea 100644
--- a/include/drm/vmwgfx_drm.h
+++ b/include/drm/vmwgfx_drm.h
@@ -361,7 +361,7 @@ struct drm_vmw_fence_rep {
  * Allocate a DMA buffer that is visible also to the host.
  * NOTE: The buffer is
  * identified by a handle and an offset, which are private to the guest, but
- * useable in the command stream. The guest kernel may translate these
+ * usable in the command stream. The guest kernel may translate these
  * and patch up the command stream accordingly. In the future, the offset may
  * be zero at all times, or it may disappear from the interface before it is
  * fixed.
@@ -446,7 +446,7 @@ struct drm_vmw_unref_dmabuf_arg {
  *
  * This IOCTL controls the overlay units of the svga device.
  * The SVGA overlay units does not work like regular hardware units in
- * that they do not automaticaly read back the contents of the given dma
+ * that they do not automatically read back the contents of the given dma
  * buffer. But instead only read back for each call to this ioctl, and
  * at any point between this call being made and a following call that
  * either changes the buffer or disables the stream.
@@ -1035,7 +1035,7 @@ union drm_vmw_gb_surface_reference_arg {
  * for read-only.
  * @drm_vmw_synccpu_write: Sync for write. Block all command submissions
  * referencing this buffer.
- * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
+ * @drm_vmw_synccpu_dontblock: Don't wait for GPU idle, but rather return
  * -EBUSY should the buffer be busy.
  * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
  * while the buffer is synced for CPU. This is similar to the GEM bo idle