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| author | Daniel Stone <daniels@collabora.com> | 2018-03-30 13:04:30 +0100 |
|---|---|---|
| committer | Daniel Stone <daniels@collabora.com> | 2018-03-30 16:10:03 +0100 |
| commit | 8e535dd2142433b24aebc6eddeaee04663489aa2 (patch) | |
| tree | 15d3d3fcc26b00d09cbf0e0d5db91b62ff7f682f /etnaviv | |
| parent | 2fa58c77fb9e563219f8ec647b9ddf52f3390ed2 (diff) | |
| download | drm-8e535dd2142433b24aebc6eddeaee04663489aa2.tar.gz | |
headers: Sync with drm-next
Taken from the drm-next pull for 4.17-rc1 (694f54f680f7), and manually
reconciled:
core:
- Dropped DRM_MODE_TYPE_ALL and DRM_MODE_FLAG_ALL; these are purely
internal details of the bits accepted by the currently running
kernel, and can not be generally relied on by userspace
- Add HDCP flags
- Note CTM entry representation is sign-magnitude format, not
two's-complement
amdgpu:
- Add QUERY_STATE2 context op
- Add VCN firmware version query
etnaviv:
- Add more GPU feature flags
i915:
- Add caps, params and ioctls for PMU / perf-stream
- Add support for explicit fencing
nouveau:
- Add TILE_COMP layout
vc4:
- Add perfmon ioctls
virtgpu:
- Add capset-fix param
vmware:
- Add handle-close ioctl and explicit-fencing support
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'etnaviv')
| -rw-r--r-- | etnaviv/etnaviv_drm.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/etnaviv/etnaviv_drm.h b/etnaviv/etnaviv_drm.h index 110cc73b..0d5c49dc 100644 --- a/etnaviv/etnaviv_drm.h +++ b/etnaviv/etnaviv_drm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2015 Etnaviv Project * @@ -54,6 +55,12 @@ struct drm_etnaviv_timespec { #define ETNAVIV_PARAM_GPU_FEATURES_4 0x07 #define ETNAVIV_PARAM_GPU_FEATURES_5 0x08 #define ETNAVIV_PARAM_GPU_FEATURES_6 0x09 +#define ETNAVIV_PARAM_GPU_FEATURES_7 0x0a +#define ETNAVIV_PARAM_GPU_FEATURES_8 0x0b +#define ETNAVIV_PARAM_GPU_FEATURES_9 0x0c +#define ETNAVIV_PARAM_GPU_FEATURES_10 0x0d +#define ETNAVIV_PARAM_GPU_FEATURES_11 0x0e +#define ETNAVIV_PARAM_GPU_FEATURES_12 0x0f #define ETNAVIV_PARAM_GPU_STREAM_COUNT 0x10 #define ETNAVIV_PARAM_GPU_REGISTER_MAX 0x11 |