summaryrefslogtreecommitdiff
path: root/simon128_simd.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Fix use of <x86intrin.h> for MSVC (GH #1198)Jeffrey Walton2023-04-151-3/+3
| | | | It seems Microsoft now defines GCC defines, like __BMI__
* Move M128_CAST and CONST_M128_CAST to config_asm.hJeffrey Walton2021-04-201-8/+0
|
* Update commentsJeffrey Walton2020-04-111-1/+1
|
* Update file header commentsJeffrey Walton2020-04-111-1/+1
|
* Presplat SIMON and SPECK keys on Intel machinesJeffrey Walton2020-04-101-17/+16
|
* Add VecSplatElement64 for PowerPCJeffrey Walton2020-04-081-45/+15
|
* Use VecSplatWord instaed of VecSplatsJeffrey Walton2020-04-081-1/+1
|
* Use vec_splat instead of load and permuteJeffrey Walton2020-04-081-12/+38
|
* Update comments in ppc_simd.hJeffrey Walton2020-04-081-20/+20
|
* Fis MSVC compile due to lack of ssize_tJeffrey Walton2020-04-081-6/+6
|
* Add 32-bit Altivec implementation of Simon128Jeffrey Walton2020-04-081-99/+137
|
* Add 64-bit overload for VecLoadAlignedJeffrey Walton2020-04-051-6/+7
|
* Pre-splat SIMON and SPECK keys when appropriate for Altivec (PR #910)Jeffrey Walton2019-10-281-8/+15
| | | SIMON and SPECK keys can be pre-splatted in the forward direction when Altivec instructions will be used. Pre-splatting does not work for the reverse transformation. It breaks modes like CBC, so the speed-up is only applied to the forward transformation.
* Enable Power7 for Simon and Speck (PR #909)Jeffrey Walton2019-10-271-16/+7
|
* Fix MS ARM64 compileJeffrey Walton2019-10-161-0/+4
|
* Fix ARM headers and Android compile (PR #896)Jeffrey Walton2019-10-161-6/+3
| | | | | | | | | | | * Test fix ARM headers This problem has been festering for some time. The header file includes are slightly different than the ISA options. Some platforms need an include, others don't. * Fix cryptest-android.sh and cryptest-ios.sh * Fix MSVC ARM32 and ARM64 compile * Split ARM32 and ARM64 recipes in GNUmakefile
* Update commentsJeffrey Walton2019-07-211-1/+1
|
* Fix missing _mm_roti_epi32 and _mm_roti_epi64 under GCC (GH #859)Jeffrey Walton2019-07-021-1/+3
|
* Add missing XOP header for blake2b_simd.cpp (GH #859)Jeffrey Walton2019-07-021-0/+1
| | | | | | The Gentoo folks caught a bug at https://bugs.gentoo.org/689162. The 689162 bug uses -march=bdver1 -msse4.1 on a AMD Bulldozer machine. Investigating the issue we are missing the XOP header blake2b_simd.cpp. However, adding the XOP header is not enough for this particular config. Four source files fail to compile with the expected headers. We are waiting on the GCC folks to get back to us with a fix.
* Remove unneeded permutesJeffrey Walton2019-04-271-10/+0
| | | | Loading byte arrays does not suffer the endian swaps.
* Use PowerPC unaligned loads and stores with Power8 (GH #825, PR #826)Jeffrey Walton2019-04-271-1/+1
| | | Use PowerPC unaligned loads and stores with Power8. Formerly we were using Power7 as the floor because the IBM POWER Architecture manuals said unaligned loads and stores were available. However, some compilers generate bad code for unaligned loads and stores using `-march=power7`, so bump to a known good.
* Cleanup headers after Microsoft ARM64 portJeffrey Walton2019-01-041-2/+2
|
* Cleanup headers after Microsoft ARM64 portJeffrey Walton2019-01-041-2/+0
|
* Fix <arm_neon.h> include for ARM64 with MSVC compiler (GH #776)Jeffrey Walton2019-01-041-1/+4
|
* Fix SIMON128 and SPECK128 NEON compile with MSVC compiler (GH #776)Jeffrey Walton2019-01-031-0/+8
|
* Fix SIMON build when SSSE3 not availableJeffrey Walton2018-12-291-2/+4
|
* Cleanup debug information from SIMON source filesJeffrey Walton2018-11-211-36/+26
|
* Rename PPC vector functions from VectorFunc to VecFuncJeffrey Walton2018-11-151-58/+59
|
* Add CRYPTOPP_INLINE to SIMON and SPECk for debuggingJeffrey Walton2018-11-131-28/+36
|
* Rename files with dashes to underscores (GH #736)Jeffrey Walton2018-11-101-0/+834
Also see https://groups.google.com/forum/#!topic/cryptopp-users/HBz-6gZZFOA on the mailing list
View Lorry Controller Status