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path: root/rijndael.cpp
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* Disable global optimizations for all versions of VS2017 (GH #649, GH #735, PR...Jeffrey Walton2022-08-241-1/+1
* Enable MSVC global optimizations for AES and ChaCha for newer MSVC versions (...chausner2022-07-291-3/+2
* Fix typos (PR# 1099)Dimitris Apostolou2022-01-041-1/+1
* Consistently use cryptogams_ prefix for Andy Polyakov's code (PR #952)Jeffrey Walton2020-12-261-8/+8
* Fix conflicting Cryptogams API names on ARM with OpenSSL (GH #952)Sergiu Giurgiu2020-06-031-4/+4
* Cleanup CFB mode for Cryptogams AESJeffrey Walton2020-04-131-6/+8
* Fix AES/CFB mode failure on ARMv7Jeffrey Walton2020-04-121-4/+4
* Align Rijdael SIMD data to natural alignmentJeffrey Walton2020-04-031-4/+4
* Remove double semicolons after sed'ing definesJeffrey Walton2019-10-031-1/+1
* Update commentsJeffrey Walton2019-07-211-1/+1
* Avoid use of NDEBUG in source filesJeffrey Walton2018-12-031-3/+5
* Update commentsJeffrey Walton2018-11-111-1/+0
* Rename files with dashes to underscores (GH #736)Jeffrey Walton2018-11-101-1/+1
* Fix global optimization bug for ChaCha AVX2 under VS2017 (GH #735)Jeffrey Walton2018-11-091-3/+3
* Disable global optimizations for Rijndael using MSC compiler (GH #649)Jeffrey Walton2018-11-051-0/+8
* Sync CRYPTOPP_{BIG|LITTLE}_ENDIAN with AutotoolsJeffrey Walton2018-10-281-1/+1
* Fix unused variable warnings (GH #723)orangefour2018-10-221-9/+0
* Allow Cryptogam's AES thunk to be inlinedJeffrey Walton2018-10-141-8/+4
* Use consistent suffix for SSE2 ASMJeffrey Walton2018-08-201-3/+3
* Disable X32 inline assembly (GH #686, PR #704)Jeffrey Walton2018-08-181-11/+6
* Disable same buffer for in and out on ARM A-32 (GH #683)Jeffrey Walton2018-07-121-0/+4
* Remove CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS support (GH #682)Jeffrey Walton2018-07-111-15/+16
* Add ARM AES asm implementation from Cryptogams (GH #683)Jeffrey Walton2018-07-111-9/+104
* Add algorithm provider member function to Algorithm classJeffrey Walton2018-07-061-0/+21
* Remove unneeded round parameter on Rijndael_UncheckedSetKey_SSE4_AESNIJeffrey Walton2018-02-201-2/+2
* Remove unneeded parameter for Rijndael_UncheckedSetKey_POWER8Jeffrey Walton2018-02-201-2/+2
* Move Altivec AdvancedProcessBlocks into adv-simd.hJeffrey Walton2018-01-021-4/+4
* Switch to rotlConstant and rotrConstantJeffrey Walton2017-11-251-2/+2
* Rename CRYPTOPP_ENABLE_ADVANCED_PROCESS_BLOCKS for RijndaelJeffrey Walton2017-11-221-2/+2
* Prefix IS_LITTLE_ENDIAN and IS_BIG_ENDIAN with CRYPTOPPJeffrey Walton2017-11-101-1/+1
* Use SetMark to avoid unneeded zeroization in RijndaelJeffrey Walton2017-10-081-0/+4
* Move AliasedWithTable into unnamed namespaceJeffrey Walton2017-10-051-57/+54
* Move Power8 crypto functions into ppc-crypto.hJeffrey Walton2017-09-221-2/+0
* Enable little endian Rijndael_UncheckedSetKey_POWER8 using built-insJeffrey Walton2017-09-211-4/+5
* Move Rijndael_UncheckedSetKey_POWER8 prior to GetUserKey callJeffrey Walton2017-09-211-6/+7
* Add Rijndael_UncheckedSetKey_POWER8Jeffrey Walton2017-09-191-20/+11
* ByteReverseArray → ReverseByteArrayLEJeffrey Walton2017-09-181-2/+2
* Refactor LoadT() and StoreT(). Add separate ReverseT() for little endian mach...Jeffrey Walton2017-09-181-2/+2
* Add AdvancedProcessBlocks for Power8Jeffrey Walton2017-09-121-8/+15
* Add Power8 AES decryptionJeffrey Walton2017-09-121-19/+35
* Update commentsJeffrey Walton2017-09-121-5/+4
* Add Power8 AES encryptionJeffrey Walton2017-09-111-4/+48
* Revert AltiVec and Power8 commitsJeffrey Walton2017-09-051-29/+0
* Warn of under-aligned buffers when using AES in debug modeJeffrey Walton2017-09-041-0/+20
* Fixup under-aligned buffers when using AES on AltiVec and Power8Jeffrey Walton2017-09-041-0/+9
* Support Base Implementation + SIMD implementation on Solaris (PR #461)Jeffrey Walton2017-08-241-7/+0
* Remove BOOL macro value (GH #462)Jeffrey Walton2017-08-201-7/+7
* Update commentsJeffrey Walton2017-08-191-2/+7
* Split source files to support Base Implementation + SIMD implementation (GH #...Jeffrey Walton2017-08-171-402/+74
* Update comments in Rijndael head commentsJeffrey Walton2017-08-151-0/+4