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* Fix Padlock RNG codeJeffrey Walton2020-07-271-10/+4
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* Update Padlock RNG GenerateBlockJeffrey Walton2020-07-271-4/+11
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* Run autoupdate and libtoolize if availableJeffrey Walton2018-07-271-2/+2
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* Save/restore 64-bit registers for Padlock on x86_64Jeffrey Walton2018-07-271-6/+4
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* Add algorithm provider member function to Algorithm classJeffrey Walton2018-07-061-0/+5
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* Cleanup warnings under MSCJeffrey Walton2018-01-211-0/+4
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* Clear Coverity issue CID 186341Jeffrey Walton2017-12-281-1/+1
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* Update commentsJeffrey Walton2017-08-251-2/+2
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* Fix typoJeffrey Walton2017-08-241-1/+1
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* Fix Asan 64-bit buildJeffrey Walton2017-08-201-2/+12
| | | | The Padlock SDK sample code leaves a lot to be desired. Regariding the 64-bit samples and instr_linux64.asm... it looks like the sample sill uses 32-bit constants, but most anything related to extended registers, like rdi, is commented out
* Fix compile under ClangJeffrey Walton2017-08-201-2/+2
| | | | | | | | | | padlkrng.cpp:45:34: error: no matching function for call to 'STDMIN' const size_t rem = STDMIN(ret, STDMIN(size, 16U)); ^~~~~~ ./misc.h:516:36: note: candidate template ignored: deduced conflicting types for parameter 'T' ('unsigned long' vs. 'unsigned int') template <class T> inline const T& STDMIN(const T& a, const T& b) ^ 1 error generated.
* Updated documentationJeffrey Walton2017-08-201-1/+1
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* FIX GCC ASM templateJeffrey Walton2017-08-201-1/+1
| | | | is the constant 2. %2 is the second positional argument, which is the XSTORE divisor. We want the later.
* Add Divisor and MSR member variablesJeffrey Walton2017-08-201-37/+38
| | | | | | | Guard ASM based on CRYPTOPP_X86_ASM_AVAILABLE Increased depth of internal buffer Update documentation for using the generator Whitespace check-in
* Add VIA Padlock RNGJeffrey Walton2017-08-191-0/+86