| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix use of <x86intrin.h> for MSVC (GH #1198) | Jeffrey Walton | 2023-04-15 | 1 | -3/+3 |
| | | | | | It seems Microsoft now defines GCC defines, like __BMI__ | ||||
| * | Fix ChaCha AVX2 implementation (GH #1069) | Jeffrey Walton | 2021-09-20 | 1 | -3/+0 |
| | | | | | Many thanks to Jack Lloyd | ||||
| * | Disable ChaCha20 AVX2 implementation (GH #1069) | Jeffrey Walton | 2021-09-17 | 1 | -0/+3 |
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| * | Use Altivec as minimum ISA of ChaCha Simon64 and Speck64 | Jeffrey Walton | 2020-04-05 | 1 | -11/+4 |
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| * | Add 64-bit overload for VecLoadAligned | Jeffrey Walton | 2020-04-05 | 1 | -4/+5 |
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| * | Add XLC 12 loads and stores for AIX (PR #907) | Jeffrey Walton | 2019-10-26 | 1 | -5/+5 |
| | | | | Add XLC 12 loads and stores for AIX | ||||
| * | Fix ARM headers and Android compile (PR #896) | Jeffrey Walton | 2019-10-16 | 1 | -3/+2 |
| | | | | | | | | | | | | * Test fix ARM headers This problem has been festering for some time. The header file includes are slightly different than the ISA options. Some platforms need an include, others don't. * Fix cryptest-android.sh and cryptest-ios.sh * Fix MSVC ARM32 and ARM64 compile * Split ARM32 and ARM64 recipes in GNUmakefile | ||||
| * | Fix missing _mm_roti_epi32 and _mm_roti_epi64 under GCC (GH #859) | Jeffrey Walton | 2019-07-02 | 1 | -0/+3 |
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| * | Rework SSE2 and AVX2 loads and stores | Jeffrey Walton | 2019-06-09 | 1 | -44/+40 |
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| * | Revert changes for lgtm findings | Jeffrey Walton | 2019-06-09 | 1 | -41/+44 |
| | | | | | This broke SunCC to the point of no repair. SunCC is using AVX2 instructions for C++ and SSE2. Man this compiler sucks... | ||||
| * | Clear lgtm findings | Jeffrey Walton | 2019-06-08 | 1 | -44/+41 |
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| * | Use PowerPC unaligned loads and stores with Power8 (GH #825, PR #826) | Jeffrey Walton | 2019-04-27 | 1 | -5/+5 |
| | | | | Use PowerPC unaligned loads and stores with Power8. Formerly we were using Power7 as the floor because the IBM POWER Architecture manuals said unaligned loads and stores were available. However, some compilers generate bad code for unaligned loads and stores using `-march=power7`, so bump to a known good. | ||||
| * | Use carryless multiplies for NIST b233 and k233 curves (GH #783, PR #784) | Jeffrey Walton | 2019-01-16 | 1 | -14/+2 |
| | | | | Use carryless multiplies for NIST b233 and k233 curves. | ||||
| * | Cleanup headers after Microsoft ARM64 port | Jeffrey Walton | 2019-01-04 | 1 | -2/+0 |
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| * | Fix <arm_neon.h> include for ARM64 with MSVC compiler (GH #776) | Jeffrey Walton | 2019-01-04 | 1 | -1/+2 |
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| * | Add PACK32x4 macro guard | Jeffrey Walton | 2019-01-03 | 1 | -5/+7 |
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| * | Fix ChaCha NEON compile with MSVC compiler (GH #776) | Jeffrey Walton | 2019-01-03 | 1 | -1/+12 |
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| * | Fix ChaCha compiler crash for GCC 3.3 | Jeffrey Walton | 2018-12-29 | 1 | -5/+10 |
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| * | Update comments | Jeffrey Walton | 2018-11-18 | 1 | -1/+3 |
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| * | Add BLAKE2s and ChaCha CORE SIMD function (GH #656) | Jeffrey Walton | 2018-11-18 | 1 | -3/+22 |
| | | | | | | The CORE function provides the implementation for ChaCha_OperateKeystream_ALTIVEC, ChaCha_OperateKeystream_POWER7, BLAKE2_Compress32_ALTIVEC and BLAKE2_Compress32_POWER7. Depending on the options used to compile the source files, either POWER7 or ALTIVEC will be used. This is needed to support the "new toolchain, ancient hardware" use case. | ||||
| * | Rename PPC vector functions from VectorFunc to VecFunc | Jeffrey Walton | 2018-11-15 | 1 | -192/+193 |
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| * | Make Altivec vector wraps friendly to downgrades | Jeffrey Walton | 2018-11-15 | 1 | -84/+49 |
| | | | | | The way the existing ppc_simd.h is written makes it hard to to switch between the old Altivec loads and stores and the new POWER7 loads and stores. This checkin rewrites the wrappers to use _ALTIVEC_, _ARCH_PWR7 and _ARCH_PWR8. The wrappers in this file now honor -maltivec, -mcpu-power7 and -mcpu=power8. It allows users to compile a source file, like chacha_simd.cpp, with a lower ISA and things just work for them. | ||||
| * | Whitespace check-in | Jeffrey Walton | 2018-11-14 | 1 | -6/+6 |
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| * | Drop ChaCha requirements to POWER7 | Jeffrey Walton | 2018-11-14 | 1 | -8/+29 |
| | | | | | This costs about 0.6 cpb (700 MB/s on GCC112), but it makes the faster algorithm available to more machines. In the future we may want to provide both POWER7 and POWER8 | ||||
| * | Rename files with dashes to underscores (GH #736) | Jeffrey Walton | 2018-11-10 | 1 | -0/+1104 |
| Also see https://groups.google.com/forum/#!topic/cryptopp-users/HBz-6gZZFOA on the mailing list | |||||
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index : delta/cryptopp-git.git | |
| github.com: weidai11/cryptopp.git |
| summaryrefslogtreecommitdiff |
path: root/chacha_simd.cpp