Whitespace check-in

1 files changed, 64 insertions, 64 deletions

diff --git a/ppc_simd.h b/ppc_simd.h
index 3fc48475..6f79b8b2 100644
--- a/ppc_simd.h
+++ b/ppc_simd.h
@@ -408,70 +408,6 @@ inline uint32x4_p VecLoad(int off, const word32 src[4])
 #endif

 }

 

-/// \brief Loads a vector from an aligned word array

-/// \param src the word array

-/// \details VecLoadAligned() loads a vector from an aligned word array.

-/// \details VecLoadAligned() uses POWER7's and VSX's <tt>vec_xl</tt> if

-///  available. The instruction does not require aligned effective memory

-///  addresses. <tt>vec_ld</tt> is used if POWER7 or VSX are not available.

-///  The effective address of <tt>src</tt> must be 16-byte aligned for Altivec.

-/// \par Wraps

-///  vec_ld, vec_xl

-/// \since Crypto++ 8.0

-inline uint32x4_p VecLoadAligned(const word32 src[4])

-{

-    // Power7/ISA 2.06 provides vec_xl, but only for 32-bit and 64-bit

-    // word pointers. The ISA lacks loads for short* and char*.

-    // Power9/ISA 3.0 provides vec_xl for all datatypes.

-

-    // GCC and XLC use integer math for the effective address.

-    // LLVM uses pointer math for the effective address.

-    const uintptr_t eff = reinterpret_cast<uintptr_t>(src);

-    CRYPTOPP_ASSERT(eff % 16 == 0);

-

-#if defined(_ARCH_PWR9)

-    return (uint32x4_p)vec_xl(0, CONST_V8_CAST(src));

-#elif (defined(_ARCH_PWR7) && defined(__VSX__)) || defined(_ARCH_PWR8)

-    return (uint32x4_p)vec_xl(0, CONST_V32_CAST(src));

-#else

-    return (uint32x4_p)vec_ld(0, CONST_V8_CAST(src));

-#endif

-}

-

-/// \brief Loads a vector from an aligned word array

-/// \param src the word array

-/// \details VecLoadAligned() loads a vector from an aligned word array.

-/// \details VecLoadAligned() uses POWER7's and VSX's <tt>vec_xl</tt> if

-///  available. The instruction does not require aligned effective memory

-///  addresses. <tt>vec_ld</tt> is used if POWER7 or VSX are not available.

-///  The effective address of <tt>src</tt> must be 16-byte aligned for Altivec.

-/// \par Wraps

-///  vec_ld, vec_xl

-/// \since Crypto++ 8.0

-inline uint32x4_p VecLoadAligned(int off, const word32 src[4])

-{

-    // Power7/ISA 2.06 provides vec_xl, but only for 32-bit and 64-bit

-    // word pointers. The ISA lacks loads for short* and char*.

-    // Power9/ISA 3.0 provides vec_xl for all datatypes.

-

-    // GCC and XLC use integer math for the effective address.

-    // LLVM uses pointer math for the effective address.

-    const uintptr_t eff = reinterpret_cast<uintptr_t>(src)+off;

-    CRYPTOPP_ASSERT(eff % 16 == 0);

-

-#if defined(_ARCH_PWR9)

-    return (uint32x4_p)vec_xl(off, CONST_V8_CAST(src));

-#elif (defined(_ARCH_PWR7) && defined(__VSX__)) || defined(_ARCH_PWR8)

-# if defined(__clang__)

-    return (uint32x4_p)vec_xl(0, CONST_V32_CAST(eff));

-# else

-    return (uint32x4_p)vec_xl(off, CONST_V32_CAST(src));

-# endif

-#else

-    return (uint32x4_p)vec_ld(off, CONST_V8_CAST(src));

-#endif

-}

-

 #if defined(__VSX__) || defined(_ARCH_PWR8) || defined(CRYPTOPP_DOXYGEN_PROCESSING)

 

 /// \brief Loads a vector from a double word array

@@ -607,6 +543,70 @@ inline uint32x4_p VecLoadAligned(int off, const byte src[16])
 #endif

 }

 

+/// \brief Loads a vector from an aligned word array

+/// \param src the word array

+/// \details VecLoadAligned() loads a vector from an aligned word array.

+/// \details VecLoadAligned() uses POWER7's and VSX's <tt>vec_xl</tt> if

+///  available. The instruction does not require aligned effective memory

+///  addresses. <tt>vec_ld</tt> is used if POWER7 or VSX are not available.

+///  The effective address of <tt>src</tt> must be 16-byte aligned for Altivec.

+/// \par Wraps

+///  vec_ld, vec_xl

+/// \since Crypto++ 8.0

+inline uint32x4_p VecLoadAligned(const word32 src[4])

+{

+    // Power7/ISA 2.06 provides vec_xl, but only for 32-bit and 64-bit

+    // word pointers. The ISA lacks loads for short* and char*.

+    // Power9/ISA 3.0 provides vec_xl for all datatypes.

+

+    // GCC and XLC use integer math for the effective address.

+    // LLVM uses pointer math for the effective address.

+    const uintptr_t eff = reinterpret_cast<uintptr_t>(src);

+    CRYPTOPP_ASSERT(eff % 16 == 0);

+

+#if defined(_ARCH_PWR9)

+    return (uint32x4_p)vec_xl(0, CONST_V8_CAST(src));

+#elif (defined(_ARCH_PWR7) && defined(__VSX__)) || defined(_ARCH_PWR8)

+    return (uint32x4_p)vec_xl(0, CONST_V32_CAST(src));

+#else

+    return (uint32x4_p)vec_ld(0, CONST_V8_CAST(src));

+#endif

+}

+

+/// \brief Loads a vector from an aligned word array

+/// \param src the word array

+/// \details VecLoadAligned() loads a vector from an aligned word array.

+/// \details VecLoadAligned() uses POWER7's and VSX's <tt>vec_xl</tt> if

+///  available. The instruction does not require aligned effective memory

+///  addresses. <tt>vec_ld</tt> is used if POWER7 or VSX are not available.

+///  The effective address of <tt>src</tt> must be 16-byte aligned for Altivec.

+/// \par Wraps

+///  vec_ld, vec_xl

+/// \since Crypto++ 8.0

+inline uint32x4_p VecLoadAligned(int off, const word32 src[4])

+{

+    // Power7/ISA 2.06 provides vec_xl, but only for 32-bit and 64-bit

+    // word pointers. The ISA lacks loads for short* and char*.

+    // Power9/ISA 3.0 provides vec_xl for all datatypes.

+

+    // GCC and XLC use integer math for the effective address.

+    // LLVM uses pointer math for the effective address.

+    const uintptr_t eff = reinterpret_cast<uintptr_t>(src)+off;

+    CRYPTOPP_ASSERT(eff % 16 == 0);

+

+#if defined(_ARCH_PWR9)

+    return (uint32x4_p)vec_xl(off, CONST_V8_CAST(src));

+#elif (defined(_ARCH_PWR7) && defined(__VSX__)) || defined(_ARCH_PWR8)

+# if defined(__clang__)

+    return (uint32x4_p)vec_xl(0, CONST_V32_CAST(eff));

+# else

+    return (uint32x4_p)vec_xl(off, CONST_V32_CAST(src));

+# endif

+#else

+    return (uint32x4_p)vec_ld(off, CONST_V8_CAST(src));

+#endif

+}

+

 /// \brief Loads a vector from a byte array

 /// \param src the byte array

 /// \details VecLoadBE() loads a vector from a byte array. VecLoadBE