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| author | Jeffrey Walton <noloader@gmail.com> | 2020-12-18 20:09:01 -0500 |
|---|---|---|
| committer | Jeffrey Walton <noloader@gmail.com> | 2020-12-18 20:09:01 -0500 |
| commit | 0c11426b3524f402660e4d2653725da0ad064e8e (patch) | |
| tree | 8c17628b5429ab2b7a92df627bd855f62391d714 /config_align.h | |
| parent | 5bae476e5de16fd9a0c8ba4ff3fdad71b5f7c1e9 (diff) | |
| download | cryptopp-git-0c11426b3524f402660e4d2653725da0ad064e8e.tar.gz | |
Fix spelling
Diffstat (limited to 'config_align.h')
| -rw-r--r-- | config_align.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/config_align.h b/config_align.h index 97e85d82..5b02e291 100644 --- a/config_align.h +++ b/config_align.h @@ -20,7 +20,7 @@ #include "config_cxx.h" // CRYPTOPP_CXX11_ALIGNAS
#include "config_ver.h" // Compiler versions
-// Nearly all Intel's and AMD's have SSE. Enable it independent of SSE ASM and intrinscs.
+// Nearly all Intel's and AMD's have SSE. Enable it independent of SSE ASM and intrinsics.
// ARM NEON and ARMv8 ASIMD only need natural alignment of an element in the vector.
// Altivec through POWER7 need vector alignment. POWER8 and POWER9 relax the requirement.
#if defined(CRYPTOPP_DISABLE_ASM)
|