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| author | Andrew MacIntyre <andymac@bullseye.apana.org.au> | 2002-03-03 02:59:16 +0000 |
|---|---|---|
| committer | Andrew MacIntyre <andymac@bullseye.apana.org.au> | 2002-03-03 02:59:16 +0000 |
| commit | 7bf6833e178696b9815fd4e4c6d1cecc8b46bdd2 (patch) | |
| tree | 9da72d3e52c043d4fc5437967ddb9a0f0226b6e9 /Modules/signalmodule.c | |
| parent | 38b504e9e3ef3049815779e8c18b62f690ec4ed2 (diff) | |
| download | cpython-git-7bf6833e178696b9815fd4e4c6d1cecc8b46bdd2.tar.gz | |
OS/2 EMX port changes (Modules part of patch #450267):
Modules/
_hotshot.c
dbmmodule.c
fcntlmodule.c
main.c
pwdmodule.c
readline.c
selectmodule.c
signalmodule.c
termios.c
timemodule.c
unicodedata.c
Diffstat (limited to 'Modules/signalmodule.c')
| -rw-r--r-- | Modules/signalmodule.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Modules/signalmodule.c b/Modules/signalmodule.c index e34f051398..b27c4b74a7 100644 --- a/Modules/signalmodule.c +++ b/Modules/signalmodule.c @@ -16,7 +16,7 @@ #define SIG_ERR ((PyOS_sighandler_t)(-1)) #endif -#if defined(PYOS_OS2) +#if defined(PYOS_OS2) && !defined(PYCC_GCC) #define NSIG 12 #include <process.h> #endif |