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author | pxinwr <peixing.xin@windriver.com> | 2019-03-14 01:18:25 +0800 |
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committer | Victor Stinner <vstinner@redhat.com> | 2019-03-13 18:18:25 +0100 |
commit | 8b5bdda5b4c418c4a858f183763d0a497170977c (patch) | |
tree | 80a575182fe29a56488e7d1e99bd75d270e8f464 | |
parent | 9776b0636ae39668d3ce1c006d4be01dad01bf9f (diff) | |
download | cpython-git-8b5bdda5b4c418c4a858f183763d0a497170977c.tar.gz |
bpo-31904: Adapt the _signal module to VxWorks RTOS (GH-12304)
Limited signal fields in VxWorks.
-rw-r--r-- | Misc/NEWS.d/next/Library/2019-03-13-14-55-02.bpo-31904.834kfY.rst | 1 | ||||
-rw-r--r-- | Modules/signalmodule.c | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/Misc/NEWS.d/next/Library/2019-03-13-14-55-02.bpo-31904.834kfY.rst b/Misc/NEWS.d/next/Library/2019-03-13-14-55-02.bpo-31904.834kfY.rst new file mode 100644 index 0000000000..d859446b90 --- /dev/null +++ b/Misc/NEWS.d/next/Library/2019-03-13-14-55-02.bpo-31904.834kfY.rst @@ -0,0 +1 @@ +Add _signal module support for VxWorks. diff --git a/Modules/signalmodule.c b/Modules/signalmodule.c index f29720bcaf..4590017c17 100644 --- a/Modules/signalmodule.c +++ b/Modules/signalmodule.c @@ -1079,11 +1079,18 @@ fill_siginfo(siginfo_t *si) PyStructSequence_SET_ITEM(result, 0, PyLong_FromLong((long)(si->si_signo))); PyStructSequence_SET_ITEM(result, 1, PyLong_FromLong((long)(si->si_code))); +#ifdef __VXWORKS__ + PyStructSequence_SET_ITEM(result, 2, PyLong_FromLong(0L)); + PyStructSequence_SET_ITEM(result, 3, PyLong_FromLong(0L)); + PyStructSequence_SET_ITEM(result, 4, PyLong_FromLong(0L)); + PyStructSequence_SET_ITEM(result, 5, PyLong_FromLong(0L)); +#else PyStructSequence_SET_ITEM(result, 2, PyLong_FromLong((long)(si->si_errno))); PyStructSequence_SET_ITEM(result, 3, PyLong_FromPid(si->si_pid)); PyStructSequence_SET_ITEM(result, 4, _PyLong_FromUid(si->si_uid)); PyStructSequence_SET_ITEM(result, 5, PyLong_FromLong((long)(si->si_status))); +#endif #ifdef HAVE_SIGINFO_T_SI_BAND PyStructSequence_SET_ITEM(result, 6, PyLong_FromLong(si->si_band)); #else |