diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2015-07-20 20:01:34 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-21 06:07:18 +0000 |
| commit | a0206634baea037a4958986d72e66231eef8769d (patch) | |
| tree | bdf160cb9d0a40f35595ee5cef573a4d37ee3e16 /host | |
| parent | 0ab72c307a3772c198baf1678c1e65065e081abf (diff) | |
| download | vboot-a0206634baea037a4958986d72e66231eef8769d.tar.gz | |
crossystem: Add Skylake PCH GPIO controller IDfirmware-ultima-7287.131.Bfirmware-terra-7287.154.Bfirmware-setzer-7287.360.Bfirmware-reks-7287.133.Bfirmware-edgar-7287.167.Bfirmware-cyan-7287.57.Bfirmware-celes-7287.92.B
Add the GPIO controller ID that is used in the Skylake PCH
so it can properly export and use GPIOs that are exported
in VBNV for write protect.
BUG=chrome-os-partner:42560
BRANCH=none
TEST=verify crossystem output with and without WP enabled
Change-Id: Ic85c202bd0ca15c154c10481926ef18bafe3fac5
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286827
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'host')
| -rw-r--r-- | host/arch/x86/lib/crossystem_arch.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/host/arch/x86/lib/crossystem_arch.c b/host/arch/x86/lib/crossystem_arch.c index 64f014da..8819f5f1 100644 --- a/host/arch/x86/lib/crossystem_arch.c +++ b/host/arch/x86/lib/crossystem_arch.c @@ -681,6 +681,7 @@ static const struct GpioChipset chipsets_supported[] = { { "LynxPoint", FindGpioChipOffset }, { "PCH-LP", FindGpioChipOffset }, { "INT3437:00", FindGpioChipOffsetByLabel }, + { "INT344B:00", FindGpioChipOffsetByLabel }, { "BayTrail", BayTrailFindGpioChipOffset }, { "Braswell", BraswellFindGpioChipOffset }, { NULL }, |