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authorAaron Durbin <adurbin@chromium.org>2013-12-10 16:05:30 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2013-12-11 19:50:39 +0000
commit1aa59b0ea545d571f24a64af71f412fb214e4f82 (patch)
tree85420040088667c4bb25ee7cb41ca18447b6f0fb /firmware/lib/vboot_api_kernel.c
parent31912b61a7c19515f5f5decae8ccad7b8e42f4cf (diff)
downloadvboot-1aa59b0ea545d571f24a64af71f412fb214e4f82.tar.gz
crossystem: handle BayTrail gpios
BayTrail systems have 3 banks of gpios. Therefore, the Linux kernel exposes these 3 banks as 3 gpiochip entries. The kernel driver expects the 3 banks to be exposed with specific UIDs associated with a specific banks. ChromeOS firmware maps gpios within a given bank using the bank's MMIO offset. In summary: Bank Type | UID | Offset ----------+-----+------- SCORE | 1 | 0x0000 NCORE | 2 | 0x1000 SUS | 3 | 0x2000 BUG=chrome-os-partner:24408 BUG=chrome-os-partner:24324 BRANCH=None TEST=Built. 'crossystem wpsw_cur' works correctly. Change-Id: I251f86285ce9733f7ca90ed1ebef536f4fe5c07c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179513 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'firmware/lib/vboot_api_kernel.c')
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