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authorDuncan Laurie <dlaurie@chromium.org>2013-05-06 15:11:07 -0700
committerChromeBot <chrome-bot@google.com>2013-05-06 17:48:25 -0700
commitad3ff7c7383ca551117eaece120a7bf87693b423 (patch)
tree12153eb81f4c3b639c0e48e23affab1b11d25885
parentfa6b35c1ffa33833b3250a6515869ccd4cb59121 (diff)
downloadvboot-ad3ff7c7383ca551117eaece120a7bf87693b423.tar.gz
crossystem: Add LynxPoint to list of valid x86 chipset types
Haswell CPUs are paired with the LynxPoint chipset and this needs to be a valid controller name for crossystem. BUG=chrome-os-partner:19263 BRANCH=none TEST=manual This was tested on a wtm2 system to ensure that a GPIO defined in chromeos ACPI that is exported by the kernel at /sys/devices/platform/chromeos_acpi/GPIO.# is used by crossystem and the GPIO is exported in /sys/class/gpio and read. $ cat /sys/devices/platform/chromeos_acpi/GPIO.1/GPIO.2 34 $ cat /sys/class/gpio/gpio196/value 1 $ crossystem wpsw_cur 1 Change-Id: I04064109e99270d7d26b27182b17fffbf47b025b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50224 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--host/arch/x86/lib/crossystem_arch.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/host/arch/x86/lib/crossystem_arch.c b/host/arch/x86/lib/crossystem_arch.c
index 85c5c6b2..675a9cdc 100644
--- a/host/arch/x86/lib/crossystem_arch.c
+++ b/host/arch/x86/lib/crossystem_arch.c
@@ -553,7 +553,8 @@ static int ReadGpio(int signal_type) {
return -1;
if ((0 != strcmp(controller_name, "NM10")) &&
(0 != strcmp(controller_name, "CougarPoint")) &&
- (0 != strcmp(controller_name, "PantherPoint")))
+ (0 != strcmp(controller_name, "PantherPoint")) &&
+ (0 != strcmp(controller_name, "LynxPoint")))
return -1;
/* Modify GPIO number by driver's offset */