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authorPatrick Georgi <pgeorgi@google.com>2021-09-09 00:44:06 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-09-13 14:49:15 +0000
commit116b1449304d7dd83a480a07ae870a3a4cf6360e (patch)
tree2891a89b2187651b92a2ac96d54ea6bf2710e33b /util/kconfig
parenta96482acd392f514d249b5ca94e11a0767378f9e (diff)
downloadcoreboot-116b1449304d7dd83a480a07ae870a3a4cf6360e.tar.gz
util/kconfig: Simplify dependencies for parser.tab.*
With parser.tab.h depending on parser.tab.c it's possible for make to initiate the creation of parser.tab.c, then try to compile it, even though parser.tab.h is still missing. This isn't normally an issue yet because bison creates them both at a time but with pre-compiled files this will become a problem. Pattern rules support (until recently as a special case that no other type of rule could implement) multiple targets that are actually treated as "one command creates multiple output files" so use that to state the relationship properly. Change-Id: I4aa7eca9d3123808e0665a15a99c04fac7384940 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57509 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'util/kconfig')
-rw-r--r--util/kconfig/Makefile.inc6
1 files changed, 2 insertions, 4 deletions
diff --git a/util/kconfig/Makefile.inc b/util/kconfig/Makefile.inc
index c3b764b2b7..9277b516ee 100644
--- a/util/kconfig/Makefile.inc
+++ b/util/kconfig/Makefile.inc
@@ -60,10 +60,8 @@ endef
$(foreach prog,$(hostprogs),$(eval $(call hostprogs_template,$(prog))))
-$(objk)/parser.tab.h: | $(objk)/parser.tab.c
-$(objk)/%.tab.h: | $(objk)/%.tab.c
-$(objk)/%.tab.c: $(srck)/%.y
- bison -t -l --defines=$(objk)/$*.tab.h -b $(objk)/$* $<
+$(objk)/%.tab.c $(objk)/%.tab.h: $(srck)/%.y
+ bison -t -l --defines -b $(objk)/$* $<
$(objk)/%.lex.c: $(srck)/%.l
flex -L -o$@ $<