src/lib: Add Kconfig option for SPD cache in FMAP

Currently, the option to cache DIMM SPD data in an FMAP region
is closely coupled to a single board (google/hatch) and requires
a custom FMAP to utilize.

Loosen this coupling by introducing a Kconfig option which adds
a correctly sized and aligned RW_SPD_CACHE region to the default FMAP.
Add a Kconfig option for the region name, replacing the existing hard-
coded instance in spd_cache.h. Change the inclusion of spd_cache.c to
use this new Kconfig, rather than the board-specific one currently used.
Lastly, have google/hatch select the new Kconfig when appropriate to
ensure no change in current functionality.

Test: build/boot WYVERN google/hatch variant with default FMAP, verify
FMAP contains RW_SPD_CACHE, verify SPD cache used via cbmem log.

Also tested on an out-of-tree Purism board.

Change-Id: Iee0e7acb01e238d7ed354e3dbab1207903e3a4fc
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48520
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/util/cbfstool/default-x86.fmd b/util/cbfstool/default-x86.fmd
index f0143e9575..25c5096ae1 100644
--- a/util/cbfstool/default-x86.fmd
+++ b/util/cbfstool/default-x86.fmd
@@ -12,6 +12,7 @@ FLASH@##ROM_BASE## ##ROM_SIZE## {
 		##CONSOLE_ENTRY##
 		##MRC_CACHE_ENTRY##
 		##SMMSTORE_ENTRY##
+		##SPD_CACHE_ENTRY##
 		FMAP@##FMAP_BASE## ##FMAP_SIZE##
 		COREBOOT(CBFS)@##CBFS_BASE## ##CBFS_SIZE##
 	}