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| author | Sean Rhodes <sean@starlabs.systems> | 2022-09-16 11:00:01 +0100 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-10-07 22:05:11 +0000 |
| commit | c436541c3d96d1ea3a4efc7c6a8f79951c71bff2 (patch) | |
| tree | 583adbd650d49a5ad47a83ebdc2027778d2bd077 /src | |
| parent | 0eb165adf77626fb21e9fc0c0d124ad783720239 (diff) | |
| download | coreboot-c436541c3d96d1ea3a4efc7c6a8f79951c71bff2.tar.gz | |
soc/intel/apollolake: Add UFS Interrupt
According to Intel document number 336561, GLK has UFS (0x1d),
so add the PCI interrupt.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I68bac590bd1a9a0b8213440e882c8f431f06c95f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67680
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/pci_irqs.asl | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/acpi/pci_irqs.asl b/src/soc/intel/apollolake/acpi/pci_irqs.asl index 585d9db662..b47ac24c3e 100644 --- a/src/soc/intel/apollolake/acpi/pci_irqs.asl +++ b/src/soc/intel/apollolake/acpi/pci_irqs.asl @@ -54,6 +54,9 @@ Method(_PRT) Package(){0x001BFFFF, 0, 0, SDCARD_INT}, #endif Package(){0x001CFFFF, 0, 0, EMMC_INT}, +#if CONFIG(SOC_INTEL_GEMINILAKE) + Package(){0x001DFFFF, 0, 0, UFS_INT}, +#endif Package(){0x001EFFFF, 0, 0, SDIO_INT}, Package(){0x001FFFFF, 0, 0, SMBUS_INT}, }) |