cpu/amd/agesa: Use common MRC_CACHE code to save S3 data

Use the common code to save data for fast boot or S3 resume.
An notable improvement that comes with this, is that the same 4K page
is not rewritten all the time. This prolongs the hardware's life.

TESTED on pcengines/apu1 and lenovo/g505s: S3 resume works fine.

Change-Id: I0f4f36dcead52a6c550fb5e606772e0a99029872
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44295
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>

1 files changed, 19 insertions, 61 deletions

diff --git a/src/drivers/amd/agesa/oem_s3.c b/src/drivers/amd/agesa/oem_s3.c
index 9220f3e0ce..cd5e858f0e 100644
--- a/src/drivers/amd/agesa/oem_s3.c
+++ b/src/drivers/amd/agesa/oem_s3.c
@@ -1,41 +1,32 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <spi-generic.h>
-#include <spi_flash.h>
 #include <string.h>
 #include <cbmem.h>
 #include <console/console.h>
+#include <mrc_cache.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <AGESA.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 
-/* The size needs to be 4k aligned, which is the sector size of most flashes. */
-#define S3_DATA_NONVOLATILE_SIZE	0x1000
-
-#if CONFIG(HAVE_ACPI_RESUME) && S3_DATA_NONVOLATILE_SIZE > CONFIG_S3_DATA_SIZE
-#error "Please increase the value of S3_DATA_SIZE"
-#endif
-
-static void get_s3nv_data(uintptr_t *pos, uintptr_t *len)
-{
-	/* FIXME: Find file from CBFS. */
-	*pos = CONFIG_S3_DATA_POS;
-	*len = S3_DATA_NONVOLATILE_SIZE;
-}
+/* Training data versioning is not supported or tracked. */
+#define DEFAULT_MRC_VERSION 0
 
 AGESA_STATUS OemInitResume(AMD_S3_PARAMS *dataBlock)
 {
-	uintptr_t pos, size;
-	get_s3nv_data(&pos, &size);
+	void *nv_storage = NULL;
+	size_t nv_storage_size = 0;
 
-	u32 len = *(u32*)pos;
+	nv_storage = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA, DEFAULT_MRC_VERSION,
+						 &nv_storage_size);
 
-	/* Test for uninitialized s3nv data in SPI. */
-	if (len == 0 || len == (u32)-1ULL)
-		return AGESA_FATAL;
+	if (nv_storage == NULL || nv_storage_size == 0) {
+		printk(BIOS_ERR, "%s: No valid MRC cache!\n", __func__);
+		return AGESA_CRITICAL;
+	}
+
+	dataBlock->NvStorage = nv_storage;
+	dataBlock->NvStorageSize = nv_storage_size;
 
-	dataBlock->NvStorageSize = len;
-	dataBlock->NvStorage = (void *) (pos + sizeof(u32));
 	return AGESA_SUCCESS;
 }
 
@@ -56,44 +47,13 @@ AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock)
 	return AGESA_SUCCESS;
 }
 
-#if ENV_RAMSTAGE
-
-static int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
-{
-#if CONFIG(SPI_FLASH)
-	struct spi_flash flash;
-
-	spi_init();
-	if (spi_flash_probe(0, 0, &flash))
-		return -1;
-
-	spi_flash_volatile_group_begin(&flash);
-
-	spi_flash_erase(&flash, pos, size);
-	spi_flash_write(&flash, pos, sizeof(len), &len);
-	spi_flash_write(&flash, pos + sizeof(len), len, buf);
-
-	spi_flash_volatile_group_end(&flash);
-	return 0;
-#else
-	return -1;
-#endif
-}
-
 AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock)
 {
-	uintptr_t pos, size;
-
-	/* To be consumed in AmdInitResume. */
-	get_s3nv_data(&pos, &size);
-	if (size && dataBlock->NvStorageSize)
-		spi_SaveS3info(pos, size, dataBlock->NvStorage,
-			dataBlock->NvStorageSize);
-	else
-		printk(BIOS_EMERG,
-			"Error: Cannot store memory training results in SPI.\n"
-			"Error: S3 resume will not be possible.\n"
-		);
+	if (mrc_cache_stash_data(MRC_TRAINING_DATA, DEFAULT_MRC_VERSION,
+				 dataBlock->NvStorage, dataBlock->NvStorageSize) < 0) {
+		printk(BIOS_ERR, "%s: Failed to stash MRC data\n", __func__);
+		return AGESA_CRITICAL;
+	}
 
 	/* To be consumed in AmdS3LateRestore. */
 	char *heap = cbmem_add(CBMEM_ID_RESUME_SCRATCH, HIGH_MEMORY_SCRATCH);
@@ -107,5 +67,3 @@ AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock)
 
 	return AGESA_SUCCESS;
 }
-
-#endif /* ENV_RAMSTAGE */