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/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/ {
named-gpios {
compatible = "named-gpios";
lid_open: lid_open {
gpios = <&gpiod 2 GPIO_INPUT>;
enum-name = "GPIO_LID_OPEN";
label = "LID_OPEN";
};
gsc_ec_pwr_btn_odl: power_btn {
gpios = <&gpio0 1 GPIO_INPUT>;
enum-name = "GPIO_POWER_BUTTON_L";
label = "GSC_EC_PWR_BTN_ODL";
};
wp_l {
gpios = <&gpioa 1 GPIO_INPUT>;
enum-name = "GPIO_WP_L";
label = "EC_WP_ODL";
};
ec_chg_led_y_c1 {
gpios = <&gpioc 3 GPIO_OUT_LOW>;
enum-name = "GPIO_EC_CHG_LED_Y_C1";
label = "EC_CHG_LED_Y_C1";
};
ec_chg_led_b_c1 {
gpios = <&gpioc 4 GPIO_OUT_LOW>;
enum-name = "GPIO_EC_CHG_LED_B_C1";
label = "EC_CHG_LED_B_C1";
};
packet_mode_en {
gpios = <&gpio7 5 GPIO_OUT_LOW>;
enum-name = "GPIO_PACKET_MODE_EN";
label = "EC_GSC_PACKET_MODE";
};
acok_od: acok_od {
gpios = <&gpio0 0 GPIO_INPUT>;
enum-name = "GPIO_AC_PRESENT";
label = "ACOK_OD";
};
ec_kso_02_inv {
gpios = <&gpio1 7 GPIO_OUT_LOW>;
enum-name = "GPIO_KBD_KSO2";
label = "EC_KSO_02_INV";
};
pch_wake_odl {
gpios = <&gpioc 0 GPIO_ODR_HIGH>;
enum-name = "GPIO_EC_PCH_WAKE_ODL";
label = "EC_PCH_WAKE_R_ODL";
};
pch_int_odl {
gpios = <&gpiob 0 GPIO_ODR_HIGH>;
enum-name = "GPIO_EC_INT_L";
label = "EC_PCH_INT_ODL";
};
pg_ec_dsw_pwrok {
gpios = <&gpioc 7 GPIO_INPUT>;
enum-name = "GPIO_PG_EC_DSW_PWROK";
label = "PG_EC_DSW_PWROK";
};
en_s5_rails {
gpios = <&gpiob 6 GPIO_OUT_LOW>;
enum-name = "GPIO_EN_S5_RAILS";
label = "EN_S5_RAILS";
};
sys_rst_odl {
gpios = <&gpioc 5 GPIO_ODR_HIGH>;
enum-name = "GPIO_SYS_RESET_L";
label = "SYS_RST_ODL";
};
pg_ec_rsmrst_odl {
gpios = <&gpioe 2 GPIO_INPUT>;
enum-name = "GPIO_PG_EC_RSMRST_ODL";
label = "PG_EC_RSMRST_ODL";
};
ec_pch_rsmrst_odl {
gpios = <&gpioa 6 GPIO_OUT_LOW>;
enum-name = "GPIO_PCH_RSMRST_L";
label = "EC_PCH_RSMRST_ODL";
};
pg_ec_all_sys_pwrgd {
gpios = <&gpiof 4 GPIO_INPUT>;
enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD";
label = "PG_EC_ALL_SYS_PWRGD";
};
slp_s0_l {
gpios = <&gpiod 5 GPIO_INPUT>;
enum-name = "GPIO_PCH_SLP_S0_L";
label = "SLP_S0_L";
};
slp_s3_l {
gpios = <&gpioa 5 GPIO_INPUT>;
enum-name = "GPIO_PCH_SLP_S3_L";
label = "SLP_S3_L";
};
vccst_pwrgd_od {
gpios = <&gpioa 4 GPIO_ODR_LOW>;
enum-name = "GPIO_VCCST_PWRGD_OD";
label = "VCCST_PWRGD_OD";
};
ec_prochot_odl {
gpios = <&gpio6 3 GPIO_ODR_HIGH>;
enum-name = "GPIO_CPU_PROCHOT";
label = "EC_PROCHOT_ODL";
};
ec_pch_pwr_btn_odl {
gpios = <&gpioc 1 GPIO_ODR_HIGH>;
enum-name = "GPIO_PCH_PWRBTN_L";
label = "EC_PCH_PWR_BTN_ODL";
};
slp_sus_l {
gpios = <&gpiof 1 GPIO_INPUT>;
enum-name = "GPIO_SLP_SUS_L";
label = "SLP_SUS_L";
};
pch_pwrok {
gpios = <&gpio7 2 GPIO_OUT_LOW>;
enum-name = "GPIO_PCH_PWROK";
label = "PCH_PWROK";
};
ec_pch_sys_pwrok {
gpios = <&gpio3 7 GPIO_OUT_LOW>;
enum-name = "GPIO_EC_PCH_SYS_PWROK";
label = "EC_PCH_SYS_PWROK";
};
imvp9_vrrdy_od {
gpios = <&gpio4 3 GPIO_INPUT>;
enum-name = "GPIO_IMVP9_VRRDY_OD";
label = "IMVP9_VRRDY_OD";
};
ec_edp_bl_en {
gpios = <&gpiod 3 GPIO_OUT_HIGH>;
enum-name = "GPIO_ENABLE_BACKLIGHT";
label = "EC_EDP_BL_EN";
};
ec_prochot_in_l {
gpios = <&gpiof 0 GPIO_INPUT>;
enum-name = "GPIO_EC_PROCHOT_IN_L";
label = "EC_PROCHOT_IN_L";
};
};
hibernate-wake-pins {
compatible = "cros-ec,hibernate-wake-pins";
wakeup-pins = <
&acok_od
&gsc_ec_pwr_btn_odl
&lid_open
>;
};
};
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