summaryrefslogtreecommitdiff
path: root/common/pmu_tps65090.c
blob: e6e67a1ead7499c4fab1b786dd90421b8458166e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 *
 * TI TPS65090 PMU driver.
 */

#include "clock.h"
#include "console.h"
#include "common.h"
#include "hooks.h"
#include "i2c.h"
#include "pmu_tpschrome.h"
#include "task.h"
#include "timer.h"
#include "util.h"

#define CPUTS(outstr) cputs(CC_CHARGER, outstr)
#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args)

#define TPS65090_I2C_ADDR 0x90

#define IRQ1_REG 0x00
#define IRQ2_REG 0x01
#define IRQ1MASK 0x02
#define IRQ2MASK 0x03
#define CG_CTRL0 0x04
#define CG_CTRL1 0x05
#define CG_CTRL2 0x06
#define CG_CTRL3 0x07
#define CG_CTRL4 0x08
#define CG_CTRL5 0x09
#define CG_STATUS1 0x0a
#define CG_STATUS2 0x0b
#define DCDC1_CTRL 0x0c
#define DCDC2_CTRL 0x0d
#define DCDC3_CTRL 0x0e
#define FET1_CTRL 0x0f
#define FET2_CTRL 0x10
#define FET3_CTRL 0x11
#define FET4_CTRL 0x12
#define FET5_CTRL 0x13
#define FET6_CTRL 0x14
#define FET7_CTRL 0x15
#define AD_CTRL 0x16
#define AD_OUT1 0x17
#define AD_OUT2 0x18
#define TPSCHROME_VER 0x19

/* Charger control */
#define CG_EN               (1 << 0)
#define CG_EXT_EN           (1 << 1)
#define CG_FASTCHARGE_SHIFT 2
#define CG_FASTCHARGE_MASK  (7 << CG_FASTCHARGE_SHIFT)

/* Charger termination voltage/current */
#define CG_VSET_SHIFT   3
#define CG_VSET_MASK    (3 << CG_VSET_SHIFT)
#define CG_ISET_SHIFT   0
#define CG_ISET_MASK    (7 << CG_ISET_SHIFT)
#define CG_NOITERM      (1 << 5)
#define CG_TSET_SHIFT   5
#define CG_TSET_MASK    (7 << CG_TSET_SHIFT)

/* A temperature threshold to force charger hardware error */
#define CG_TEMP_THRESHOLD_ERROR 0


/* IRQ events */
#define EVENT_VACG    (1 << 1) /* AC voltage good */
#define EVENT_VSYSG   (1 << 2) /* System voltage good */
#define EVENT_VBATG   (1 << 3) /* Battery voltage good */
#define EVENT_CGACT   (1 << 4) /* Charging status */
#define EVENT_CGCPL   (1 << 5) /* Charging complete */

/* Charger alarm */
#define CHARGER_ALARM 3

/* FET control register bits */
#define FET_CTRL_ENFET   (1 << 0)
#define FET_CTRL_ADENFET (1 << 1)
#define FET_CTRL_PGFET   (1 << 4)

#define FET_CTRL_BASE (FET1_CTRL - 1)

void __board_hard_reset(void)
{
	CPRINTF("This board is not capable of a hard reset.\n");
}
void board_hard_reset(void)
	__attribute__((weak, alias("__board_hard_reset")));

/* Charger temperature threshold table */
static const uint8_t const pmu_temp_threshold[] = {
	1, /* 0b001,  0 degree C */
	2, /* 0b010, 10 degree C */
	5, /* 0b101, 45 degree C */
	7, /* 0b111, 60 degree C */
};

/* Read all tps65090 interrupt events */
static int pmu_get_event(int *event)
{
	static int prev_event;
	int rv;
	int irq1, irq2;

	pmu_clear_irq();

	rv = pmu_read(IRQ1_REG, &irq1);
	if (rv)
		return rv;
	rv = pmu_read(IRQ2_REG, &irq2);
	if (rv)
		return rv;

	*event = irq1 | (irq2 << 8);

	if (prev_event != *event) {
		CPRINTF("pmu event: %016b\n", *event);
		prev_event = *event;
	}

	return EC_SUCCESS;
}

/* Clear tps65090 irq */
int pmu_clear_irq(void)
{
	return pmu_write(IRQ1_REG, 0);
}

/* Read/write tps65090 register */
int pmu_read(int reg, int *value)
{
	return i2c_read8(I2C_PORT_CHARGER, TPS65090_I2C_ADDR, reg, value);
}

int pmu_write(int reg, int value)
{
	return i2c_write8(I2C_PORT_CHARGER, TPS65090_I2C_ADDR, reg, value);
}

/**
 * Read tpschrome version
 *
 * @param version       output value of tpschrome version
 */
int pmu_version(int *version)
{
	return pmu_read(TPSCHROME_VER, version);
}

int pmu_is_charger_alarm(void)
{
	int status;

	/**
	 * if the I2C access to the PMU fails, we consider the failure as
	 * non-critical and wait for the next read without send the alert.
	 */
	if (!pmu_read(CG_STATUS1, &status) && (status & CHARGER_ALARM))
		return 1;
	return 0;
}

int pmu_get_power_source(int *ac_good, int *battery_good)
{
	int rv, event = 0;

	rv = pmu_get_event(&event);
	if (rv)
		return rv;

	if (ac_good)
		*ac_good = event & EVENT_VACG;
	if (battery_good)
		*battery_good = event & EVENT_VBATG;

	return EC_SUCCESS;
}

/**
 * Enable charger's charging function
 *
 * When enable, charger ignores external control and charge the
 * battery directly. If EC wants to contorl charging, set the flag
 * to 0.
 */
int pmu_enable_charger(int enable)
{
	int rv;
	int reg;

	rv = pmu_read(CG_CTRL0, &reg);
	if (rv)
		return rv;

	if (enable)
		reg |= CG_EN;
	else
		reg &= ~CG_EN;

	return pmu_write(CG_CTRL0, reg);
}

/**
 * Set external charge enable pin
 *
 * @param enable        boolean, set 1 to eanble external control
 */
int pmu_enable_ext_control(int enable)
{
	int rv;
	int reg;

	rv = pmu_read(CG_CTRL0, &reg);
	if (rv)
		return rv;

	if (enable)
		reg |= CG_EXT_EN;
	else
		reg &= ~CG_EXT_EN;

	return pmu_write(CG_CTRL0, reg);
}

/**
 * Set fast charge timeout
 *
 * @param timeout         enum FASTCHARGE_TIMEOUT
 */
int pmu_set_fastcharge(enum FASTCHARGE_TIMEOUT timeout)
{
	int rv;
	int reg;

	rv = pmu_read(CG_CTRL0, &reg);
	if (rv)
		return rv;

	reg &= ~CG_FASTCHARGE_MASK;
	reg |= (timeout << CG_FASTCHARGE_SHIFT) & CG_FASTCHARGE_MASK;

	return pmu_write(CG_CTRL0, reg);
}

/**
 * Set termination current for temperature ranges
 *
 * @param range           T01 T12 T23 T34 T40
 * @param current         enum termination current, I0250 == 25.0%:
 *                        I0000 I0250 I0375 I0500 I0625 I0750 I0875 I1000
 */
int pmu_set_term_current(enum TPS_TEMPERATURE_RANGE range,
		enum TPS_TERMINATION_CURRENT current)
{
	int rv;
	int reg_val;

	rv = pmu_read(CG_CTRL1 + range, &reg_val);
	if (rv)
		return rv;

	reg_val &= ~CG_ISET_MASK;
	reg_val |= current << CG_ISET_SHIFT;

	return pmu_write(CG_CTRL1 + range, reg_val);
}

/**
 * Set termination voltage for temperature ranges
 *
 * @param range           T01 T12 T23 T34 T40
 * @param voltage         enum termination voltage, V2050 == 2.05V:
 *                        V2000 V2050 V2075 V2100
 */
int pmu_set_term_voltage(enum TPS_TEMPERATURE_RANGE range,
		enum TPS_TERMINATION_VOLTAGE voltage)
{
	int rv;
	int reg_val;

	rv = pmu_read(CG_CTRL1 + range, &reg_val);
	if (rv)
		return rv;

	reg_val &= ~CG_VSET_MASK;
	reg_val |= voltage << CG_VSET_SHIFT;

	return pmu_write(CG_CTRL1 + range, reg_val);
}

/**
 * Set temperature threshold
 *
 * @param temp_n          TSET_T1 to TSET_T4
 * @param value           0b000 ~ 0b111, temperature threshold
 */
int pmu_set_temp_threshold(enum TPS_TEMPERATURE temp_n, uint8_t value)
{
	int rv;
	int reg_val;

	/*
	 * Temperature threshold T1 to T4 are stored in TPSCHROME registers
	 * CG_CTRL1 to CG_CTRL4.
	 */
	rv = pmu_read(CG_CTRL1 + temp_n, &reg_val);
	if (rv)
		return rv;

	reg_val &= ~CG_TSET_MASK;
	reg_val |= (value << CG_TSET_SHIFT) & CG_TSET_MASK;

	return pmu_write(CG_CTRL1 + temp_n, reg_val);
}

/**
 * Force charger into error state, turn off charging and blinks charging LED
 *
 * @param enable          true to turn off charging and blink LED
 * @return                EC_SUCCESS for success
 */
int pmu_blink_led(int enable)
{
	int rv;
	enum TPS_TEMPERATURE t;
	uint8_t threshold;

	for (t = TSET_T1; t <= TSET_T4; t++) {
		if (enable)
			threshold = CG_TEMP_THRESHOLD_ERROR;
		else
			threshold = pmu_temp_threshold[t];

		rv = pmu_set_temp_threshold(t, threshold);
		if (rv) {
			/* Retry */
			rv = pmu_set_temp_threshold(t, threshold);
			if (rv)
				return rv;
		}
	}

	return EC_SUCCESS;
}

/**
 * Enable low current charging
 *
 * @param enable         enable/disable low current charging
 */
int pmu_low_current_charging(int enable)
{
	int rv;
	int reg_val;

	rv = pmu_read(CG_CTRL5, &reg_val);
	if (rv)
		return rv;

	if (enable)
		reg_val |= CG_NOITERM;
	else
		reg_val &= ~CG_NOITERM;

	return pmu_write(CG_CTRL5, reg_val);
}

int pmu_enable_fet(int fet_id, int enable, int *power_good)
{
	int rv, reg;
	int reg_offset;

	reg_offset = FET_CTRL_BASE + fet_id;

	rv = pmu_read(reg_offset, &reg);
	if (rv)
		return rv;
	if (enable)
		reg |= FET_CTRL_ADENFET | FET_CTRL_ENFET;
	else
		reg &= ~FET_CTRL_ENFET;

	rv = pmu_write(reg_offset, reg);
	if (rv)
		return rv;

	if (power_good) {
		rv = pmu_read(reg_offset, &reg);
		if (rv)
			return rv;
		*power_good = reg & FET_CTRL_PGFET;
	}

	return EC_SUCCESS;
}

void pmu_irq_handler(enum gpio_signal signal)
{
#ifdef CONFIG_AC_POWER_STATUS
	gpio_set_level(GPIO_AC_STATUS, board_get_ac());
#endif
	pmu_task_throttled_wake();
	CPRINTF("Charger IRQ received.\n");
}

int pmu_shutdown(void)
{
	int offset, failure = 0;

	/* Disable each of the DCDCs */
	for (offset = DCDC1_CTRL; offset <= DCDC3_CTRL; offset++) {
		if (!failure)
			failure = pmu_write(offset, 0x0e);
	}
	/* Disable each of the FETs */
	for (offset = FET1_CTRL; offset <= FET7_CTRL; offset++) {
		if (!failure)
			failure = pmu_write(offset, 0x02);
	}
	/* Clearing AD controls/status */
	if (!failure)
		failure = pmu_write(AD_CTRL, 0x00);

	return failure ? EC_ERROR_UNKNOWN : EC_SUCCESS;
}

/*
 * Fill all of the pmu registers with known good values, this allows the
 * pmu to recover by rebooting the system if its registers were trashed.
 */
static void pmu_init_registers(void)
{
	const struct {
		uint8_t index;
		uint8_t value;
	} reg[] = {
		{IRQ1MASK, 0x00},
		{IRQ2MASK, 0x00},
		{CG_CTRL0, 0x02},
		{CG_CTRL1, 0x20},
		{CG_CTRL2, 0x4b},
		{CG_CTRL3, 0xbf},
		{CG_CTRL4, 0xf3},
		{CG_CTRL5, 0xc0},
		{DCDC1_CTRL, 0x0e},
		{DCDC2_CTRL, 0x0e},
		{DCDC3_CTRL, 0x0e},
		{FET1_CTRL, 0x02},
		{FET2_CTRL, 0x02},
		{FET3_CTRL, 0x02},
		{FET4_CTRL, 0x02},
		{FET5_CTRL, 0x02},
		{FET6_CTRL, 0x02},
		{FET7_CTRL, 0x02},
		{AD_CTRL, 0x00},
		{IRQ1_REG, 0x00}
	};
	uint8_t i;

	/*
	 * Write all PMU registers.  Ignore return value from pmu_write()
	 * because there's nothing we can reasonably do if it fails.
	 */
	for (i = 0; i < ARRAY_SIZE(reg); i++)
		pmu_write(reg[i].index, reg[i].value);
}
DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, pmu_init_registers, HOOK_PRIO_DEFAULT);

void pmu_init(void)
{
	int failure = 0, retries_remaining = 3;

	while (--retries_remaining >= 0) {
		failure = 0;
#ifdef CONFIG_PMU_BOARD_INIT
		if (!failure)
			failure = board_pmu_init();
#else
		/* Init configuration
		 *   Fast charge timer    : 2 hours
		 *   Charger              : disable
		 *   External pin control : enable
		 *
		 * TODO: move settings to battery pack specific init
		 */
		if (!failure)
			failure = pmu_write(CG_CTRL0, 2);
		/* Limit full charge current to 50%
		 * TODO: remove this temporary hack.
		 */
		if (!failure)
			failure = pmu_write(CG_CTRL3, 0xbb);
#endif
		/* Enable interrupts */
		if (!failure) {
			failure = pmu_write(IRQ1MASK,
					EVENT_VACG  | /* AC voltage good */
					EVENT_VSYSG | /* System voltage good */
					EVENT_VBATG | /* Battery voltage good */
					EVENT_CGACT | /* Charging status */
					EVENT_CGCPL); /* Charging complete */
		}
		if (!failure)
			failure = pmu_write(IRQ2MASK, 0);
		if (!failure)
			failure = pmu_clear_irq();

		/* Enable charger interrupt. */
		if (!failure)
			failure = gpio_enable_interrupt(GPIO_CHARGER_INT);

#ifdef CONFIG_AC_POWER_STATUS
		if (!failure)
			failure = gpio_set_flags(GPIO_AC_STATUS, GPIO_OUT_HIGH);
#endif

		/* Exit the retry loop if there was no failure */
		if (!failure)
			break;
	}

	if (failure)
		board_hard_reset();
}

/* Initializes PMU when power is turned on.  This is necessary because the TPS'
 * 3.3V rail is not powered until the power is turned on. */
static void pmu_chipset_startup(void)
{
	pmu_init();
}
DECLARE_HOOK(HOOK_CHIPSET_STARTUP, pmu_chipset_startup, HOOK_PRIO_DEFAULT);

#ifdef CONFIG_CMD_PMU
static int print_pmu_info(void)
{
	int reg, ret;
	int value;

	ccprintf("     ");
	for (reg = 0; reg <= 0x18; reg++)
		ccprintf("%02x ", reg);
	ccprintf("\n");

	ccprintf("PMU: ");
	for (reg = 0; reg <= 0x18; reg++) {
		ret = pmu_read(reg, &value);
		if (ret)
			return ret;
		ccprintf("%02x ", value);
	}
	ccputs("\n");

	return 0;
}

static int command_pmu(int argc, char **argv)
{
	int repeat = 1;
	int rv = 0;
	int loop;
	int value;
	char *e;

	if (argc > 1) {
		repeat = strtoi(argv[1], &e, 0);
		if (*e) {
			if (strlen(argv[1]) >= 1 && argv[1][0] == 'r') {
				board_hard_reset();
				/* If this returns, there was an error */
				return EC_ERROR_UNKNOWN;
			}

			ccputs("Invalid repeat count\n");
			return EC_ERROR_INVAL;
		}
	}

	for (loop = 0; loop < repeat; loop++) {
		rv = print_pmu_info();
		usleep(1000);
	}

	rv = pmu_read(IRQ1_REG, &value);
	if (rv)
		return rv;
	CPRINTF("pmu events b%08b\n", value);
	CPRINTF("ac gpio    %d\n", board_get_ac());

	if (rv)
		ccprintf("Failed - error %d\n", rv);

	return rv ? EC_ERROR_UNKNOWN : EC_SUCCESS;
}
DECLARE_CONSOLE_COMMAND(pmu, command_pmu,
			"<repeat_count|reset>",
			"Print PMU info or force a hard reset",
			NULL);
#endif