summaryrefslogtreecommitdiff
path: root/chip/ish/gpio.c
blob: ca0f8250c093cb1ca37ed7a14c7287a0ffe32abe (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
/* Copyright (c) 2016 The Chromium OS Authors. All rights reserved.
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 */

/* GPIO module for ISH */

#include "common.h"
#include "gpio.h"
#include "hooks.h"
#include "registers.h"
#include "system.h"
#include "task.h"
#include "timer.h"
#include "util.h"

#define ISH_TOTAL_GPIO_PINS 8

test_mockable int gpio_get_level(enum gpio_signal signal)
{
	return  !!(ISH_GPIO_GPLR & gpio_list[signal].mask);
}

void gpio_set_level(enum gpio_signal signal, int value)
{
	const struct gpio_info *g = gpio_list + signal;
	if (value)
		ISH_GPIO_GPSR |= g->mask;
	else
		ISH_GPIO_GPCR |= g->mask;
}

void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
{
	/* GPSR/GPCR Output high/low */
	if (flags & GPIO_HIGH) /* Output high */
		ISH_GPIO_GPSR |= mask;
	else if (flags & GPIO_LOW)  /* output low */
		ISH_GPIO_GPCR |= mask;

	/* GPDR pin direction 1 = output, 0 = input*/
	if (flags & GPIO_OUTPUT)
		ISH_GPIO_GPDR |= mask;
	else /* GPIO_INPUT or un-configured */
		ISH_GPIO_GPDR &= ~mask;

	/* GRER/GFER interrupt trigger */
#ifdef CHIP_FAMILY_ISH3
	/* ISH 3 can't support both rising and falling edge */
	if (((flags & GPIO_INT_F_RISING) && (flags & GPIO_INT_F_FALLING)) ||
		((flags & GPIO_INT_F_HIGH) && (flags & GPIO_INT_F_LOW))) {
		ccprintf("ISH 2/3 not support both rising&falling edge\n");
	}
#endif
	/* Interrupt is asserted on rising edge/active high */
	if (flags & GPIO_INT_F_RISING)
		ISH_GPIO_GRER |= mask;
	else
		ISH_GPIO_GRER &= ~mask;

	/* Interrupt is asserted on falling edge/active low */
	if (flags & GPIO_INT_F_FALLING)
		ISH_GPIO_GFER |= mask;
	else
		ISH_GPIO_GFER &= ~mask;
}

int gpio_enable_interrupt(enum gpio_signal signal)
{
	const struct gpio_info *g = gpio_list + signal;

	ISH_GPIO_GIMR |= g->mask;
	return EC_SUCCESS;
}

int gpio_disable_interrupt(enum gpio_signal signal)
{
	const struct gpio_info *g = gpio_list + signal;

	ISH_GPIO_GIMR &= ~g->mask;
	return EC_SUCCESS;
}

int gpio_clear_pending_interrupt(enum gpio_signal signal)
{
	const struct gpio_info *g = gpio_list + signal;

	ISH_GPIO_GISR = g->mask;
	return EC_SUCCESS;
}

void gpio_pre_init(void)
{
	int i;
	int flags;
	int is_warm = system_is_reboot_warm();
	const struct gpio_info *g = gpio_list;

	for (i = 0; i < GPIO_COUNT; i++, g++) {

		flags = g->flags;

		if (flags & GPIO_DEFAULT)
			continue;

		/*
		 * If this is a warm reboot, don't set the output levels
		 * or we'll shut off the AP.
		 */
		if (is_warm)
			flags &= ~(GPIO_LOW | GPIO_HIGH);

		gpio_set_flags_by_mask(g->port, g->mask, flags);
	}
}

static void gpio_init(void)
{
	task_enable_irq(ISH_GPIO_IRQ);
}

static void gpio_interrupt(void)
{
	int i;
	const struct gpio_info *g = gpio_list;
	uint32_t gisr = ISH_GPIO_GISR;
	uint32_t gimr = ISH_GPIO_GIMR;

	/* mask off any not enabled pins */
	gisr &= gimr;

	for (i = 0; i < GPIO_IH_COUNT; i++, g++) {
		if (gisr & g->mask) {
			/* write 1 to clear interrupt status bit */
			ISH_GPIO_GISR = g->mask;
			gpio_irq_handlers[i](i);
		}
	}
}

DECLARE_IRQ(ISH_GPIO_IRQ, gpio_interrupt);

DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT);