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* zephyr: Extend JHL8040R DTS node to support USB-C mux configurationTomasz Michalec2022-06-0312-96/+152
| | | | | | | | | | | | | | | | | | | JHL8040R is BB retimer. Add necessary changes to make it possible to configure BB retimer as USB-C mux using a devicetree. Add code to generate bb_controls array with entry for every BB retimer in USB-C muxes chain. Align adlrvp and brya DTS to new banding of JHL8040R. BUG=b:229411952 TEST=zmake testall BRANCH=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I339f09d5f259dea88c9a783290744162a94d9559 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3607989 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Tomasz Michalec <tmichalec@google.com> Tested-by: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: move Nissa USB mux configuration into the DTSTomasz Michalec2022-06-039-65/+63
| | | | | | | | | | | | | | | | | Move Nissa boards (Nivviks, Craask, and Nereid) USB mux configuration into the devicetree. BUG=b:227757117 TEST=zmake testall BRANCH=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I988603bcc847ce9aae4fd0b86506659066577832 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3593790 Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Tomasz Michalec <tmichalec@google.com> Commit-Queue: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Andrew McRae <amcrae@google.com>
* zephyr: Add ANX7483 USB-C mux DTS configurationTomasz Michalec2022-06-033-0/+50
| | | | | | | | | | | | | | | | Add necessary changes to make it possible to configure an ANX7483 USB-C mux using a devicetree. BUG=b:227757117 TEST=zmake testall BRANCH=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I3ecc3dc66d2269905b19f7b1db44db5d8ca6df3c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3593789 Tested-by: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Tomasz Michalec <tmichalec@google.com>
* zephyr: Add choice for TUSB type in KconfigTomasz Michalec2022-06-034-11/+34
| | | | | | | | | | | | | | | | | TUSB1064 USB-C mux driver can work only with one TUSB type at the same time. Allowed types are TUSB1064. TUSB1044, and TUSB546. It makes sense to introduce PLATFORM_EC_USB_MUX_TUSB_TYPE in Kconfig.usb_mux BUG=none TEST=zmake testall BRANCH=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I7bc583811bce718451d137f09dbe5f20be963f3e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3579120 Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Tomasz Michalec <tmichalec@google.com> Commit-Queue: Tomasz Michalec <tmichalec@google.com>
* zephyr: shim: add single charge task supportFabio Baltieri2022-06-036-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | Add an option to run the charger code in a single task. This is enabled by default in Zephyr builds, but explicitly disabled for a couple of platforms that currently have task dependent board code. Should be enough to start testing the configuration, will work on handling the remaining boards (corsola and nissa) later. BRANCH=none BUG=b:226411332 TEST=make buildall TEST=zmake testall TEST=cq dry run TEST=run on Brya, connect/disconnect usb devices Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I75a63f7b0a9545e6c824114de7f81b71924e0789 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3663748 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aaron Massey <aaronmassey@google.com>
* nereid: bring charger out of LPM on S0 entryPeter Marheine2022-06-031-0/+47
| | | | | | | | | | | | | | This appears to fix VBUS sourcing, though we don't understand why. It may also prevent charger damage with as-yet-unexplained cause. BUG=b:231920135,b:230712704 TEST=VBUS sourcing works when AP is in S0 BRANCH=none Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: Ia4d74f4211eb97b532882914d077e3dde5e59f64 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3686012 Reviewed-by: Andrew McRae <amcrae@google.com>
* zephyr: herobrine: Define battery-level property as int rangeParth Malkan2022-06-031-4/+8
| | | | | | | | | | | | | | | | Currently battery-level property is defined using enums. This patch changes this to use int range instead. BRANCH=None BUG=b:233953617 TEST=Manual test on Lazor by modifying nodes to include battery-level range, use battfake to set different levels and observe LED behavior. Cq-Depend: chromium:3669088 Signed-off-by: Parth Malkan <parthmalkan@google.com> Change-Id: I18ef922a41ce17d509f03a1774e9d9437fc7065d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3669089 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: LED: Define battery-level property as int rangeParth Malkan2022-06-033-18/+44
| | | | | | | | | | | | | | | | Currently battery-level property is defined using enums. This patch changes this to use int range instead. BRANCH=None BUG=b:233953617 TEST=Manual test on Lazor by modifying nodes to include battery-level range, use battfake to set different levels and observe LED behavior. Cq-Depend: chromium:3669089, chromium:3669090 Signed-off-by: Parth Malkan <parthmalkan@google.com> Change-Id: Idfe516addfe20d5141e5106afd338b49f10a6349 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3669088 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: skyrim: Define battery-level property as int rangeParth Malkan2022-06-031-2/+6
| | | | | | | | | | | | | | | | Currently battery-level property is defined using enums. This patch changes this to use int range instead. BRANCH=None BUG=b:233953617 TEST=Manual test on Lazor by modifying nodes to include battery-level range, use battfake to set different levels and observe LED behavior. Cq-Depend: chromium:3669088 Signed-off-by: Parth Malkan <parthmalkan@google.com> Change-Id: I502b7a85420b0c017494739a977c468fd009dfde Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3669090 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* USB mux: Add CONFIG for AP driven mux controlDiana Z2022-06-022-0/+12
| | | | | | | | | | | | | | Add a CONFIG option to support the AP directing mux and retimer sets. BRANCH=None BUG=b:208882941,b:155889939 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic42e256126f68684bbfdd27654f41c0e5290caf9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3687076 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr:test: Resolve linker conflict with gpio_ledAl Semjonovs2022-06-021-1/+1
| | | | | | | | | | | | | | LOG module caused linker conflict with gpio_led when compiling test-drivers BUG=b:233607287 BRANCH=NONE TEST=zmake testall Signed-off-by: Al Semjonovs <asemjonovs@google.com> Change-Id: Ie319efe92a1b26a2c1b1294faf333f29db573edd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3687094 Reviewed-by: Aaron Massey <aaronmassey@google.com>
* zephyr: npcx: update SHI driver for pinctrlKeith Short2022-06-029-17/+71
| | | | | | | | | | | | | | | | | | | Update the Nuvoton cros_shi_npcx driver to use pinctrl instead of pinmux. This introduces a SHI specific pinctrl state to switch the SHI pins back to GPIO. BUG=b:232543902 BRANCH=none TEST=zmake testall TEST=verify herobrine boots to AP. Verify sysjump to RW works on herobrine. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ic66062d706738792ffffc5797637ae8a5d31593c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3646964 Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Sam Hurst <shurst@google.com>
* corsola: Create common host interface devicetreeKeith Short2022-06-022-1/+2
| | | | | | | | | | | | | | | Create a common devicetree file to setup the host interface for Corsola boards based on the Nuvoton NPCX chippset. BUG=none BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I11a0c6223cd2cd8666babe49154357ab025a9f23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3674032 Reviewed-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: npcx-cros-dbg: Update driver for pinctrlKeith Short2022-06-023-14/+31
| | | | | | | | | | | | | Update the npcx-cros-dbg driver for pinctrl support. BUG=b:232543902 BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I283982d44033ff600383c9ffd56e5f768716e75a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3646963 Reviewed-by: Yuval Peress <peress@google.com>
* task: change task_set_event return type to voidFabio Baltieri2022-06-021-3/+1
| | | | | | | | | | | | | | | No implementation does nothing other than return 0 on task_set_event(), change the return type to void so that the API is clear. BRANCH=none BUG=none TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I88b20f53aa6dffa291ce78f4776888b21985f57f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3683769 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: Remove cros_fwid from version outputRobert Zieba2022-06-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the ec version output prints the value of cros_fwid. However, this string isn't set up for zephyr and is in the process of being deprecated. This commit disables the Zephyr Kconfig for this feature by default. This is done instead of removing it to pass a CQ test that will fail because it identifies `CONFIG_CROS_FWID_VERSION` as an orphan config. Example EC console output: ``` 22-05-26 13:07:39.852 Chip: Nuvoton npcx9m3f 00160207 22-05-26 13:07:39.855 Board: 2 22-05-26 13:07:39.855 RO: skyrim_v3.1.49995-ec:15e362,os: 22-05-26 13:07:39.858 RW: skyrim_v3.1.49995-ec:15e362,os: 22-05-26 13:07:39.860 Build: skyrim_v3.1.49995-ec:15e362,os:<...> 22-05-26 13:07:39.868 2022-05-26 13:04:44 <...> ``` BRANCH=none BUG=b:232468323 TEST=Ran version command Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: Ic80efaec46f67b971ccdde0441538545d3321d20 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3671455 Reviewed-by: Diana Z <dzigterman@chromium.org>
* nissa: nivviks: Correct base form factor config.Andrew McRae2022-06-022-6/+7
| | | | | | | | | | | | | | Correct the nivviks form factor FW_CONFIG bit so that it is aligned with the Boxster config. BUG=b:233144358 TEST=zmake build nivviks; flash & run & check BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I6ed6f948e64e2624edd03d42889bd459e27fc95e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3686010 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* zephyr: override HOOK task priority in EC APP's default KconfigJun Lin2022-06-022-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Zephyr-EC application leverages the system workqueue thread to implement the hook task. By default, its priority level is the lowest cooperative priority and higher than any EC task. The priority is overridden to 24 (NUM_PREEMPT_PRIORITIES - 1) after the application starts to run for a while. Before it is changed, it violates the CROS-EC's principle (HOOK task's priority should be only higher than the IDLE task) and may cause unexpected behavior like #5 in b:230663570. This CL overrides the priority level in APP's default Kconfig and removes the runtime priority setting to make it consistent at level 24 all the time. BRANCH:none BUG=b:230663570 TEST= "zmake testall --clobber" TEST= the symptom in #5 is fixed Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: Ia4bfe4e657b299294024cffe6e07685324f56498 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3682979 Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* Zephyr: npcx: Add clock turbo mode for NPCX9Sam Hurst2022-06-011-0/+9
| | | | | | | | | | | | | Add clock turbo mode for NPCX9 BUG=b:230663570 BRANCH=none TEST=zmake testall Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: If3e3161b83ddd47c2123511c8fd269de4d246e7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3652223 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr:test: Add dock with power button test caseJameson Thies2022-06-013-1/+113
| | | | | | | | | | | | | | | | | | | | | | | This CL adds a dock with power button test case and updates the source emulator to support all the messages required for this currently enabled in TCPMV2. The new tests will notify a series of power state changes to the ec with hook_notify, and TCMPV2 will then have a Alert->Get_Status->Status transaction with the emulated partner. This test also includes a Get_Revision->Revision transaction with the partner to enable the 7-byte status message defined in USB PD Revision 3.1. BUG=b:232536412,b:233455723 BRANCH=NONE TEST=zmake test --coverage test-drivers --clobber Signed-off-by: Jameson Thies <jthies@google.com> Change-Id: Ide0d60e9a2f7e7098af545a70ab5c417acb5d934 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3680767 Reviewed-by: Tristan Honscheid <honscheid@google.com> Commit-Queue: Jameson Thies <jthies@google.com> Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Tested-by: Jameson Thies <jthies@google.com>
* kingler: update virtual-battery remote portEric Yilun Lin2022-06-011-1/+2
| | | | | | | | | | | | | | | | | | | | | To align to the kernel side update. Also, the origin selected remote port(remote 5 -> local 7) is happened to be conflicted with the I2C_PORT_EEPROM(5). I2C_PORT_EEPROM doesn't have a zephyr remote i2c port remap currently, so the accessing EEPROM from AP will access the physical port 5, and this will falsely access to local i2c port 7. BUG=b:214325092 TEST=pass firmware_ECCbiEEPRom BRANCH=none Change-Id: I29c53929226f1b39d715b48459a9a1dd7b65b9b0 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3670656 Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* steelix: enable USB-A1 portwen zhang2022-06-014-1/+19
| | | | | | | | | | | | | | enable the power control for USB-A1 port BUG=b:232050545 BRANCH=none TEST=the USB-A1 of steelix works well Change-Id: I89eb851f7f73e28b650372fe74cf1fac914dbcac Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3682982 Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* zephyr: add GPIO enum GPIO_EN_PP5000_USB_A1_VBUSwen zhang2022-06-011-0/+1
| | | | | | | | | | | | | | It's missing so add the enum. BUG=b:232050545 BRANCH=none TEST=the USB-A1 of steelix works well Change-Id: I5521b323efa0b336a0373593f88b0b342a4a7048 Signed-off-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3682986 Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* Zephyr: adlrvp: Implement custom LED behaviorRajesh Kumar2022-06-016-2/+274
| | | | | | | | | | | | | | | Implemented custom LED behavior for Intel RVP using PWM. BUG=none BRANCH=None TEST=zmake build adlrvp_npcx Observed LED behviour Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: Ieb391dfe0c23e7b27211f23485f2720f7ac40a73 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3654481 Reviewed-by: Sam Hurst <shurst@google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* zephyr: npcx: update kb raw driver for pinctrlKeith Short2022-05-316-104/+82
| | | | | | | | | | | | | | | Update the Nuvoton cros_kb_raw driver to use pinctrl instead of pinmux. BUG=b:232543902 BRANCH=none TEST=zmake testall TEST=verify keyboard on herobrine Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I1479d89c597d4d04b71507d63ecd4c42253f8bbf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3646962 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
* zephyr: ite: Use EC_SPI_RX_READY macroSam Hurst2022-05-311-1/+1
| | | | | | | | | | | | | | | | Using EC_SPI_RX_READY instead of EC_SPI_OLD_READY prevents the SDO line going high when the AP shuts down. BUG=b:216831450 BRANCH=none TEST=zmake testall Verified on scope that SHI_SDO does not pulse high during AP Shutdown Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I0ac0eeb26fdb558cfb6c9fc0dbfe61240e2195ff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3674596 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: npcx: Use EC_SPI_RX_READY macroSam Hurst2022-05-311-1/+1
| | | | | | | | | | | | | | | | Using EC_SPI_RX_READY instead of EC_SPI_OLD_READY prevents the SDO line going high when the AP shuts down. BUG=b:216831450 BRANCH=none TEST=zmake testall Verified on scope that SHI_SDO does not pulse high during AP Shutdown Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: Iab326967a45871df7f350c19f10290aa429b8ec5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3658008 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: defconfig: default to LEGACY_INCLUDE_PATH=nFabio Baltieri2022-05-311-0/+3
| | | | | | | | | | | | | | | Now that the code base compiles with LEGACY_INCLUDE_PATH=n, turn the option to no by default so that we won't add any more non prefixed include. BRANCH=none BUG=none TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: Ie95e79e659e755de869c8512d0bdfdc9523e1afa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3637580 Reviewed-by: Yuval Peress <peress@google.com>
* zephyr: fix few more legacy #includeFabio Baltieri2022-05-314-7/+7
| | | | | | | | | | | | | Fix few more #include lacking the zephyr/ prefix. BUG=none BRANCH=none TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I7c5f5d522d311a28bdda699f072a497b9016b4d3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3673074 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* sm5803: verify CHG_MON_REG settings when sinkingPeter Marheine2022-05-301-0/+4
| | | | | | | | | | | | | | | | | | | Incorrect settings for this register may be implicated in hardware damage that has been observed, so add a runtime check for correct configuration before enabling sinking. This should help debugging of issues that may be observed and prevent damage. CMD_CHARGER_DUMP is enabled on Nereid to assist in this investigation. BUG=b:230712704 TEST=zmake build nereid, `charger dump` on earlier nereid shows charger register 5C reading expected 7A. BRANCH=none Change-Id: If81ec544b7b26ec20316cb7bc92eaa1770b1da77 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3676613 Reviewed-by: Andrew McRae <amcrae@google.com>
* Nissa: Modify LED behavior for CraaskSue Chen2022-05-303-2/+52
| | | | | | | | | | | | | | | | | | | | LED behavior: Charge | Amber on Full charge | Blue on Discharge in S3 | Amber on 1sec off 3sec Discharge in S5 | Off Discharge in S0 | Blue on Battery Error | Amber on 1sec off 1sec Factory mode | Blue on 2sec Amber on 2sec BUG=b:232656911 BRANCH=none TEST=check LED status Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I8b6ab00888cc14127279e0414dd02dc2298810eb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3660004 Reviewed-by: Andrew McRae <amcrae@google.com>
* Nissa: Fix base rotation parameter for CraaskSue Chen2022-05-301-2/+2
| | | | | | | | | | | | | Set correct rotation parameter for Craask. BUG=none TEST=zmake build craask; lid angle is correct on Craask. BRANCH=none Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: Ide0eb9a2aa8acd502b986fc8dbdfaa2f2c787b56 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3670733 Reviewed-by: Andrew McRae <amcrae@google.com>
* usbc: wrap task_set_event to have an explicit port argumentFabio Baltieri2022-05-278-19/+19
| | | | | | | | | | | | | | | | | Define an explicit function to set events for the usb charger tasks, so that the caller is not coupled to the internal task implementation, and we can use a single task on a later patch. BRANCH=none BUG=b:226411332 TEST=make buildall TEST=zmake testall TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I7a1223642b800568bf4f9864f75b2b647c84d29f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3663746 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* zephyr: clean up ioex configsDawid Niedzwiecki2022-05-276-26/+6
| | | | | | | | | | | | | | | | | | In Zephyr, we treat IO expander pins as usual GPIO, thus the same GPIO API is used. There is no need to keep a separate config PLATFORM_EC_IOEX to support IO expander, when we use Zephyr drivers. Keep only PLATFORM_EC_IOEX_CROS_DRV config to enable support for CrosEC drivers for Zephyr builds. BUG=b:231086773, b:208181774 TEST=zmake testall && Make sure PD works on ports 0 and 2 on Brya BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I135cc1b5a58beb2f4e8bfa2384db6fdfd534a01e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3670275 Commit-Queue: Dawid Niedzwiecki <dawidn@google.com> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* nereid: fix the orientation matrix of the motion sensorWill Tsai2022-05-271-2/+2
| | | | | | | | | | | BUG=b:233717171, b:232059618 TEST=zmake build nereid BRANCH=none Signed-off-by: Will Tsai <will_tsai@wistron.corp-partner.google.com> Change-Id: I1752ad29c4bba7257cbe3f9f3b14aeb11e931f0a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3666759 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* zephr: Handle shutting the shell down via an asynch signalAndrew McRae2022-05-271-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To communicate with the GSC, the EC needs to shut down the shell and take control of the UART. Before shutting down the shell, the uart interrupts are disabled. To shut the shell down, a KILL signal is sent to the shell, and a callback is used to coordinate when it is shut down. Console output must then go through printk rather than shell_fprintf, otherwise there may be a deadlock during the shutdown (since zephyr_fprintf holds the shell context lock, and may be waiting for the output to complete). This stops the shell from processing the KILL signal. Add a flag that indicates the shell is to be shut down so that the deadlock can be avoided. Also remove calls to shell_process, which is called from the shell mainline under the context mutex. If input is to be processed, it should be done within the context of the shell triggered by the SHELL_SIGNAL_RXRDY signal. BUG=b:233309416 TEST=zmake build nivviks;flash & test BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I2187ac470c6e10b54540f357690f79aaa0576271 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3670625 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: Add Kconfig support for PLATFORM_EC_LED_PWM_TASK_DISABLEDRajesh Kumar2022-05-261-0/+9
| | | | | | | | | | | | | | | This Supports common PWM (Pulse Width Modulation) controlled LEDs that do not conform to the Chromium OS LED behavior specification. BUG=none BRANCH=none TEST=make buildall; zmake testall Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: I9b56fb7d17881a1cc1ff4a8cef789d542ee5865e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3657846 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* CCGXXF: Support enabling SBU FETsVijay Hiremath2022-05-262-1/+3
| | | | | | | | | | | | | | | | CCGXXF chip has SBU line port protection built inside the PD chip hence added code to enable/disable SBU FETs. To support the this vendor specific feature separated the CCGXXF driver structure from standard TCPCI driver. BUG=none BRANCH=none TEST=USB, DP, USB, TBT works on ADL-RVP Change-Id: I06af101f4efa228163dc0a673887bdc368dbd504 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3400678 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* tcpm: Support PD chips with SBU protectionVijay Hiremath2022-05-262-0/+12
| | | | | | | | | | | | | | | | | | | | | Some PD chips have integrated port protection for SBU lines and the switches to enable the SBU lines coming out of the PD chip are controlled by vendor specific registers. Hence, added the code in TCPM & driver skeleton in TCPCI to support those chips. By checking if the SBU enable function exists in TCPM driver before trying to enable the SBU from discrete PPC, this code supports co-existence of both PD based SBU protection and discrete PPC chip SBU protection in a same platform. BUG=none BRANCH=none TEST=make buildall -j, zmake testall Change-Id: I3d3a5eec9077df95c0eb91cf1a709cb79f36ca60 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3227374 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* usbc: cleanup: Abstract the TCPM control logicVijay Hiremath2022-05-261-0/+1
| | | | | | | | | | | | | | Abstract the TCPM control logic to support various combinations of TCPC chips that support built in PPC and OCP. BUG=none BRANCH=none TEST=make buildall -j, zmake testall Change-Id: I614797829d1d8f230439a70c1822c918f9fea1f3 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3661521 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Zephyr: Decrease USB_MUX task priorityDiana Z2022-05-261-6/+6
| | | | | | | | | | | | | | | | | The setting of USB muxes should be a mid-priority task. Mux sets need to be performed before an alternate mode can be entered, for example, but shouldn't take priority over the PD tasks. BRANCH=None BUG=b:231086773 TEST=on brya, ensure firmware_ECChargingState passes Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8fc7826ef2434aae567da19e1e0c3c6b1d410879 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3668649 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Brya: Enable the USB_MUX taskDiana Z2022-05-261-0/+1
| | | | | | | | | | | | | | | | | | The USB_MUX task is very helpful when interacting with mux sets which may take a long time, such as the virtual mux set. Enable this task for brya. BRANCH=None BUG=b:231086773 TEST=zmake build brya Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ifc10ee59520d4f0e043fcf1a39bd4c6ce9789ae6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3668648 Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Tested-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Skyrim: Reset TCPC IO expander after chip resetDiana Z2022-05-261-4/+14
| | | | | | | | | | | | | | | | | | The TCPC may be reset to get it out of dead battery mode, at which point we need to re-enable the IO expander ports. Note we're still waiting on an API in order to read and restore the values each port had from before the chip reset. BRANCH=None BUG=b:225189538 TEST=on skyrim, boot from hibernate and ensure A0 works as long as the reset was performed before entering S0 Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I61f07e5ad0d4e6bf1ff6ac65737394bcdb046b63 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3670352 Reviewed-by: Robert Zieba <robertzieba@google.com> Commit-Queue: Robert Zieba <robertzieba@google.com>
* charge_manager: add command vbusEric Yilun Lin2022-05-262-0/+11
| | | | | | | | | | | | | | | | | | vbus command prints VBUS voltage through the charge_manager_get_vbus_voltage() BUG=b:203739613 TEST=uart:~$ vbus VBUS C0 = 0 mV VBUS C1 = 12 mV BRANCH=none Change-Id: I43d6da19dfb8f2f2a2bd9f60537f8a319a00b634 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3397144 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* zephyr: brya: don't autoinit ioexpander pinsDawid Niedzwiecki2022-05-261-0/+7
| | | | | | | | | | | | | | | | | | The ioexpander chips are reset during TCPC initialization so the ioexpander pins have to be reconfigured anyway. There is no need to initialize them before the TCPC init. The change should speed up the GPIO initialization a little bit. BUG=b:231086773, b:208181774 TEST=Make sure PD works on ports 0 and 2 on Brya BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I1068bc792833db61b62a9bd0a4767620083ff617 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3656000 Commit-Queue: Fabio Baltieri <fabiobaltieri@google.com> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* zephyr: drop ioex_init for Zephyr ioex driversDawid Niedzwiecki2022-05-262-15/+1
| | | | | | | | | | | | | | | | | | | | | | | The ioex_init function has to reconfigure the ioexpander chip. For the Zephyr ioexpander driver, which is treated as a normal GPIO driver, means we have to configure every single pin from the ioexpander chip. Use the gpio_reset_port function for that purpose instead of ioex_init which bases on the ioex_config array(takes an index of the array as argument). This change allows reconfiguring ioexpnader pins e.g. after the ioexpander chip reset which is done during TCPC init for Brya board. BUG=b:231086773, b:208181774 TEST=zmake testall && Make sure PD works on ports 0 and 2 on Brya BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I8c446a4b35b03b9ed9574c6572a0daa80a9a7dee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3655999 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com> Commit-Queue: Fabio Baltieri <fabiobaltieri@google.com>
* kingler: Fix missing led_bat_state_table entrylschyi2022-05-261-0/+2
| | | | | | | | | | | | | | | | | STATE_DISCHARGE_S0_BAT_LOW entry is not included in kingler led battery table. Add this entry to fix the Undefined LED behavior for battery state message. BUG=b:219627728 TEST=make -j buildall BRANCH=none Signed-off-by: lschyi <lschyi@google.com> Change-Id: I9e115c75c833c51d27ac42154b57768ba927df30 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3670616 Tested-by: Sung-Chi Li <lschyi@chromium.org> Commit-Queue: Sung-Chi Li <lschyi@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* zephyr: gpio: add function to reset GPIO portDawid Niedzwiecki2022-05-261-0/+9
| | | | | | | | | | | | | | | | | | | There is a function to reset a pin to the default state. Add a new function to reset the whole port. The function can be used to e.g. reconfigure an ioexpander chip after reset. BUG=b:231086773, b:208181774 TEST=zmake testall BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I1149bbf05044f888f054692a0ddf7fcf13cfc617 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3645122 Commit-Queue: Dawid Niedzwiecki <dawidn@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* kingler: disable NX20P3483 LDOEric Yilun Lin2022-05-261-0/+11
| | | | | | | | | | | | | | | | | The SD LDOs are not used in kingler. Disable this to save 1mW in S3. BUG=b:230303809 TEST=i2c read I2C_USB_C0/1 0x72 0x0b output=0x1 BRANCH=none Change-Id: Ia5b46caf0130a8830d350e5830353389c5dbf505 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3607361 Tested-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* nereid: calibrate the orientation matrix of the motion sensorWill Tsai2022-05-251-5/+5
| | | | | | | | | | | | BUG=b:233717171, b:232059618 TEST=zmake build nereid BRANCH=none Signed-off-by: Will Tsai <will_tsai@wistron.corp-partner.google.com> Change-Id: I6db3a25abc0188791671c22ab9f611590eb6140b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3653756 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Andrew McRae <amcrae@google.com>
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