| Commit message (Collapse) | Author | Age | Files | Lines |
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This enables support for PSL wakeup pin configuration from
hibernate mode.
BUG=b:206676513
BRANCH=none
TEST=zmake configure -B ~/tmp/brya/ brya -b
TEST=Tested on brya, moving out of hibernate mode
by performing:
1. lid open
2. connecting charger to usb port
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: Ie880b099f8b68521443037d24b23483f0a2075b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3287464
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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In PR:39644, the SPI (FIU/UMA) driver is added to the Zephyr upstream.
The flash access now can be via the flash APIs in spi_nor driver,
including flash write/read/erase/read_jedec_id. Note that because
there is no API in the flash driver to read/write the status register,
it is implemented here via the spi_transceive API.
BRANCH=none
BUG=b:202295086
TEST=pass "zmake testall"
TEST=enable flash console command on volteer and npcx9_evb,
test the following flash related commands:
flashread/flashwrite/flasherase/flashwp/flashchip/flashinfo.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Cq-Depend: chromium:3261416
Change-Id: I012ea359695a22cbb54d39124b4b78ff95cca36d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3261447
Tested-by: CH Lin <chlin56@nuvoton.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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For context: this build was created so that we had a device that could
be publicly purchased to play with Zephyr on in January 2021. With a
little passage of time, we now have lazor, limozeen, and delbin as
well.
This build supports nothing other than power sequence to S0 (no
keyboard, battery, charging, etc.) so sadly it's hardly usable for
anything at the moment. Delete it so it does not create confusing
directory structure for how we want variants to be created.
BUG=b:193814903
BRANCH=none
TEST=zmake testall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ic0fa3099c19a484513b23c7826376604cf8d2f22
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271872
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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This drops the PWM_CH_DISPLIGHT define from the individual board pwm_map,
and replaces with a single reference to a named pwm labeled displight.
BRANCH=none
BUG=none
TEST=zmake testall
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change-Id: I17ca620097a4b0fd6907672e340415d1963740a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3245507
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This drops the PWM_CH_KBLIGHT define from the individual board pwm_map,
and replaces with a single reference to a named pwm labeled kblight.
BRANCH=none
BUG=b:177452529
TEST=zmake testall
TEST=build and run volteer
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change-Id: Ie474267b8f5d16cad7b8db2d202a5e971e417c1b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3245506
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This adopts the recently-added support for PI3USB9201 in Zephyr.
BUG=b:202397628
TEST=builds
BRANCH=None
Change-Id: I87c898a4d1296090c723c2802df7cf3a27991aee
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3246636
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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BUG=b:203267166, b:188605676
BRANCH=none
TEST=EC console command "adc" and "thermalget"
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: Ib0869b8da9be9434e9f17d60943fb043fa9cb3ec
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3229001
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Add Kconfigs to enable virtual battery and set virtual battery address.
Change named-i2c from I2C_PORT_VIRTUAL to I2C_PORT_VIRTUAL_BATTERY.
BRANCH=main
BUG=b:185480578
TEST=When virtual battery is enabled, compilation fails if no
virtual battery port is defined in device tree.
TEST=Enable virtual battery and verify that its handlers
are called properly.
Change-Id: Ic88da28dc443beb89a32868d201072f39abb3a86
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3207991
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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GPIO_RSMRST_L_PGOOD is also used as GPIO_PG_EC_RSMRST_ODL
creating redundancy. Removing it will help need for
redefinitions for zephyr.
Remove reference to GPIO_RSMRST_L_PGOOD in zephyr
BUG=b:200975143
BRANCH=main
TEST=make buildall -j, boot up on brya
Change-Id: Iff46595174c54db347b69cff3ad9e266ba9fd535
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3180808
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Upstream Zephyr now requires that both the I2C port and I2C controller
are explicitly enabled.
BUG=b:200292035
BRANCH=none
TEST=zmake testall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I32cae81567fc9420c293e06128653039a69f6d75
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3188562
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Thermistor drivers now query the device tree for configuration.
Thermistor tests have been updated to be parameterized
on all thermistors enabled in the device tree.
BRANCH=none
BUG=b:184374937
TEST= 1) zmake testall
2) make runhosttests
Cq-Depend: chromium:3161332
Signed-off-by: Aaron Massey <aaronmassey@chromium.org>
Change-Id: Ic5330cd5c33e79e192428ca857651de9a225856e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3133812
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Aaron Massey <aaronmassey@google.com>
Commit-Queue: Aaron Massey <aaronmassey@google.com>
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Explicitly enable all used I2C controllers. CL:3176841 disables the NPCX
I2C controllers by default to save flash and RAM space.
BUG=b:200292035
BRANCH=none
TEST=zmake testall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: If2bbfbaee2e8392040776a9c87f0464274a7f2dd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3177580
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Explicitly enable the I2C controller node that is used on each board
using the Nuvoton NPCX7 or NPCX9 chipset.
This is a no-op at the moment, but prepares for an upstream change that
will disable the I2C controller nodes by default.
BUG=b:200292035
BRANCH=none
TEST=zmake testall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I158ae44090a719ef20930350d89efd7903e6e531
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169389
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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BUG=b:195137794
BRANCH=none
TEST=uart works
Change-Id: Ib7e177cfd501f78afb6edf943f078466dca455a6
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168392
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Migrate the BBRAM driver to the upstream version.
BRANCH=none
BUG=b:195843756
TEST=zmake testall
Cq-Depend: chromium:3147080
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I441e58f94c4874e268aad36df2f036a88187801b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3147230
Tested-by: Yuval Peress <peress@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
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Change the RTC driver from the Zephyr MTC driver to
the Zephyr PCF85063A driver.
BRANCH=none
BUG=b:194710429
TEST=ectool rtcset 30000
ectool rtcget
Current time: 0x0000753d (30013)
ectool rtcsetalarm 10
after ~10 (measured with a timer) printed on
ec console: [160.248900 event set 0x0000000002000000]
I tested the alarm up to one hour.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6e6f8bb65cb515e0997687ff4beef7620506a57d
herorbrine_npcx9: Configure PCF85063A RTC Alert
Configure the PCF85063A RTC Alert pin so that
it can interrupt the EC on an alarm event.
BRANCH=none
BUG=b:194710429
TEST=ectool rtcset 30000
ectool rtcget
Current time: 0x0000753d (30013)
ectool rtcsetalarm 10
after ~10 (measured with a timer) printed on
ec console: [160.248900 event set 0x0000000002000000]
I tested the alarm up to one hour.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I58ac585c2d566d306625dd8034377925eba36293
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3140328
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add PSL_IN1/PSL_IN2/PSL_IN3 as the hibernate wakeup pins. Also map the
non-PSL (low power RAM) hibernate wakeup source to the same pads.
(i.e. GPIOD2/GPIO00/GPIO01.) Then we can use either PSL hibernate mode
(CONFIG_PLATFORM_EC_HIBERNATE_PSL=y) or non-PSL hibernate mode
(CONFIG_PLATFORM_EC_HIBERNATE_PSL=n) on the EVB.
BUG=none
BRANCH=none
TEST=pass "zmake testall"
TEST='hibernate' & wake-up ec by those wakeup pins.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I4175bdabee138c7bac25f8b43774268ae336d989
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3089083
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
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This CL enables RTC for npcx7/9_evb.
BUG=none
BRANCH=none
TEST='rtc' console command
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Icc5d79d16ba2e4073ce39d38f0942a050d128e82
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088961
Reviewed-by: Keith Short <keithshort@chromium.org>
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This CL enables keyboard function for npcx7/9_evb. The keyboard sets to
the following config:
* kso0-12 are selected for keyboard scan
* enable CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE
* set keyscan_config to meet the config in npcx_evb board.c
BRANCH=none
BUG=none
TEST='ksstate on' & check actual key setting
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I059e1f8d07558a0f465769ecffd4246dcda1a608
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3077764
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This CL enables power management for npcx7/9_evb
BUG=none
BRANCH=none
TEST=Check evb can enter sleep by 'idlestats' console command
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I3ef9776f492388b2943a42d99686de952c7def05
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3068843
Reviewed-by: Yuval Peress <peress@chromium.org>
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This CL enables 2 PWM channels for npcx7/9_evb.
BRANCH=none
BUG=none
TEST='pwmduty' console command & check the output waveform is correct.
```
uart:~$ pwmduty
PWM channels:
0: 50%
1: 25%
```
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I6fa5d3b7fd3bf1f9d1fdb3f64ca3488ad3addacc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3063104
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This CL enables 5 ADC channels for npcx7/9_evb.
BUG=none
BRANCH=none
TEST='adc' console command
```
uart:~$ adc
ADC0 = 2813 mV
ADC1 = 2813 mV
ADC2 = 2813 mV
ADC3 = 2813 mV
ADC4 = 2813 mV
```
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I08d60dc732f7388642a54eec090ef7bf15760a2a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3063103
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This CL enables I2C for npcx7/9_evb. Currently, zephyr-OS ec doesn't
use the GPIO for i2c unwedge functionality. Remove the GPIO setting for
i2c in gpio.dts.
BUG=none
BRANCH=none
TEST=Get sensor value by `i2c` shell command
```
uart:~$ i2c scan I2C_2_PORT_0
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- 48 -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- --
1 devices found on I2C_2_PORT_0
uart:~$ i2c read I2C_2_PORT_0 0x48 0x00 2
00000000: 1f 80
```
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: If5029c41b7ba5400ee1492b408f7ab6975218c5b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060348
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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Initial image for npcx_evb/npcx9 supporting basic UART functionality
and basic commands.
BUG=none
BRANCH=none
TEST=test basic console functionality on npcx9_evb
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I0cdf12823df35ec6aaba7a48c5d1698cc814703a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033231
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Initial image for npcx_evb/npcx7 supporting basic UART functionality
and basic commands.
BUG=none
BRANCH=none
TEST=test basic console functionality on npcx7_evb
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: Ibdf1ce98b6ad747dc649b82f12e555e63569036a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033230
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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MKBP_HOST_EVENT_WAKEUP_MASK is right-shifted by 1 bit, so adjust
defining it in the dts.
The bug is impacting the waking up DUT with a host event, e.g.
EC_HOST_EVENT_RTC which is used during the firmware_EventLog test.
BUG=b:193495066
BRANCH=none
TEST=Suspend DUT with powerd_dbus_suspend, and make sure the EC command
"hostevent set 0x0000000002000000" wakes up the board.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I253d0dc36cf216fe50a6473c3640fe906ef565e3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3031542
Reviewed-by: Simon Glass <sjg@chromium.org>
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Make the board dts file simpler and easier to be merged to other boards
which use the same chip.
BRANCH=None
BUG=b:192253134, b:193814903
TEST=Built the Zephyr herobrine_npcx9 image successfully.
Change-Id: I53a15a47511eb875bbfd50906f5a11d3a69d48ea
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3039387
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This CL is a Zephyr-equivalent of CL:2993217.
Update the GPIOs to match the schematic. Also update the hibnerate
wake sources. Remove the AP_RST_L and WARM_RESET_L from the low voltage
dts as their new GPIOs already operate at 1.8V, not configurable.
BRANCH=None
BUG=b:192253134, b:193583152
TEST=Built the Zephyr herobrine_npcx9 image successfully.
Change-Id: I2fcb03acff7ac376a5627f66c800d2d8cade1998
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3039386
Reviewed-by: Yuval Peress <peress@chromium.org>
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This CL copies the Zephyr board/trogdor to board/herobrine_npcx9.
Modify the chip config to npcx9m3f and some related configs (simply
rename) and dts (update the UART property). The board/herobrine_npcx9
and other NPCX9 boards, like board/brya will be merged to a single
board. But the merge needs more work to remove the not-common configs
and dts to the project directories. Leave it as a future work.
This CL also copies the project trogdor/herobrine_npcx7 to
herobrine/herobrine_npcx9. Remove the dead files power.c and
hibernate.c, in the EC-OS directory. Remove the Zephyr 2.5 support
and board.cmake (needed only for 2.5).
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: I9641768ee978920f6a8677f13ae14e0a26ad35f4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993220
Reviewed-by: Yuval Peress <peress@chromium.org>
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Move all the boards directories together under zephyr/boards from
their scattered locations under projects/.
This is the first step towards de-coupling the concept of a Zephyr
board from baseboard/board/model, as it currently is. Further work
will be required to actually unify these directories and delete the
baseboard-specific names from our tree.
BUG=b:193814903
BRANCH=none
TEST=zmake testall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I33a344af6890b2c2c54f1e91f0f0fa85caaf19d3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3035222
Commit-Queue: Yuval Peress <peress@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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