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* motion: Add ability to stop ring interrupts.Gwendal Grignou2016-06-301-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, it is assumed the host will sooner or later retrieve the events from the sensor ring: It is only used by Android and the sensor HAL is enabling the ring buffer at boot. But if nobody processes the ring, and the ring is almost full, the EC will generate interrupt for every new events. This can happen with ARC, where events generated for ChromeOS will be in the ring but nobody will process them until Android is started. Add a command to allow sending ring MKBP events. It will be used when the IIO ring buffer is enabled / disabled. It also can be used for preventing raising interrupt when the device is about to go to sleep. BRANCH=ryu,cyan BUG=b:25425420,b:27849483 TEST=Check with fiforead that no events are queued when IIO ring buffer is disabled. Check with ectool and androsensor that interrupt generation stops. Change-Id: Ibc85eed2e0eae3a9ec07d191e692118bc2fd0dab Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356689
* keyboard_scan: Support boot key recognition with stuck KSI2Shawn Nematbakhsh2016-06-302-0/+8
| | | | | | | | | | | | | | | | | For certain board configurations, KSI2 will be stuck asserted for all scan columns if the power button is held. We must be aware of this case in order to correctly handle recovery mode key combinations. BUG=chrome-os-partner:54602 BRANCH=None TEST=Manual on gru. Do three-key salute, verify EC detects recovery mode. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I03d76e1121107484f79520745858388f6cae096c Reviewed-on: https://chromium-review.googlesource.com/357590 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Cleanup: gate RTC console/host command behind new config optionsphilipchen2016-06-291-0/+4
| | | | | | | | | | | | | | | | Put RTC code supporting console/host command behind new flags 'CONFIG_CMD_RTC'/'CONFIG_HOSTCMD_RTC' BUG=chromium:613699 TEST=make buildall BRANCH=master Change-Id: Ida52265d124978f48bd6ca522be3badee9f99588 Reviewed-on: https://chromium-review.googlesource.com/356206 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ec_commands: Add suspend control needed for SkylakeGwendal Grignou2016-06-281-0/+17
| | | | | | | | | | | | | Changes were submitted for ec_commands.h but only in the braswell tree. Merge in ToT for future reference. BRANCH=none BUG=chrome-os-partner:50627 TEST=compile. Change-Id: I74f6ce3c5fd2a628879593a65506d10c44ee574d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356551
* common: Decouple temp sensor from thermal throttlingMary Ruthven2016-06-281-0/+12
| | | | | | | | | | | | | | | Not everything with a temperature sensor uses thermal throttling. This change modifies the conditional build to enable building temp sensor source without thermal throttling. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I8c0753f12899e9f203c04477ae520bcda40d5fd8 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356484 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* BD99955: Added support for 'psys' & 'amonbmon' console commandsVijay Hiremath2016-06-271-4/+2
| | | | | | | | | | | | | | | | | | | | Added console commands for the debugging purpose psys - Can be used to measure the system power amonbmon - Can be used to measure AMON/BMON voltage diff, current BUG=chrome-os-partner:54273 BRANCH=none TEST=Manually tested on Amenia psys - Ran fish task and observed psys value changes. amonbmon - AMON & BMON voltage & current are same as measured across sense resistors. Change-Id: I6653e814d9b00efe7dae9ce1fbd7ddbc2356f8e0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/353043 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* usb_mux: Add support for host-controlled 'virtual' USB muxShawn Nematbakhsh2016-06-243-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | For designs where the host SOC is responsible for setting the USB-C SS mux, the EC must track the desired mux state and inform the host when the desired state changes. Then, the host must ask the EC for the new desired state and set the mux accordingly. BUG=chrome-os-partner:52639 BRANCH=None TEST=Manual on gru with subsequent commit. Attach USB dongle in port 1 and DP dongle in port 0, then verify `ectool usbpdmuxinfo` output: Port 0: DP Port 1: USB Flip DP dongle and verify output changes: Port 0: DP INV Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6a99ce93a76c3197f9195cfaa25c5217d09aeb75 Reviewed-on: https://chromium-review.googlesource.com/355281 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ec_commands: Be sure all C code is within #ifnef ACPIGwendal Grignou2016-06-231-2/+2
| | | | | | | | | | | | | | When __ACPI__ is set, only #define are allowed. BRANCH=none BUG=chrome-os-partner:52433 TEST=Coreboot compiles with this code. Change-Id: Iadb3893960f16ff49aa4f4e5871d5d17cbb87642 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/355570 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* mkpb: Add MKBP support over ACPIGwendal Grignou2016-06-222-2/+10
| | | | | | | | | | | | | | | | | | | | Add a host event to support MKPB: When sent, the ACPI code will send a notification to the kernel cros-ec-lpcs driver that will issue EC_CMD_GET_NEXT_EVENT. We can allow code (sensor stack for instance) that uses MKBP to work on ACPI based architecture. Obviously, host event over MKPB is not supported. BRANCH=none BUG=b:27849483 TEST=Check we get sensor events on Cyan through the sensor ring. (cyan branch) Change-Id: Iadc9c852b410cf69ef15bcbbb1b086c36687c687 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353634 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec_commands: use hex to make EC_PWM_MAX_DUTY clearerBrian Norris2016-06-171-2/+2
| | | | | | | | | | | | | | | Some comments in upstream Linux review have suggested this be hex. Makes sense to me. BUG=chromium:621123 TEST=build BRANCH=none Change-Id: Ib7143acc96a2fe593d5e02ad0fba3a501bd8cea2 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353681 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* bd99955: Improve interrupt / USB charger task wake schemeShawn Nematbakhsh2016-06-161-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Previously our charger ISR called a deferred task which woke our charger task. We can skip the deferred task and just wake our charger task directly. The other meaningful change here is to assume that we're using the charger for VBUS detection / BC1.2 if we have a usb_chg task, which holds true for all of our current boards with this charger. BUG=None TEST=Manual on kevin with subsequent commit. Verify charger connect / disconnect detection works properly on both ports, with zinger, donette and generic DCP charger. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Iad4f3ea90947b50859c549b591675e325717209f Reviewed-on: https://chromium-review.googlesource.com/352822 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* elm: anx7688: add anx7688 hpd driverRong Chang2016-06-161-0/+1
| | | | | | | | | | | | | | | | | | | | ANX7688 is a TCPCI compatible port controller with HDMI to DP converter. The HDMI converter needs a reset every time after enabling its function. BRANCH=none BUG=chrome-os-partner:52815 TEST=manual boot elm proto plug and unplug dingdong and check DP output plug/unplug adapter and check pd 0 state Change-Id: I774421d7b0b8d2cfd31e860fcd4eaed08ee48ac7 Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tang Zhentian1 <ztang@analogixsemi.com> Reviewed-on: https://chromium-review.googlesource.com/340371 Commit-Ready: Koro Chen <koro.chen@mediatek.com> Tested-by: Koro Chen <koro.chen@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* amenia: Support DP alt mode of Type-C controller in amenia.li feng2016-06-141-0/+6
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=On Amenia TR1.2, tested with HDMI to Type-C dongle. Both Analogix and Parade ports have HDMI on extended display. Change-Id: Ifb95c289019063a8a24d135e3b3a09cb4d446210 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/348881 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* driver/tcpm: add Type-C controller ps8751 DP alt mode APIli feng2016-06-141-0/+1
| | | | | | | | | | | | | | | BUG=chrome-os-partner:49431 BRANCH=none TEST=On Amenia TR1.2, verified display port outptu is enabled on exteneded display. Seperate patches are needed for testing. Change-Id: I5ca54c91c566725c612a01a51f1af32e2a819e2d Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351319 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* BD99955: Use only one USB charger task for both the portsVijay Hiremath2016-06-141-0/+7
| | | | | | | | | | | | | | | | | | | | | There is only one charger IC and one interrupt PIN for both the ports and also from the ISR it's not possible to decode from which port the interrupt is triggered hence a deferred function is used to trigger the wake event for the ports. As there is no additional benefit of having an extra task, added code to use only one USB charger task for both the ports. BUG=chrome-os-partner:54272 BRANCH=none TEST=Manually tested on Amenia. BC1.2 detection is success and the battery can charge on both the ports (VBUS/VCC). Change-Id: I2745a5a179662aaeef8d48c8c1763919e8853fd0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351752 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* CR50: add support for hardware modexpnagendra modadugu2016-06-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit includes changes required for supporting a hardware based montgomery modexp (r = a ^ e mod N). The function bn_is_bit_set() was previously static, and now added to internal.h, as this function is used by the hardware implementation. Add function declarations for new functions related to the hardware implementation to chip/g/dcrypto/internal.h BRANCH=none CQ-DEPEND=CL:*260618,CL:*260895 BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=all tests in test/tpm_test/tpmtest.py pass Change-Id: I5fe4a6692678b64f27659f42a08d200b6fe6f0cc Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/347462 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Driver: BD99955: Use Charger interrupt to detect VBUS activityVijay Hiremath2016-06-081-0/+13
| | | | | | | | | | | | | | | | | | | Added support to enable the BD99955 charger interrupt to detect the VBUS activity. With this approach GPIO USB_Cx_VBUS_DET_N pin can be removed. BUG=chrome-os-partner:53688 BRANCH=none TEST=Manually tested on Amenia. Type-C, DCP & SDP chargers can negotiate to desired current & voltage. Battery can charge. USB3.0 & USB2.0 sync devices are detected by the Kernel. Change-Id: I5470092c5cd43026aafc1a638ba446d0037c71e7 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/343650 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* ec_commands: Add new EC_CMD_PD_CONTROL commandNicolas Boichat2016-06-072-0/+16
| | | | | | | | | | | | | | | | | | | | | | | This commands makes it possible to control the PD chip (or the interaction between EC and PD), from the AP. - PD_SUSPEND: Suspends the PD chip: EC needs to stop talking to PD chip. Useful at beginning of PD FW update. - PD_RESUME: Resumes the PD chip: EC can start talking to PD chip again. Useful at end of PD FW update. - PD_RESET: Resets the PD chip (called at the end of the update). - PD_CONTROL_DISABLE: Prevents further calls to this command (for security reason, we do not want the AP to be able to call the other subcommands after the update has been performed). BRANCH=none BUG=chrome-os-partner:52433 TEST=ectool pdcontrol {suspend,resume,reset,disable} Change-Id: I7a955dd27b65086c21d195a6504aa7392eb0406d Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/342584 Reviewed-by: Randall Spangler <rspangler@google.com>
* reef: enable WiFi power control supportKevin K Wong2016-06-031-0/+3
| | | | | | | | | | | | | | | | add a new config flag to support active low power control signal BUG=chrome-os-partner:53665 BRANCH=none TEST=Use multimeter to check for voltage present on the WiFi slot. Use gpioget to check GPIO state in S0 (on) and S5 (off). Change-Id: Ibeca88d16f39eadd7f29589cd3cd15aeef0dd524 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/347085 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* usb_charger: Support inverted 5V_EN GPIO polarityShawn Nematbakhsh2016-06-021-0/+6
| | | | | | | | | | | | | | | | | Kevin uses inverted polarity (low = enable 5V output), so add a new CONFIG to support this. BUG=chrome-os-partner:53777 BRANCH=None TEST=Manual on Kevin. Enable USB charger tasks, verify that VBUS is properly detected on no-battery case. Change-Id: Ifb3e5fa9db1973d9826435712711f0cb0fd1d3a5 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/349260 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: pd: Define VBUS detection sourceShawn Nematbakhsh2016-06-021-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent: - When operating as a TCPC, it indicated that the VBUS level should be tracked (through GPIO inputs) and sent to the external TCPM when appropriate. - When operating as a TCPM, it indicated that the VBUS level should be obtained by querying the TCPC. These two independent uses have been split into CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which sould be more clear. In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for other means of VBUS detection. BUG=chromium:616580 BRANCH=None TEST=Verify kevin continues to boot + charge. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923 Reviewed-on: https://chromium-review.googlesource.com/348950 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* COMMON: move precharge time to config.hRyan Zhang2016-06-012-1/+4
| | | | | | | | | | | | | | move PRECHARGE_TIMEOUT to config.h so that we can customize precharge time to meet client's spec. BUG=none BRANCH=master TEST=`make -j buildall`, precharge time is set to 300s in elm. Change-Id: I5c3bf0d5c5240b9c087e6cdb7c6e97301efa9f84 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/348151 Reviewed-by: Shawn N <shawnn@chromium.org>
* CR50: port dcrypto/cr50 code to depend on third_party/cryptocnagendra modadugu2016-05-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Port SHA and P256 code to depend on third_party/cryptoc. Remove config options CONFIG_SHA1, and CONFIG_SHA256 as these are provided by third_party/cryptoc. Also remove unused config options CONFIG_SHA384, CONFIG_SHA512. Crypto functions prefixed by dcrypto_ (declared in internal.h ), DCRYPTO_ (declared in dcrypto.h) are implemented under chip/g/dcrypto, and otherwise are implemented under third_party/cryptoc. BRANCH=none BUG=chrome-os-partner:43025,chrome-os-partner:47524,chrome-os-partner:53782 TEST=all tests in test/tpm_test/tpmtest.py pass Change-Id: If7da02849aba9703573559370af5fae721d594fc Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/340853 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* driver: Add support bma255 sensorWonjoon Lee2016-05-312-0/+2
| | | | | | | | | | | | | | | | BMA255 is one of BMA2x2 accel sensor series. Adding defines,driver from https://github.com/BoschSensortec/BMA2x2_driver BUG=chrome-os-partner:52877 BRANCH=none TEST="accelread 2" is working on kevin, also check accelrate, accelrange can set proper value on IC Change-Id: I99932ff75aae91a744fe18dddc010b802085a2da Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/347722 Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Initialize charge suppliers after change manager is initializedVijay Hiremath2016-05-281-0/+2
| | | | | | | | | | | | | | | | | | Initialize the charge suppliers after change manager is initialized, otherwise charge supplier current & voltage values will be overwritten to -1 by the charge manager ini function. BUG=chrome-os-partner:53788 BRANCH=None TEST=Observed there are no "CL: p(port) s(supplier) i-1 v-1" prints on the EC console. Change-Id: Id0212c502d5833c016ac79ee15d21304d6d7ceb2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/347896 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* pwm: Modify new PWM host commands to take 16-bit duty cycleShawn Nematbakhsh2016-05-271-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EC_CMD_PWM_SET_DUTY / EC_CMD_PWM_GET_DUTY were recently added and are not yet in use. Future-proof these commands by taking a 16-bit duty cycle parameter and converting it between the [0-100] percent used by internal EC functions. BUG=chromium:615109 BRANCH=None TEST=Manual on chell. `ectool pwmsetduty kb 65535` - Verify KB backlight goes to 100% `ectool pwmgetduty kb` - Prints 65535 `ectool pwmgetduty 0` - Prints 65535 `ectool pwmsetduty 0 0` - Verify KB backlight goes to 0% `ectool pwmgetduty kb` - Prints 0 `ectool pwmgetduty disp` - Error res 3 (unsupported PWM type) `ectool pwmsetduty 1` - Error res 3 (non-existent PWM index) `ectool pwmsetduty kb 6550` + `ectool pwmgetduty kb` - Prints 6553 (round up) `ectool pwmsetduty kb 6560` + `ectool pwmgetduty kb` - Prints 6553 (round down) Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic6996fc6e1e69359274b2f9a1120ee7002db991c Reviewed-on: https://chromium-review.googlesource.com/347608 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org>
* cr50: monitor the state of Servo, the EC, and APMary Ruthven2016-05-272-0/+39
| | | | | | | | | | | | | | | | | There are a couple of issues that cr50 has when it cannot know the state of servo, the EC, and the AP. This change adds support so we can detect when the AP or EC has been powered on and when servo has been connected. It uses the UART RX signals to monitor the power state of the AP and EC. The TX signals are used to monitor the state of servo. BUG=chrome-os-partner:52056,chrome-os-partner:52322 BRANCH=none TEST=verify device states are correct when the AP and EC are powered on or off and when Servo is attached or detached Change-Id: Id0a2281b65cb367ecc8d0ca2f9a576672318a5fb Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/344019
* Cr50: NvMem: Connected function stubs in /board/tpm2/NVMem.cScott2016-05-261-3/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | Used #define CONFIG_FLASH_NVMEM to have functions in /board/tpm2/NVMem.c utlitize on chip Nvmem functions. On chip NV Memory availability is tied to an internal nvmem error state which itself only depends on finding at least one valid partition. Added nvmem_is_different and nvmem_move functions which were needed to complete the tpm2 platform interface. In addition, added unit tests to support these two new functions. BUG=chrome-os-partner:44745 BRANCH=none TEST=manual make runtests TEST_LIST_HOST=nvmem and verify that all tests pass. Tested with tcg_test utility to test reads/writes using the command "build/test-tpm2/install/bin/compliance --ntpm localhost:9883 --select CPCTPM_TC2_3_33_07_01". Change-Id: I475fdd1331e28ede00f9b674c7bee1536fa9ea48 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/346236 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* NvMem: Added NV Memory module to ec/common/Scott2016-05-262-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | Full implementation of NvMem read, write, and commit functions. Includes partition definitions, shared memory allocation, and initialization function. Includes a set of unit tests located in ec/test/nvmem.c which verify functionality. This module is required by Cr50, however this CL does not include any Cr50 specific code. BUG=chrome-os-partner:44745 BRANCH=none TEST=manual make runtests TEST_LIST_HOST=nvmem and verify that all tests pass Change-Id: I515b094f2179dbcb75dd11ab5b14434caad37edd Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/345632 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* servo_micro: add programmable serial numberNick Sanders2016-05-263-0/+37
| | | | | | | | | | | | | | | | This change provides a console command for setting, and loading a usb serial number from flash. This feature adds CONFIG_USB_SERIALNO, and currently only has a useful implementation when PSTATE is present. BUG=chromium:571477 TEST=serialno set abcdef; serialno load; reboot BRANCH=none Change-Id: I3b24cfa2d52d54118bc3fd54b276e3d95412d245 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/337359 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* servo_v4: Fix ADC console commandNick Sanders2016-05-261-12/+0
| | | | | | | | | | | | | | | | | | | | | | The console adc command prints adc values in the order they appear in hardware, however they are lableled in the order they are enumerated in board.h, which is not necessarily the same. This prints the correct name and value pairs, and removes the adc_read_all_channels function which is not otherwise used. BUG=chromium:571476 BRANCH=None TEST="adc" command associates correct values with names now. Change-Id: I688641953d20082224b4120eaefe0d634ad4c74c Signed-off-by: Nick Sanders <nsanders@google.com> Reviewed-on: https://chromium-review.googlesource.com/340892 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* mkbp_event: Don't discard event source structures due to LTOShawn Nematbakhsh2016-05-251-3/+3
| | | | | | | | | | | | | | | BUG=chrome-os-partner:53729 BRANCH=None TEST=Manual on gru. Verify .rodata.evtsrcs section is non-empty in ec.RO.map. Verify that we're no longer spammed with HC 0x67 (due to constantly asserted interrupt). Change-Id: I57ad1ba7fbdd99dfab84341560aff094ce9bc5b6 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/347415 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* CR50: remove dependence of assert.h on util.hnagendra modadugu2016-05-251-29/+1
| | | | | | | | | | | | | | | | | | | | | Third party code includes standard system headers, but may not have include paths configured for the platform. Remove the dependency between assert.h and platform headers util.h, and panic.h. BRANCH=none BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=make buildall succeeds Change-Id: Ic8d4dc1944765d2f0f80782afa574d7b8e54eb0f Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/347080 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* common/i2c: Add I2C passthru_protect commandNicolas Boichat2016-05-243-0/+24
| | | | | | | | | | | | | | | | | | This allows the AP to protect a I2C passthru bus. A board-specific function then defines what I2C commands are allowed, so that we can white/black list some addresses (e.g. I2C address allowing PD chip FW updating). BRANCH=none BUG=chrome-os-partner:52431 TEST=Book elm-rev1 Change-Id: Ib106924418b16388ea8ea53c7b6bda6ef92e1d09 Signed-off-by: Nicolas Boichat <drinkcat@google.com> Reviewed-on: https://chromium-review.googlesource.com/345761 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@google.com>
* Driver: BD99955: Enable BC1.2 supportVijay Hiremath2016-05-242-1/+2
| | | | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=Manually tested on Amenia. Connected Zinger, Type-C, DCP & CDP chargers. Device can negotiate to desired current & voltage and the battery can charge. USB2.0 sync device is detected by Kernel. Change-Id: I58cb69289eef9a966e06bef8fe31d35beaec5e27 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/341030 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* kevin: rk3399: enabling RTC wakeupShelley Chen2016-05-231-0/+3
| | | | | | | | | | | | | | | | | | Enabled CONFIG_CMD_RTC_ALARM. EC_HOST_EVENT_RTC is enabled when the rtc_alarm goes off, alerting the AP to transition from S3->S0. BUG=chrome-os-partner:52218 BRANCH=None TEST=rtc_alarm <num> and see event set in ec console after <num> seconds. Also, check if new bit set through hostevent command in ec before/after rtc_alarm goes off. Change-Id: I53b1705ce0925000f35b9f80752035d198db3310 Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/345474 Reviewed-by: Shawn N <shawnn@chromium.org>
* spi_flash: Add protect_range table for W25Q40stabilize-8350.21.BDavid Hendricks2016-05-191-0/+3
| | | | | | | | | | | BUG=chrome-os-partner:53035 BRANCH=none TEST=needs testing Change-Id: I4b2bc758a22c2c19ddf0438a2af26f8c76093081 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/339291 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* chip: it83xx: Optimize interrupt usage of LPC accessDino Li2016-05-181-3/+0
| | | | | | | | | | | | | | | | | | LPC access interrupt only enabled when EC entering deep doze mode. This will reduce interrupt of LPC access. Also, this interrupt is always enabled for LPC platform to support "CONFIG_LOW_POWER_S0". Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=Tested ectool command 'version' x 10000. Change-Id: I9053c4018b38a8a852c3c6254e1fcde625f3fa3a Reviewed-on: https://chromium-review.googlesource.com/336112 Commit-Ready: Dino Li <dino0303@gmail.com> Tested-by: Dino Li <dino0303@gmail.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* TCPM : Added driver for Analogix's anx74xx chipsAman Kumar2016-05-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Driver implements TCPC for ANX74xx chips. Enables Type C port for USB and DP alt mode. Enable port role swap feature. Driver implements TCPC for ANX74xx chips firmware version 1.0 and later. Please update to ANX74xx firmware to V1.0 or later version to work. Change list: 1, modify the position of define and struct declare which response the comment for patch 22. BUG=chrome-os-partner:49510 BRANCH=none TEST=tested compiled binary for pdeval-stm32f072 board with this patch. Power contract establishment, port role swap, DP alt mode works fine. Change-Id: Iae6322510605a08d3bdd08446116ef5f9e4f7a7c Signed-off-by: Aman Kumar <akumar@analogixsemi.com> Signed-off-by: Junhua Xia <jxia@analogixsemi.com> Reviewed-on: https://chromium-review.googlesource.com/322433 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* do not allow console commands with names longer than 14 charactersVadim Bendebury2016-05-181-0/+4
| | | | | | | | | | | | | | | | | The maximum length of console command name is hardcoded to be 14 in a few places in the code. In any case, 14 characters should be enough for any command name, let's add compile time check to ensure that this limit is honored. BRANCH=none BUG=none TEST=tried adding a command with a name longer than 14 characters, got a compile error. Change-Id: I11891fcd04983a5618400a602d4b80a478ecf3a9 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/345571 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* usb_charger: Move part-specific code to usb_switch driverShawn Nematbakhsh2016-05-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Previously usb_charger.c supported only pi3usb9281, but now support for additional parts is required. Move pericom-specific code (including the usb_charger tasks that handles various quirks of that part) to the pi3usb9281 usb_switch driver. Going forward, usb_switch drivers must implement usb_charger_set_switches() and must have some method (such as a task or interrupt handler) to update charge_manager with information about attached chargers. BUG=chrome-os-partner:53363 BRANCH=None TEST=`make buildall -j` Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I4df74e043d8cf2e532d48c39c73b7dc2930f7d3b Reviewed-on: https://chromium-review.googlesource.com/344289 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: Remove usb_switch_tsu6721 driverShawn Nematbakhsh2016-05-131-6/+0
| | | | | | | | | | | | | | | | This driver is not in use for any recent board and doesn't implement the soon-to-be standard usb_switch interface routine. BUG=chrome-os-partner:53363 BRANCH=None TEST=`make buildall -j` Change-Id: I7469dab42e52d9d02425ad4e7bacb81b2489ffc4 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/344417 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pwm: Add generic PWM control host commandsShawn Nematbakhsh2016-05-112-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | Add generic PWM host commands for setting + getting duty cycle. PWMs can be controlled through index (board-specific meaning) or by type (currently KB backlight and display backlight are supported, more can be added as needed). BUG=chrome-os-partner:52002 BRANCH=None TEST=Manual on chell. `ectool pwmsetduty kb 100` - Verify KB backlight goes to 100% `ectool pwmgetduty kb` - Prints 100 `ectool pwmgetduty 0` - Prints 100 `ectool pwmsetduty 0 0` - Verify KB backlight goes to 0% `ectool pwmgetduty kb` - Prints 0 `ectool pwmgetduty disp` - Error res 3 (unsupported PWM type) `ectool pwmsetduty 1` - Error res 3 (non-existent PWM index) Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I607c92a291e6c2e3af8238eaf22ad2bb81ffc805 Reviewed-on: https://chromium-review.googlesource.com/344012 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* hooks: Add relative HOOK_INIT priority for peripheralsShawn Nematbakhsh2016-05-051-4/+8
| | | | | | | | | | | | | | | | | | | Using HOOK_PRIO_DEFAULT for peripheral initialization necessitates using HOOK_PRIO_DEFAULT+1 for board-level code. Instead, use a higher-than-default relative priority for peripheral initialization outside of board. BUG=None TEST=Verify PWM and ADC are functional on kevin. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ia8e90a7a866bdb0a661099dd458e3dfcaaa3f6bb Reviewed-on: https://chromium-review.googlesource.com/342171 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* apollolake: ignore PLTRST# from SOC unless RSMRST# is deassertedKevin K Wong2016-05-031-0/+7
| | | | | | | | | | | | | add optional chipset specific function to check if PLTRST# is valid BUG=chrome-os-partner:52656 BRANCH=none TEST=make buildall, able to boot to OS on amenia Change-Id: I7a2747c4f77f50393c3250c2ab0e1625e64e5a41 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/341732 Reviewed-by: Shawn N <shawnn@chromium.org>
* cr50: add basic rbox supportMary Ruthven2016-04-293-6/+18
| | | | | | | | | | | | | | | | | This change modifies the behavior of RBOX by blocking the key0 and key1 output, when the power button is pressed. It also adds support for printing debug statements when various RBOX interrupts are triggered. BUG=none BRANCH=none TEST=On cr50 test board verify key0 and key1 out are not asserted unless the power button is pressed. Change-Id: I67a3c1b8009279015bdc87bcf0995cffa9ab6f03 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/341470 Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* pwm: Add PWM_CONFIG_DSLEEP config flagShawn Nematbakhsh2016-04-272-4/+7
| | | | | | | | | | | | | | | | | | | Add PWM_CONFIG_DSLEEP PWM config flag, which can be set to keep a channel active during low-power idle / deep sleep. Currently it's supported by npcx and mec1322. BUG=chrome-os-partner:52783 BRANCH=glados TEST=Manual on chell w/ subsequent commit + CONFIG_LOW_POWER_S0. Verify KB backlight does not flicker during idle. Change-Id: Ib9df5879aaa7dfa5764de1583496de84d40d2bb5 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/341002 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* servo_micro: add gpio mode get and setNick Sanders2016-04-272-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO console commands currently only show input voltage level, and can only set level on predefined outputs. This change allows GPIOs to be cycled between output, input, and alternate function, as well as displaying the mode and asserted level (if any) in gpioget. This change creates CONFIG_CMD_GPIO_EXTENDED as the internal gpio interface needs to be changed to support this, and I can't test the other architectures. It may be worthwhile to add this for all, or not. This change is also necessary also for servo micro JTAG and PD UART support, as several pins are tied together on the flex and stm32 outputs need to be variously active or in high-z depending on mode. BUG=chromium:571477 TEST=gpioget <0|1|IN|A|ALT>; gpioget; BRANCH=None Change-Id: Iba32992db6244ee1e654db840d1c9c11dd2a0993 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/338885 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* UART: Remove enable/disable interrupt functionsAnton Staaf2016-04-271-12/+0
| | | | | | | | | | | | | | | | These were not being used and complicate changes to the UART API. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I73e256f09f7ea72f0cc4831cc7ce391a7125e555 Reviewed-on: https://chromium-review.googlesource.com/340841 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cr50: enable AP and EC flash accessstabilize-8249.BMary Ruthven2016-04-261-0/+3
| | | | | | | | | | | | | | | | | | | | | The cr50 SPI master can control the external AP and EC SPI ROM. This change adds support for doing spi_transactions, but does not use the SPI transactions for anything except console commands. This support will be used for flashing the AP and EC through CCD. For now AP and EC flash select must be done manually using the spi_flash_select console command. Flash select should be disabled after use, because it will prevent the system from booting. BUG=chrome-os-partner:50701 BRANCH=none TEST=Enable spi_flash commands. Select AP ROM and verify spi_flashinfo, read, erase, and write commands work properly. Select EC ROM and verify the same commands. Change-Id: I16c55015794f8513effe0fa5712488a84bed2627 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/339844 Reviewed-by: Shawn N <shawnn@chromium.org>
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