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* retimer: usbc retimer name cleanupDenis Brockus2019-11-132-8/+21
| | | | | | | | | | | | | | Need to cleanup naming around USBC Retimers for adding PI2DPX1207 code BUG=none BRANCH=none TEST=make buildall -j Change-Id: I7e18e0abbe5bfd89bf0e20fa7b5174669689778f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911296 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Clean up double tap related definitionHeng-Ruey Hsu2019-11-131-3/+3
| | | | | | | | | | | | | | | | Fixes: commit 2f2a81079191ca "Add double tap and make motion sense wake up ap" CONFIG_GESTURE_DETECTION_MASK includes significant motion in activity list. We cannot use it for double tap. Add more flags to distinguish it. BUG=b:135575671 BRANCH=kukui TEST=AP can receive mkbp event when double tap is triggered Change-Id: I13776a01b14dc251396a615c8c97353f2d0477d4 Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911263 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* common: Refactor motion_sense_fifoYuval Peress2019-11-112-30/+60
| | | | | | | | | | | | | | | | | This change refactors the motion_sense_fifo to uniformly prefix all the functions to avoid collisions. It also adds several unit tests and fixes a few bugs with the fifo logic. BUG=b:137758297 BRANCH=kukui TEST=buildall TEST=run CTS on arcada, kohaku, and kukui TEST=boot kohaku (verify tablet mode works as expected) Change-Id: I6e8492ae5fa474d0aa870088ab56f76b220a73e3 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1835221 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Add double tap and make motion sense wake up apHeng-Ruey Hsu2019-11-111-0/+4
| | | | | | | | | | | | | | | Change to use CONFIG_GESTURE_DETECTION_MASK since CONFIG_GESTURE_SENSOR_BATTERY_TAP and CONFIG_GESTURE_SENSOR_DOUBLE_TAP both define it. BUG=b:135575671 BRANCH=none TEST=build pass. EC can receive double tap interrupt. Change-Id: I6eec40ef7405ec0653ff62dbce98f975cb19e332 Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1710210 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Add a board specific helper to return USB PD port countKarthikeyan Ramasubramanian2019-11-091-0/+17
| | | | | | | | | | | | | | | | | | | | | Certain SKUs of certain boards have less number of USB PD ports than configured in CONFIG_USB_PD_PORT_MAX_COUNT. Hence define an overrideable board specific helper to return the number of USB PD ports. This helps to avoid initiating a PD firmware update in SKUs where there are less number of USB PD ports. Also update charge manager to ensure that absent/ invalid PD ports are skipped during port initialization and management. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS in bobba(2A + 2C config) and garg(2A + 1C + 1HDMI config). Change-Id: Ie345cef470ad878ec443ddf4797e5d17cfe1f61e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879338 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* ish: chip enablement of ish5.4 on tgl rvp platformLeifu Zhao2019-11-091-0/+16
| | | | | | | | | | | | | | | | | Chip level enablement of ish5.4 on tgl rvp platform. BUG=b:141519691 BRANCH=none TEST=tested on tgl rvp Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Change-Id: I3f6249e1816d81deec0420a12b093918ee7fbddc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846788 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
* gpio: Add UNUSED declaration for gpio.incCraig Hesling2019-11-083-0/+48
| | | | | | | | | | | | | | | | | | | | This new gpio.inc macro is intended to mark pins that are unused on a given board. This allows the chip implementation to configure them for the lowest power configuration. This CL brings immediate functional change. A reference implementation is provided for the STM32F4 chip family in crrev.com/c/1894242. BRANCH=nocturne,hatch BUG=b:130561737 TEST=make buildall -j Change-Id: I0bc0a63401ae8f3bba4108b5b9f9ced26785f2bc Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1898796 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ec_commands: Force enum to be at least 16 bitsTom Hughes2019-11-081-3/+5
| | | | | | | | | | | | | | | | | | If the values in the enum can fit in a byte, the compiler can optimize the size of the enum to a byte. However, our protocol requires 16 bits, so define a max enum value that forces at least 16 bits. BRANCH=none BUG=b:144056522 TEST=make buildall -j Change-Id: I119d990f2775d8b970ec0ec15df1e451fc5dc45d Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1902679 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* Revert "usbc: remove unnecessary tcpc CC reads"Sam Hurst2019-11-061-12/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit bec03d91bc9f954682c02d122a0500d10cc102c2. Reason for revert: Some TCPC's bugs will generate an attach event when nothing is connected, triggering the state machine to enter an attached state. Example output with nothing connected to the port: 2019-10-28 10:23:20 [0.044393 C1: Unattached.SNK] 2019-10-28 10:23:20 [0.101264 p1: PPC init'd.] 2019-10-28 10:23:20 [0.106488 C1: Unattached.SRC] 2019-10-28 10:23:20 [0.116072 C1: AttachWait.SRC] 2019-10-28 10:23:20 [0.220006 C1: Attached.SRC] TOT has basic TypeC/PD functionality but issues still exist that will be fixed in subsequent CLs. Original change's description: > usbc: remove unnecessary tcpc CC reads > > We only need to read the CC pins when the CC evt is fired otherwise the > CC pins should have the same value. It is actually incorrect/undesirable > that our old PD stack queried the tpcp cc driver over i2c so frequently > for the CC pins status. > > Also single source code that interprets the CC lines values into a UFP > or DFP state. > > Lastly, remove extraneous timers for cc debouncing, we only need one. > > BRANCH=none > BUG=none > TEST=builds > > Change-Id: I65baa2e6fb92d7ab5ca12daa76225cd13b9ab974 > Signed-off-by: Jett Rink <jettrink@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1825504 > Reviewed-by: Denis Brockus <dbrockus@chromium.org> > Reviewed-by: Sam Hurst <shurst@google.com> > Commit-Queue: Denis Brockus <dbrockus@chromium.org> Bug: none Change-Id: Ie9bd366dd85df9a33934e06e4208543f6e7aaa9b Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1900058 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ec-fans: Make fans configuration const by default.Andrew McRae2019-11-022-0/+9
| | | | | | | | | | | | | | | | It was pointed out to me that the fans config list was non-const, but there is only 2 boards that require non-const configuration, so by default make it const, but allow an override. BRANCH=none BUG=None TEST=EC compiles, make tests, buildall Change-Id: I3ef8c72f6774e1a76584c47d89287f446199e0f2 Signed-off-by: Andrew McRae <amcrae@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893025 Reviewed-by: Andrew McRae <amcrae@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* Revert "usbc: update CRCReceiveTimer"Sam Hurst2019-11-021-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 1092c786f7876745ec0d68dd52284d252e1abee5. Reason for revert: <Several Fluffy tests failed due to this CL> Original change's description: > usbc: update CRCReceiveTimer > > Shorten the CRCReceiveTimer and document that either the pe send or > error function will get called in response to a prl_ send message. > > BRANCH=none > BUG=none > TEST=build; > > Change-Id: Icc43886cadfdcd67c943b25aebfdfb55b2693ade > Signed-off-by: Jett Rink <jettrink@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1825514 > Tested-by: Denis Brockus <dbrockus@chromium.org> > Commit-Queue: Denis Brockus <dbrockus@chromium.org> > Reviewed-by: Denis Brockus <dbrockus@chromium.org> > Reviewed-by: Edward Hill <ecgh@chromium.org> Bug: none Change-Id: I2051b6c2f3f36d5d0612f24ba08f9843f9487f66 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1894765 Reviewed-by: Sam Hurst <shurst@google.com> Tested-by: Sam Hurst <shurst@google.com> Commit-Queue: Sean Abraham <seanabraham@chromium.org>
* servo_v4: The polarity is based on the flags in SRC DTS modeWai-Hong Tam2019-11-021-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the port in SRC DTS mode, it should not perform the polarity detection. The polarity is predetermined, as a board-specific setting. In the servo case, the polarity is based on the flags. This CL changes the protocol layer to check the port in SRC DTS mode and call the board-specific function board_get_src_dts_polarity() for the polarity. BRANCH=servo BUG=b:140876537 TEST=Configed servo as srcdts and unflipped direction: > cc srcdts cc2 Verified the power negotiation good and detected the correct polarity: > pd 1 state Port C1 CC2, Ena - Role: SRC-UFP State: SRC_READY, Flags: 0x415e Without this patch, it detected the wrong polarity and the power negotiation failed: > pd 1 state Port C1 CC1, Ena - Role: SRC-DFP State: SRC_DISCOVERY, Flags: 0x10608 Change-Id: I32c5dfffeaeb20a21db1417f3a1c98566b7f5e38 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1891255 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Sean Abraham <seanabraham@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-015-10/+10
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* puff: Scrub config and generate hardware structuresAndrew McRae2019-11-011-1/+1
| | | | | | | | | | | | | | | | | | Verify all CONFIG items in board/puff/board.h. Generate the necessary hardware reference structures in board.c Generate the minimum GPIO references in order to build cleanly. v2: Remove some of the fan and temp sensors config. BUG=b:143564865 TEST=Compile and link EC image. Change-Id: Ibc073718ad1c85705ab460d96202799f8c4fea06 Signed-off-by: Andrew McRae <amcrae@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893013 Reviewed-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org>
* gpio: add function to set a GPIO and log to the consoleKeith Short2019-11-011-0/+11
| | | | | | | | | | | | | | Add a common function gpio_set_level_verbose() to generate a cprints() statement prior to changing the GPIO pin level. BUG=none BRANCH=none TEST=make buildall Change-Id: I6b3a9e89604fb721d8fa5208ce96df9e9414cdf9 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893633 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Cleanup: Correct GPIO alternate function parameterVijay Hiremath2019-11-011-3/+20
| | | | | | | | | | | | | | | Added code to correct the GPIO alternate function parameter at Chipset level. Optionally board level functions can cleanup the code in additional change lists. BUG=b:139427854 BRANCH=none TEST=make buildall -j Change-Id: I1171ca36a703291070fc89f972f84414adcf04fc Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880974 Reviewed-by: Keith Short <keithshort@chromium.org>
* Cleanup: Renaming pd_is_ufp to pd_partner_is_ufpAyushee2019-11-011-2/+2
| | | | | | | | | | | | | | | | pd_is_ufp function returns port partner CC status, renaming it to pd_partner_is_ufp to avoid ambiguity between host and port partner's CC status. BUG=b:141971044 BRANCH=None TEST=make buildall -j Change-Id: I19da8c8470db134e438271b92918994d77e4eb5d Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1894119 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* usbc: Get current DP pin mode and CC stateAyushee2019-11-011-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | To configure Intel virtual mux and burnside bridge retimer, current DP pin mode, cc state and the type of the cable is required. Hence, implemented a board level function that returns the current DP pin mode and added a function that returns the type of cable inaccordance to the cable vdo response. Also added a new version to USB_PD_CONTROL host command, to return the DP mode, cc_state and the cable type BUG=b:141971044 BRANCH=None TEST=Verifed with ectool usbpd command on CPU console, able to get correct CC state, pin mode and cable type Pin mode: USB:0x0 (No DP) DP cable:0x4 (Mode:C) USBC dock:0x8 (Mode:D) Change-Id: If87ae6b77e5fa2ceaa22319dfa2d2c802460edfa Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1835030 Reviewed-by: Keith Short <keithshort@chromium.org>
* common: add ceil_for function to math_util.hLeifu Zhao2019-10-311-0/+11
| | | | | | | | | | | | | | | | | | During code review for tgl rvp enablement, found it is better to add ceil_for function to math_util.h. BUG=none BRANCH=none TEST=successfully compile for arcada Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Change-Id: Iee350881c88e923c7a70317a9b8d75ee6104dba0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1873349 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
* pd_protocol: add hard_reset_complete_timerCaveh Jalali2019-10-311-18/+20
| | | | | | | | | | | | | | | | | | | | | | | | certain chargers have noisy CC lines which can prevent overly sensitive TCPCs from detecting a bus idle state. this means the TCPC will not send out messages such as hard_reset. this condition may not clear which means our pd_task() will retry sending hard_resets. although we specify a "timeout" for the event loop in this state, the timeout can be ignored by the event wait when there are pending events. this gets us into a tight event processing loop that starves the watchdog! the solution is to add an explicit timeout timer when processing the PD_STATE_HARD_RESET_SEND state. BUG=b:134702480 BRANCH=none TEST=no more EC watchdog on affected systems Change-Id: I1ae871f5d8fc99f6906ddd18741bbf68dcb6e935 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889431 Tested-by: Nitin Kolluru <nkolluru@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* usb_pd: use enum tcpc_rp_value instead of intCaveh Jalali2019-10-311-1/+1
| | | | | | | | | | | | | | | this changes the declaration and definitions of typec_set_source_current_limit() to take an enum tcpc_rp_value instead of int. BRANCH=none BUG=none TEST=buildall passes Change-Id: If633641a581eeb6085b94bc727e23fb57f7cd435 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889117 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* system.c: reset statics for testingCaveh Jalali2019-10-311-0/+7
| | | | | | | | | | | | | | | | | | | | this adds a function to reset the state information generated by system_common_pre_init() for testing scenarios that need to call it multiple times. on the EC, main memory (.data + .bss) is reinitialized across sysjumps, so this happens automatically, but we can't really do that from unit tests. so, add a function to reset the relevant static variables to emulate main memory getting reinitialized. BRANCH=none BUG=b:142031466 TEST=make buildall passes Change-Id: I1f65902c21ab6fc17c32388795cfef19c84d8cc8 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1855644 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* eSPI: Configure SLP_S3, SLP_S4 separatelyAbe Levkoy2019-10-301-1/+15
| | | | | | | | | | | | | | | | | | Split the configuration option CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS into separate options controlling SLP_S3 and SLP_S4. Allow volteer to configure SLP_S3 as a GPIO and SLP_S4 as an eSPI virtual wire. Cause a build error if virtual wires are configured, but eSPI is not. BUG=b:139553375,b:143288478 TEST=make buildall TEST=Build volteer with CONFIG_HOSTCMD_ESPI_VW_S4 defined but CONFIG_HOSTCMD_ESPI undefined; observe build error BRANCH=none Change-Id: I8c6737e2ccb1a77a882e5fa65c6eddb342209b61 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881758 Reviewed-by: Keith Short <keithshort@chromium.org>
* PCH_PLTRST_L: Use appropriate config optionAbe Levkoy2019-10-301-3/+0
| | | | | | | | | | | | | | | | | Define a GPIO for PCH_PLTRST_L based on CONFIG_HOSTCMD_ESPI, because that is the configuration option used to enable to use of the the GPIO signal name thus defined. Remove the now unused CONFIG_HOSTCMD_PLTRST_IS_VWIRE option. BUG=b:139553375,b:143288478 TEST=Build it83xx_evb, reef_it8320, and tglrvpu_ite BRANCH=none Change-Id: Ia0dbfee0c6c2eda566e79cad7ab6e0c685809c05 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1881756 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* Revert "smart_battery: add smbus error checking support"Caveh Jalali2019-10-303-27/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit daccb3adea9394116d7ab2c807e4a360cb5a93a1. Reason for revert: <INSERT REASONING HERE> broke USB-C charging. all we get now is: 2019-10-30 01:26:15 New chg p0[49.441303 CL: p0 s2 i500 v5000] 2019-10-30 01:26:16 C0 st5 2019-10-30 01:26:16 C0 Req [1] 5000mV 3000mA 2019-10-30 01:26:16 New chg p0[50.305144 CL: p0 s0 i500 v5000] 2019-10-30 01:26:16 C0 HARD RST RX 2019-10-30 01:26:16 C0 st4 2019-10-30 01:26:16 New chg p0[50.354280 CL: p0 s2 i500 v5000] 2019-10-30 01:26:17 C0 st5 2019-10-30 01:26:17 C0 Req [1] 5000mV 3000mA ... Original change's description: > smart_battery: add smbus error checking support > > Jacuzzi/Kodama has a unstable software controlled i2c bus, its data > transmission may be interrupted by other higher priority tasks and > causes device timeout. > > If timeout happens when ec is reading data, it has no knowledge about > what's happening on slave, and keep receiving bad data (0xFF's) until > end. The standard i2c/smbus error handling mechanism can not handle this > case, so we need the error checking feature from smbus 1.1 to ensure our > received data is correct. > > This CL adds the error checking (PEC) functions to i2c and smart battery > module. > > BUG=b:138415463 > TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST, > no failure after 100k read/writes. > test code at CL:1865054 > BRANCH=master > > Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3 > Signed-off-by: Ting Shen <phoenixshen@google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827138 > Reviewed-by: Denis Brockus <dbrockus@chromium.org> > Tested-by: Ting Shen <phoenixshen@chromium.org> > Commit-Queue: Ting Shen <phoenixshen@chromium.org> Bug: b:138415463 Change-Id: Ibd8a512dd6d43cca95628f698e7a66a695b7fc59 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889435 Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com>
* fpsensor: Clean up headers and MakefilesTom Hughes2019-10-282-17/+8
| | | | | | | | | | | | | | We no longer need the various levels of indirection since the source files are public. BRANCH=none BUG=b:137848573 TEST=make buildall -j Cq-Depend: chrome-internal:2005128 Change-Id: I7483c233dc54c5dbf2907441365feffc9ae9f0a5 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1869533
* smart_battery: add smbus error checking supportTing Shen2019-10-283-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Jacuzzi/Kodama has a unstable software controlled i2c bus, its data transmission may be interrupted by other higher priority tasks and causes device timeout. If timeout happens when ec is reading data, it has no knowledge about what's happening on slave, and keep receiving bad data (0xFF's) until end. The standard i2c/smbus error handling mechanism can not handle this case, so we need the error checking feature from smbus 1.1 to ensure our received data is correct. This CL adds the error checking (PEC) functions to i2c and smart battery module. BUG=b:138415463 TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST, no failure after 100k read/writes. test code at CL:1865054 BRANCH=master Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827138 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* NPCX GPIO: Assert that gpio_get/set_level is passed a GPIO signalEdward Hill2019-10-251-0/+9
| | | | | | | | | | | | | | | Ensure that IOEX and VW signals are not accidentally passed to NPCX's gpio_get_level or gpio_set_level. BUG=b:138600691 BRANCH=none TEST=saw assert when passing IOEX signal to gpio_set_level Change-Id: Ib3eea074a104820cea4095897f4174a84e8368d6 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854781 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb_port_power_smart: Add support for IO expander GPIOsEdward Hill2019-10-251-1/+11
| | | | | | | | | | | | | | Allow CONFIG_USB_PORT_POWER_SMART GPIO signals to be either local GPIOs or IO expander GPIOs. BUG=b:138600691 BRANCH=none TEST=CONFIG_USB_PORT_POWER_SMART with IO expander signals works on Trembyle Change-Id: Ic5273926ec4f428586370175a136bff68900a323 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854779 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* GPIO/IOEX/eSPI: Give different IO signals unique valuesEdward Hill2019-10-253-7/+41
| | | | | | | | | | | | | | | | | There are 3 different IO signal types used by the EC. Ensure they each use a unique range of values so we can tell them apart. 1) Local GPIO => 0 to 0x0FFF 2) IO expander GPIO => 0x1000 to 0x1FFF 3) eSPI virtual wire signals => 0x2000 to 0x2FFF BUG=b:138600691 BRANCH=none TEST=IO expander signals still work on Trembyle Change-Id: I63fadb4bb4573ed3dd121c24e3bd40a00873e29f Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854778 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* fuzz_host_cmd: Add fpsensor task + fp host cmdsCraig Hesling2019-10-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL enables the fpsensor task and adds the following remaining fingerprint host commands to the fuzzer: * EC_CMD_FP_PASSTHRU * EC_CMD_FP_INFO * EC_CMD_FP_FRAME * EC_CMD_FP_STATS * EC_CMD_FP_TEMPLATE BRANCH=none BUG=b:116065496 TEST=make buildall -j TEST=make run-host_command_fuzz TEST=# Pull in TEST_COVERAGE fix git fetch "https://chromium.googlesource.com/chromiumos/platform/ec" \ refs/changes/86/1725186/1 && git cherry-pick FETCH_HEAD make host-host_command_fuzz TEST_COVERAGE=1 timeout 5m ./build/host/host_command_fuzz/host_command_fuzz.exe llvm-profdata merge -sparse default.profraw -o default.profdata llvm-cov show build/host/host_command_fuzz/host_command_fuzz.exe \ --instr-profile=default.profdata --format=html --output-dir=cov # Inspect cov/.../common/fpsensor/fpsensor_state.c.html to verify Change-Id: Icad9493ba41cd4daa61a30246d01afd1dbe16c56 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1682945 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Sean Abraham <seanabraham@chromium.org>
* mock: Add fp_sensor and mkbp_events mocksCraig Hesling2019-10-253-0/+76
| | | | | | | | | | | | BRANCH=none BUG=b:116065496 TEST=make buildall -j Change-Id: Ia723d98354ca027f41f1b3c00d6a2dac500edbf8 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715633 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Sean Abraham <seanabraham@chromium.org>
* driver: g753: add driver supportLu Zhang2019-10-251-0/+1
| | | | | | | | | | | | | | | | g753 is used on akemi board. It's a temperature sensor, analog-to-digital converter, and digital over-temperature detector with SMBus interface. BUG=b:138426009, b:143046086 BRANCH=none TEST=use Akemi board, add g753 as temp sensor, boot the board and make sure temperature can be read from g753 Change-Id: Iefa1039628171170cf0ca322b462a29b33eb0df5 Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1857978 Reviewed-by: Philip Chen <philipchen@chromium.org>
* cleanup: clean up reference to power role vs cable plugJett Rink2019-10-242-9/+29
| | | | | | | | | | | | | | The PD header specifies the power role for SOP packets and cable plug for SOP' and SOP" packets. Refactor code to make this more obvious. BRANCH=none BUG=none TEST=builds and new stack runs on hatch Change-Id: I6cdb1561082d2142214ac65703ff42586b16d70b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1865986 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* cr50: Remove concept of U2F modeLouis Collard2019-10-241-5/+0
| | | | | | | | | | | | | | | | | | This was previously used to enable/disable U2F or the extended mode. This was never used to disable U2F, and the distinction between U2F and extended mode is no longer required. BRANCH=none BUG=b:133275654 TEST=build, U2FTest, enable g2f mode in u2fd, check attestation certification does not change across multiple registrations Change-Id: I323fa245bf23fb12ffed75fb8dcfc81913bafff7 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1786886 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* main: Initialize I2C pretty earlyAlexandru M Stan2019-10-243-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices (like the keyboard, CBI) need I2C access pretty early. Until now I2C would get initialized pretty late in a hook, which was far too late for some stuff. As a result from this change, CONFIG_I2C_MASTER now implies the i2c_init() function will be called at board boot. Some chips (cr50, host tests) needed a stub i2c_init in order to compile cleanly. BUG=b/138384267 TEST=EFS doesn't happen significantly later than it used to TEST=Recovery keys now work with I2C keyboard on jacuzzi TEST=make buildall TEST=Sanity check i2c behavior (booting, "i2scan", "battery") on a variety of ECs: * ampton (ite EC, x86 AP) * bobba (npcx EC, x86 AP) * jacuzzi (stm32f0 EC, ARM AP) * cheza (npcx EC, ARM AP) BRANCH=master Change-Id: Ifa830e8e509ff16b36b4dcc86617869b1cb86ac3 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772490 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cleanup: use power and data role enums instead of intJett Rink2019-10-241-6/+6
| | | | | | | | | | | | | | | Use first class enums types instead of int for power and data role. BRANCH=none BUG=none TEST=builds and new stack works with single charger on C1 hatch Change-Id: Ied4562e6a148803140cf277bd229b6c3ed801470 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1865985 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* usb: fix out bounds issue for non-SOP* packetsJett Rink2019-10-231-3/+3
| | | | | | | | | | | | | Non SOP* packets (e.g. hard reset) do not have a message counter, so do not try to access the message counter field. BRANCH=none BUG=chromium:1016109 TEST=reproduced fuzz failure locally then verified fix with prints Change-Id: I2e46b43988cba92636eb9da7f86448b037fbc0a8 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1872602
* usb: Remove invalid data role from enumJett Rink2019-10-231-1/+0
| | | | | | | | | | | | | | | | The data role as defined in the USB spec is 1 bit. Disconnected does not fit and no one is using it properly. All users of Disconnected value alias the value to DFP anyway. Just use DFP explicitly BRANCH=none BUG=none TEST=builds and runs new stack on hatch Change-Id: I5c7dddea8f34c8e3c524da8701913c87c23b42b2 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1865984
* usb_mux: Add driver for AMD FP5 USB/DP MuxEdward Hill2019-10-232-0/+4
| | | | | | | | | | | BUG=b:138600585 BRANCH=none TEST=build Change-Id: I547309c7000e7d3ca8549a7e626a63789665305d Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1868921 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* system.c: move jump_data declarations into sysjump.hCaveh Jalali2019-10-231-0/+46
| | | | | | | | | | | | | | | this moves the jump_data related declarations out of system.c into a dedicated sysjump_impl.h header file. this will make it possible to implement unit tests for sysjump. BRANCH=none BUG=b:142031466 TEST=make buildall passes Change-Id: I7df3d24e1f9c0f203656ee8dddc234b64e2dc8c3 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1855647 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: add __test_only attributeJack Rosenthal2019-10-221-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | For functions which should only be used in test builds, this lets us add __test_only to the prototype, causing an error if used outside of tests. Example error output: test.c: In function ‘main’: test.c:17:5: error: call to ‘foo’ declared with attribute error: This function should only be used by tests foo(); ^~~~~ This will not cause errors if the usage is guarded by a disabled IS_ENABLED (or any other form of optimized-away branch). BUG=none BRANCH=none TEST=see above Change-Id: I64115fd9e7940de9b10063a46548e8d00033d1d3 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1872962 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* common: make __error discard symbols on clangJack Rosenthal2019-10-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | The clang compiler is used by the fuzz tests, and while clang does not have support for the error attribute in GCC, we can do our best to make sure that errors are raised on clang where appropriate by placing functions defined with __error in the special section "/DISCARD/", which the linker discards. An error like below is shown when compiling in clang: `foo' referenced in section `.text' of foo.o: defined in discarded section `/DISCARD/' of /tmp/foo.o BUG=none BRANCH=none TEST=see above error output when __error is used on clang Change-Id: Id58131578f67b9dff7e58e5df58b3509d6046138 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1874382 Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* panic.h: include required stdint.hCaveh Jalali2019-10-181-2/+3
| | | | | | | | | | | | | | | | | panic.h uses types from stdint.h, so it should really include it by default. also, order standard header files ahead of project specific header files. BRANCH=none BUG=b:142031466 TEST=make buildall passes Change-Id: I8ac6d42f1da412bd3ce20df2838b8e420ad25e52 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1855643 Tested-by: Caveh Jalali <caveh@google.com> Commit-Queue: Caveh Jalali <caveh@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* charge: allow boards to customize max battery poll timeJett Rink2019-10-161-0/+3
| | | | | | | | | | | | | | Some designs need to keep their battery from going to sleep. Allow boards to specify their max delay for polling the battery. BUG=b:133375756 BRANCH=octopus TEST=Verify access battery once per 10 seconds by ec console. Change-Id: I7e70a45fe643af567434f8187344e0e0d18d733c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1865253
* pd: Add PE FRS unit test for new stackDenis Brockus2019-10-162-0/+13
| | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I55453ddf1d1da0fdee902a33e14357716fb12c4a Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1859826 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usbc: make pe_init() staticEdward Hill2019-10-151-7/+0
| | | | | | | | | | | | | | pe_init() is called via pe_run(), so make it static. BRANCH=none BUG=none TEST=build Change-Id: I56928369e50a2022fc7e2aee2f68f09ebe7c06b6 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1850191 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usbc: rename exe_state to run_stateEdward Hill2019-10-151-1/+1
| | | | | | | | | | | | | | | | | Just a simple rename. run_state() seems more readable to me, and "run" is used in many of the related functions and comments. exe_state used to be called sm_run_state_machine before the great refactoring of CL:1733744. BRANCH=none BUG=none TEST=build Change-Id: I5fe9e5b98042d7a5b9b9e9bde48ebecbda420458 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1848970 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usbc: remove evt_timeout from struct type_cEdward Hill2019-10-151-16/+0
| | | | | | | | | | | | | | | | Simplify the pd_task loop timeout by making it a fixed 5 milliseconds. If there is nothing to do then it shouldn't take long to realize this. This allows removal of evt_timeout, tc_set_timeout, tc_get_timeout. BRANCH=none BUG=none TEST=usbc unit tests (make -j runhosttests) Change-Id: I067309b191e5118fbe9e89a92a650fa837fb75fa Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1857216 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: Comment typo correctionCraig Hesling2019-10-151-1/+1
| | | | | | | | | | | | | | Corrects the spelling of "functions". This is more text than the actual diff. BRANCH=none TEST=none BUG=none Change-Id: Id911bf020d8db9b1d6ad7bfb62d431c5114a64d8 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854659 Reviewed-by: Jett Rink <jettrink@chromium.org>
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