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* ec: change usage of "sane" per inclusive languagePaul Fagerburg2020-07-224-6/+6
| | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the terms "sane", "sanity check", and similar with inclusive/non-stigmatizing alternatives. BUG=b:161832469 BRANCH=None TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows results only in third-party code or documentation. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169 Reviewed-by: Jett Rink <jettrink@chromium.org>
* charge_state_v2: add function to check batt current is stableEric Yilun Lin2020-07-221-0/+9
| | | | | | | | | | | | | | | This function would be useful to know if the battery current is in a stable state. BUG=b:160448099 TEST=make buildall BRANCH=kukui Change-Id: I97a25a41b94dd40e2b324052841ec4bec95ee716 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309523 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* OCPC: Calculate system & battery resistanceAseda Aboagye2020-07-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to optimize charging from the auxiliary charger, we need to calculate the system resistance as well as the battery resistance. This allows some charger ICs to compensate for the losses from their output node to the battery. In order to perform this calculation, we must do it when the AP is off (or in suspend) which provides the condition that nearly all of the charge current is entering the battery and isn't being largely consumed by the rest of the system. The combined Rsys+Rbatt calculation is relatively straightforward as it's the delta between the VSYS output and the battery voltage divided by the current entering the battery. In order to separate out the two terms, we can look at the delta between the VSYS output and the VSYS node that's connected to the BFET as well as look at the egress current from the auxiliary charger and the current entering the battery. This commit adds this system resistance measurements and enables it for the RAA489000. The resistances are updated in S5/G3 when charging from the auxiliary charger every ~2.4s. BUG=b:148980020 BRANCH=None TEST=Build and flash waddledoo, verify that charging continues to work in all power states and battery can become full. TEST=Verify that charge current is still close to the target without excessively exceeding it. TEST=Verify charging in constant load via `stressapptest`. TEST=Verify charging in bursty workload via `stressapptest` with pauses for power spikes while monitoring charge current with a current probe. TEST=Verify charging works out of battery cutoff from the auxiliary charger. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I1faa3a0b2b3d8f4fd44d72cd1f546226268df0c6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290058 Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* battery: Expose battery_manufacture_date() as APIWai-Hong Tam2020-07-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | The newer kernels request this data. Add the battery_manufacture_date() as a new API. Checked the TRMs of the following batteries. They don't have any way to query the manufacture date, so return EC_ERROR_UNIMPLEMENTED. * bq27541 * bq27621_g1 * max17055 * mm8013 BRANCH=None BUG=b:160784792 TEST=Hacked to print the manufacture date, on both battery present and not. Change-Id: I1deefb64f6cc594828d6c10c42fa7107dadd7559 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300689 Commit-Queue: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* TCPMv2: add unit tests for packet discard logicPaul Fagerburg2020-07-203-1/+26
| | | | | | | | | | | | | | Add unit tests for the packet discard logic for packets while going into SinkTxNG. BUG=b:160622527, b:161174072 BRANCH=None TEST=`TEST_LIST_HOST=usb_prl make runhosttests` Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: Ied7689d2fe40da93069e58b53ea32e053ab887b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300690 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Add thunderbolt entry flow for active cableli feng2020-07-181-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Order of Enter Mode: SOP', SOP''(if supported), SOP Order of Exit Mode: SOP, SOP''(if supported), SOP' Entry flow start from TBT_START, state changes to TBT_ACTIVE if succeed; changes to TBT_INACTIVE if fail. Handling of NAK If any enter mode SOP* is NAK'ed, exit modes of all SOP* and retry enter. If any enter mode in retry is NAK'ed again, will exit modes of all SOP*, TBT entry failed. Special case: Exit in TBT_ACTIVE: start from TBT_ACTIVE, exit all modes of SOP*, then chagne state to TBT_INACTIVE. BUG=b:148528713 BRANCH=none TEST=1. Attach Thunderbolt dock and active cable, DUT enter Thunderbolt mode 2. Attach Thunderbolt dock and passive cable, DUT enter Thunderbolt mode Signed-off-by: li feng <li1.feng@intel.com> Change-Id: Iaaa63f70c4abc9c269cdbb2a504214f924155901 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277487 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* battery: Fix obtaining battery manufacture dateWai-Hong Tam2020-07-171-1/+1
| | | | | | | | | | | | | | | * Fix the typo: should be SB_MANUFACTURE_DATE (manufacture without r) * Fix the register, i.e. SB_MANUFACTURE_DATE, not SB_SPECIFICATION_INFO * Fix the format parsing. The LSB of year is bit-9, not bit-8. BRANCH=None BUG=b:160784792 TEST=With the later CL, checked the manufacture date. Change-Id: I5b5f2bfefec4bbe700bb1ec0d9d6048123f4ad16 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300688 Reviewed-by: Douglas Anderson <dianders@chromium.org>
* TCPMv2: Add common function for DPM entry and exit modeAyushee2020-07-171-12/+2
| | | | | | | | | | | | | | | | Added a common entry point into DPM for entering or exiting modes. BUG=b:155890173 BRANCH=None TEST=Tested on volteer, able to enter and exit 1. DisplayPort mode with type-C dock 2. Thunderbolt mode with a Thunderbolt dock Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I3bb996d96d0fff543ad7a2e1dc8e09d0b17d0171 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299840 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add common exit mode for all the alternate modesAyushee2020-07-174-18/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | When chipset is transitioning to a new state or on sysjump, the SOC re-negotiates to enter an alternate mode on booting up. This commit: 1. Adds a common DPM function to check for all the active alternate modes one at a time, construct the VDM and send the DPM request to exit the mode. 2. Marks thunderbolt mode as inactive in DFP's thunderbolt mode exit function. BUG=b:152235216 BRANCH=None TEST=Tested on volteer: 1. On connecting a DP dongle, able to enter into DP alternate mode on reboot 2. On connecting a Thunderbolt dock, able to enter into Thunderbolt mode on reboot Change-Id: I7da6a4b08cab9abb3446c0dafdc7c9e9378ef00e Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2270877 Tested-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Add USB4 mode support for passive cableAyushee2020-07-173-0/+80
| | | | | | | | | | | | | | | | | | | To support USB4 mode on TCPMV2 this commit: 1. Checks if the port, port partner and cable is USB4 capable and if so enters into USB4 mode 2. Adds a new state PE_ENTER_USB to the PE state machine which sends the data message to enter into USB4 mode and on receiving an ACK from the port partner, sets the mux to USB4. BUG=b:156749387 BRANCH=None TEST=Tested on Volteer, able to enter into USB4 mode Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I3dac12a204a724037681037f98eaf797d4e02f20 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277827 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* USB PD: Move board FRS configuration out of TCPCIEric Herrmann2020-07-171-0/+9
| | | | | | | | | | | | | | | | | Board FRS configuration is more board-specific than TCPC-specific. Move the board FRS configuration from TCPCI to usb_common. Implementing the board-level frs configuration is optional for each project. BUG=b:148144711 TEST=Can build volteer image with CONFIG_USB_PD_TCPC set BRANCH=none Change-Id: I43d13ec0b23f71273807f58db35e7dd333089efa Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290838 Reviewed-by: Keith Short <keithshort@chromium.org>
* tcpmv2: Add usb_tcpmv2_tcpci testEdward Hill2020-07-151-0/+14
| | | | | | | | | | | | | | | | | | | | Add a new test that runs a full set of TCPMv2 layers and state machines, talking to a simulated TCPC via I2C. Initial test cases: 1) Plug in a non-PD power supply -> we connect as sink. 2) AP S5 > S3 > S0 -> auto-toggle + low power. BUG=b:161167893 BRANCH=none TEST=make -j run-usb_tcpmv2_tcpci Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: If8b8eb2cca722ed01cbe1d6000fb3e4f4b70149c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283911 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv1, TCPMv2: add pd event for receiving hard resetRuibin Chang2020-07-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When we receive hard reset message, we call pd_execute_hard_reset() and set task to hard reset state, but the waked up pd_task() may have chance setting to other state. So I add a pd event for receiving hard reset, then waked up pd_task() set the state to hard reset. TCPMv1: When we are in SNK_HRAD_RESET_RECOVER state, we enable rx. At this time If port partner sends source capability, HW auto responds GoodCRC, but in SNK_HRAD_RESET_RECOVER state the handle_data_request() can't process source capability then break the case. So partner sender response timeout and tx hard reset. So I move the enable_rx() to SNK_DISCOVERY state that we are able to handle source capability. BRANCH=None BUG=b:159394180 TEST=On board reef_it8320, and it81202_pdevb: 1.TCPMv1: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. 2.TCPMv2: Rx Hard reset -> done Vbus cycle, and keep cc connection, When we're SRC and SNK. Change-Id: Ia4944883f4ee0420183cb4d1ec62743c49386ea3 Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1389992 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* tcpmv1: Debounce low power mode exitKeith Short2020-07-141-2/+3
| | | | | | | | | | | | | | | | | | Adds a 25ms delay when exiting low power mode. Some TCPCs are slow to update the CC_STATUS register when exiting low power mode when a non-PD charger is connected. BUG=b:155364505 BRANCH=none TEST=make buildall TEST=connect 15W non-PD charger to Volteer C1 port running TCPMv1. Verify charging starts. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ia9579029caa0db0886bcc1a49e8b194173b8ca7e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2267681 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* i2c: For updates, skip write if value unchangedEdward Hill2020-07-131-0/+8
| | | | | | | | | | | | | | | | In i2c_update8/16 and i2c_field_update8/16, if the new value is the same as the old value, then skip the unnecessary i2c_write8/16 of the new value, if CONFIG_I2C_UPDATE_IF_CHANGED is defined for the board. BUG=none BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ib4ec3a50c1f7b5bf5e088196489c0ff55e88d006 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283850 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* OCPC: Use enum chg_id valuesDiana Z2020-07-111-3/+0
| | | | | | | | | | | | | | Remove redundancy between the OCPC header and "enum chg_id" BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4058e2395ec1cbd50ce197775eb07d3bcfad95f3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277834 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Charger: Add dynamic charger chip countDiana Z2020-07-111-1/+2
| | | | | | | | | | | | | | | | Different DB options may cause different numbers of charger chips to be present on the system. Remove constant count for charger chips, and instead always call into the overridable function to query the count. BRANCH=None BUG=b:155963446 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I0e65b8af351ecabe6f7b823e0e56f1932cc280a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277833 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tcpmv2: perform partner reset on startup, remove BBRAMJett Rink2020-07-103-6/+6
| | | | | | | | | | | | | | | | | | | | | | | - Reset the port partner by applying CC Open on both CC lines - Reuse the existing error recovery state to apply CC values - Extend error recovery timer to 240 msec to account for us being able to source Vconn - Since we always reset on startup, we don't need to store previous contracts in BBRAM. BRANCH=none BUG=b:159495742,b:158802939 TEST=see that we apply CC Open upon reset TEST=see that we do not get a fault on Trembyle went setting CC open TEST=apple 3-1 dongle with display port and power on Puff will come back with power and display after a `reboot` EC command (which will trigger the ErrorRecovery brownout path) Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: Iaac09d62e4a31557492cebb354d3a34371c1e9bb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2271002 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tests: reset the PD task before every test caseJett Rink2020-07-101-1/+5
| | | | | | | | | | | | | | | | | In order to isolate each test and make each test run from a clean state, reuse the TASK_RESET_DONE event to signal to the test code that we should just jump back to the beginning of the PD task BRANCH=none BUG=none TEST=see that tests are reset in child CLs Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I3c0408ab0dbc3ad3a26f17aadbda1577ffc7d32f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290650 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* bmi260: Add support for using compressed configKeith Short2020-07-101-0/+10
| | | | | | | | | | | | | | | | | | | | Add a new config option CONFIG_ACCELGYRO_BMI160_COMPRESSED_CONFIG for boards that need to save space. This is intended to be a temporary option until the BMI260 config file can be read from the AP at runtime. This option saves 916 bytes in RW flash space on Volteer. BUG=b:160330682 BRANCH=none TEST=make buildall TEST=boot Volteer, run "ectool motionsense" to verify sensor data is valid. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I294e5e0c3f919527b51e6f7361e74c7bf4afc543 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289216 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* tcpmv2: Debug prints for flags and eventsEdward Hill2020-07-101-4/+0
| | | | | | | | | | | | | | | Define DEBUG_PRINT_FLAG_AND_EVENT_NAMES to print flag names when set and cleared, and event names when handled by tc_event_check(). BUG=none BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: If7c294213af47b8277b01b9898583ceb2559e7f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284259 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* usbc: ensure we are suspending USB-C ports on shutdownJett Rink2020-07-092-10/+14
| | | | | | | | | | | | | | | | | | | | | | After CL:2208221, the check for the PD_CMD task no longer trigger, so we end up not calling suspend on our TCPC ports. We want to continue to suspend, which will apply CC open in TCPMv2 for a cooperative shutdown Also, correct override keyword usage for board_get_usb_pd_port_count since I had to touch those definitions to make IS_ENABLE work BRANCH=none BUG=b:160243292 TEST=See that software sync reboot, applies CC open (and browns out system) Change-Id: I00bf08c7d347441d77834e2c5122a09ca2316280 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276318 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* audio_codec: add the command to reset I2S RXYu-Hsuan Hsu2020-07-081-0/+1
| | | | | | | | | | | | | | | | | | Adds EC_CODEC_I2S_RX_RESET to reset I2S RX because it is not sure that the I2S RX is always disabled when the kernel booting. For example, it will keep enabled if the kernel crashes while cros_ec_codec is used. BRANCH=none BUG=b:158316196 TEST=Able to reset I2S RX from the kernel. Change-Id: I461e5a3c73a4066a9ceb097fc5320aef98d81db4 Signed-off-by: Yu-Hsuan Hsu <yuhsuan@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284503 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org> Tested-by: Yu-Hsuan Hsu <yuhsuan@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* Revert "TCPMv2: make sure Vbus is not sourced in AttachWait.SRC"Denis Brockus2020-07-081-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Commit sha 57b95363c05bdab7b7e57d553a9514128393247d Reverting a CL that was a temporary fix while a real solution was found. This will now be implemented with the following CLs https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282691 https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282699 https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697 BUG=none BRANCH=none TEST=make buildall Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I76b92388f5ee5bae4bdb945a82f18eb3df3ab1fd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284728 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* TCPMv2: manual control to DBG_ACC in TCPCDenis Brockus2020-07-081-0/+8
| | | | | | | | | | | | | | | | | | | | With TCPCI being changed to allow TCPM to control the DBG_ACC enable instead of the TCPC, it is probably a good idea to actually toggle the bit for any TCPC that uses this signal for internal logic. BUG=b:160253746 BRANCH=none TEST=verify DBG and nonDBG attaches Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ifb91afa0127689e0ca371e64495d80f30bf93c26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* tcpmv2: remove tc_restart indirection layerJett Rink2020-07-071-8/+0
| | | | | | | | | | | | BRANCH=none BUG=none TEST=builds Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I2beaa8b74b313d225b9166f324d2b44cb0aa59ce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276317 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Correct state control flow descriptionAbe Levkoy2020-07-071-3/+7
| | | | | | | | | | | | | | Child run functions execute before parent fun functions, not after. Make additional minor corrections and clarifications. BUG=none TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ic1b345e42269c9086f77bb6d9fe54d3f91b1002e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277210 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb_pd: Move 'is_vdo_present()' and 'is_usb4_vdo()' to TCPMv1Ayushee2020-07-061-21/+0
| | | | | | | | | | | | BUG=b:156749387 BRANCH=None TEST=make buildall -j Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: I8ecffd3084de472ec3d145c3ff69df1ca2d89a56 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278562 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* usbc: only try to use ppc_set_frs_enable if it existsPeter Marheine2020-07-061-0/+2
| | | | | | | | | | | | | | | | The driver function to set FRS enable only exists if CONFIG_USB_PD_FRS_PPC is enabled, so we must also make its callers conditional in the same way. For consistency, also revise the TCPC FRS code paths to be conditional. BUG=b:146393213 BRANCH=None TEST=make buildall Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I3fb14c711dd2abdf6ef77d469b2103f37daac182 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276125 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* ppc: string de-duplicationKeith Short2020-07-021-0/+17
| | | | | | | | | | | | | | | De-duplicate strings in PPC drivers. Saves 312 bytes on Volteer. Average flash increase of 211 bytes. BUG=b:158572770 BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I5ca5c935f974b04216ce4d90e6f6d6b9103e8b75 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278586 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: make sure Vbus is not sourced in AttachWait.SRCDenis Brockus2020-07-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | The TCPC on zork appears to enable Vbus sourcing some of the time when we come out of auto-toggle. It looks like about a 60ms delay before it is enabled. We then go to AttachWait.SRC and since the exit condition to get to Attached.SRC is a debounced/valid Attached.SRC CC and Safe0V, it has to be disabled manually in order to move to Attached.SRC BUG=b:160227699,b:160253746 BRANCH=none TEST=dut-control servo_v4_role:snk should attach Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I1dfc5d2536aaa4d7a5ffc7bbb52c647b15764196 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276463 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* tcpm: allow returning a status from set_frs_enablePeter Marheine2020-07-012-2/+5
| | | | | | | | | | | | | | | | | | | | | The old declaration with void is incompatible with the use of tcpci_tcpc_fast_role_swap_enable in the one driver that currently implements that function, causing build failure when CONFIG_USB_PC_FRS_TCPC is enabled and using the nct38xx TCPC driver. Because the underlying function may fail, walk up the stack and make all users capable of failure as well (however the top level user currently ignores the result). BUG=b:146393213 BRANCH=None TEST=make buildall Change-Id: Ib8cabf4a435731ed804a3cc4696dfea97eef3c98 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276124 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Add Entry flow for Thunderbolt modeAyushee2020-06-301-0/+65
| | | | | | | | | | | | | | | | | | | | Create a separate module for representing Thunderbolt mode which decides whether and how we can enter into Thunderbolt alternate mode. Modify the Device Policy Manger (usb_pd_dpm.c) to first check if the port partner and cable is a Thunderbolt Compatible. If not, continue the rest of the PD flow undisturbed. BUG=b:148528713 BRANCH=none TEST=1. Attach Thunderbolt dock, DUT should enter Thunderbolt mode 2. Attach Type-C dock, DUT should enter DP mode 3. Attach DP dongle, DUT should enter DP mode Change-Id: I369eb6337144676996c9d94a412eec060eacd273 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2250488 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* driver/bc12: implement mt6360 driverTing Shen2020-06-291-1/+3
| | | | | | | | | | | | | BUG=b:151802370 TEST=with CL:2189624, verify bc12 detection works correctly BRANCH=master Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I0fee8e7309178be4d933ed5c246ea107ca5931bf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2117871 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* ps8xxx: patch ps8815 A1 chip Device IDCaveh Jalali2020-06-291-0/+6
| | | | | | | | | | | | | | | | | | | | | | this adds a config option for the ps8815 to override the TCPCI Device ID field based on the chip hardware revision reported in vendor defined registers. early ps8815 A1 firmware still reports the same Device ID value as the A0 chip which makes the two chips indistinguishable using standard methods. so, we check a vendor defined register to distinguish the two parts and "patch" the Device ID. newer ps8815 firmware will correct this, so after we have flushed out early firmware, we can disable this override feature. BRANCH=none BUG=b:158857815,b:159289062 TEST=reflashed FW on ps8815 A0 and A1 Change-Id: I2db3150740c15a77836dea0e9db72e5d99fdc050 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2254992 Tested-by: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* TCPMv2: Add PE State name to pd state console commandSam Hurst2020-06-271-0/+17
| | | | | | | | | | | | | Some faft_pd tests need to query which state the pe state machine is in. BRANCH=none BUG=b:159682253 TEST=make -j buildall Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I1782761328212f45bd690fd7285f016cf9285538 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2264484
* usb_pd: Remove pd_cable dependent Thunderbolt code from common codeAyushee2020-06-261-55/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | 1. Separated the common functions needed to check for port/cable's Thunderbolt mode compatibility back into TCPMv1. 2. Refactored the common Thunderbolt mode functions using pd_cable structure for mode information by adding a. Generic function that returns the Discover Mode response of specified SVID. b. Thunderbolt specific functiion that returns Discover Mode response of Intel SVID. 3. Removed the redundant pd_cable structure from DRP state machine policy engine. BUG=b:158294748 b:150611251 BRANCH=None TEST=1. Able to enter into Thunderbolt mode on TCPMv1 Change-Id: I30c8f1a007228408e08520502db00601ca3a2521 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2249020 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Report message discard to the PEDiana Z2020-06-252-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit creates a reporting function for the PRL to let the PE know when messages have been discarded. States will have to handle message discard internally since the response depends on the portion of the AMS sequence they're in. For some states which begin AMSes, a new shared parent has been added which runs the sender response timer and checks discard for the child. More states (and discard mid-AMS) are expected to be added in future CLs. The new parent state saves an average of 124 bytes of flash space. BRANCH=None BUG=b:158248741,b:157228506 TEST=on waddledoo, Dell dock no longer soft resets during power role swap Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I61b3e96e1d14634dcd5edda4e133968ace769b21 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241577 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* usb_pd: Remove pd_cable usage from common codeAyushee2020-06-251-30/+11
| | | | | | | | | | | | | | | | | | | Previously, the Discovery Identity SOP' response for TCPMv1/2 was being stored in pd_discovery and in pd_cable. This commit removes the storage of Discover Identity SOP' response from the pd_cable structure. BUG=b:158294748 b:159504972 BRANCH=None TEST=1. Able to get the cable characteristics 2. Able to enter into Thunderbolt mode on TCPMv1 3. Able to enter into USB4 mode on TCPMv1 Change-Id: I1e5112f9aa158c41abb6226a3819f1612ed906bd Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2247211 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* tcpm: Change the get_chip_info() to prevent race conditionsWai-Hong Tam2020-06-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original get_chip_info() returns a point of point to the chip_info. This way helps to cache the chip_info to a static variable and the function just returns the pointer to the static variable. This static variable has a race condition on the PS8805 chip. The PS8805 chip returns a different PID when the firmware is corrupted, i.e. 0x8803 instead of 0x8805. The !live case fixes the PID, by modifying the static variable directly. When another task calls the same function for the live case, the static variable is modified and has a race condition. This change fixes the issue by changing the get_chip_info() parameter to a point of the chip_info. The caller has to allocate a buffer in the stack and pass the address to the function. For the !live case, the function copies the cache value from the static variable to the buffer. So the static variable doesn't have a race condition. BRANCH=None BUG=b:159588335 TEST=Used ectool to check the PD chip PID 0x8805 (was 0x8803). localhost ~ # ectool pdchipinfo 1 vendor_id: 0x1da0 product_id: 0x8805 device_id: 0x1 fw_version: 0x0 min_req_fw_version: 0x0 Change-Id: Ic24615af77ea58016d286480572d2a282c4fa09a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2264477 Reviewed-by: Julius Werner <jwerner@chromium.org>
* TCPMV2: Add support for sending Alert MessagesSam Hurst2020-06-253-0/+21
| | | | | | | | | | | | | Add support for sending Alert OVC and OVP messages BRANCH=none BUG=b:117854867 TEST=make -j buildall Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: Ia436c8869880897ea9af0c2c2b0d6e9288831a8f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2229285 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tcpm: add attached_wait decision to common after auto-toggleDenis Brockus2020-06-241-1/+8
| | | | | | | | | | | | | | | | | | Need to verify auto toggle connections and non auto toggle connections still work. I will verify on trembyle BUG=b:159736927 BRANCH=none TEST=check basic functionality Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I378ddf520026591d8129986078875ce46f1e0ad8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2264472 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Refactor DP mode to use a state machineAndrew McRae2020-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Refactor the DP alt mode handling to use a state machine to process the commands, ACKs and NAKs. Also add states to handle detecting a NAK on a DP mode enter command, and attempt to exit the mode and then retry. When a partner enters alt mode (e.g a monitor with DP alt mode), and the EC is reset or goes into recovery mode, the new negotiation will fail because the command to enter alt mode when the partner is already in that mode will fail with a NAK. BUG=b:159073520 TEST=Tested on duffy with a type-C monitor. BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I0b4506b17987ba71e51f019910db84b32a6da2c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256620 Reviewed-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org>
* tcpmv2: only enable AutoDischargeDisconnect when attachedDenis Brockus2020-06-241-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Connecting a non-PD charger the DUT performs a TRY switch to become SRC. During this TRY path the AutoDischargeDisconnect had been enabled and the fact the non-PD charger will never allow Vbus to drop to Safe0V causes the fault. AutoDischargeDisconnect should only be enabled when there is a known stable attach and when this stops being the case the feature should return back to disabled. Verified on Trembyle NCT3807 platform BUG=b:158751942 BRANCH=none TEST=verify try does not fault on 5V charger Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I9ab507a1bbc5b84948620b6174f946f07befde90 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2250092 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* include/chipset: Define dummy init_reset_log if no CHIPSET task.Nicolas Boichat2020-06-231-5/+7
| | | | | | | | | | | BRANCH=none BUG=b:159571683 TEST=make BOARD=krane -j tests Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Change-Id: I77212f0ff3215270c0e466f2220d64e267c18efb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256632 Reviewed-by: Jett Rink <jettrink@chromium.org>
* include/power: Add dummy power_get_state if no CHIPSET taskNicolas Boichat2020-06-231-0/+6
| | | | | | | | | | | BRANCH=none BUG=b:159571683 TEST=make BOARD=krane -j tests Change-Id: I0484bbb5b6dcb0703aace88be59248968a662bb5 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256631 Reviewed-by: Jett Rink <jettrink@chromium.org>
* it83xx: add option to reset PD contract in power-on resetDino Li2020-06-231-0/+11
| | | | | | | | | | | | | | | | This CL allows to reset PD contract in power-on reset. It applies to situation of EC's VBAT won't go low when system's power isn't presented. BUG=b:154670981 BRANCH=none TEST=PD contract gets cleared when power-on reset even VBAT keeps high Change-Id: I2c8d185725542bb77fadfe6cb0497e0aace8aee2 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208343 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Do not reset negotiated PD revision level during soft resetPatryk Duda2020-06-231-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | PD3.0 6.2.1.1.5 Specification Revision clearly states that negotiated Specification Revision level should be used until Detach, Hard Reset or Error Recovery happens. Current implementation of soft reset performs full reinitialization of PRL state machines, flags, counters including negotiated Specification Revision level. As a result when sending PD_CTRL_SOFT_RESET DUT was waiting for SinkTxOk, but it was never observed because ServoV4 was running PD2.0 stack. This issue was fixed by separating parts of SM_INIT state which shouldn't be reset during soft reset. BUG=b:158996004 BRANCH=none TEST=Flash nocturne with firmware which contains fix. Make sure ServoV4 runs PD2.0 revision. Run firmware_PDResetSoft test, make sure that hard reset doesn't occur. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I852817a63772dbc8baab74ff6b0c425228b2f49b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2246020 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: add CONFIG_POWER_SIGNAL_RUNTIME_CONFIGZick Wei2020-06-232-0/+7
| | | | | | | | | | | | | | This patch add config: CONFIG_POWER_SUGNAL_RUNTIME_CONFIG to allow board modified power signal gpio if needed. BUG=b:150278507, b:152841287 BRANCH=none TEST=make buildall Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I5c885f9cb3400f3354a18b6d497340dfe3ad993b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256624 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* npcx: Add a new flag to check for initial power-onAndrew McRae2020-06-233-13/+14
| | | | | | | | | | | | | | | | | | | | | The CR50 will reset the EC on some platforms after power-on. Add a reset flag to detect this and treat the second restart as a power-on restart rather than reset. Subsume the CONFIG_GPIO_INIT_POWER_ON_DELAY_MS config to make it clear what the behaviour will be. BUG=b:151329011 TEST=Confirm on dalboz, puff & variants that second reset is treated correctly. BRANCH=none Change-Id: Ib66de920403f08099b87d1eff797270606b44f8f Signed-off-by: Andrew McRae <amcrae@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2255830 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org>
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