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* cr50: Add SPI hashing commandRandall Spangler2018-02-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows hashing or dumping SPI flash from the Cr50 console even on a locked device, so you can verify the RO Firmware on a system via CCD. See design doc: go/verify-ro-firmware (more specifically, "Cr50 console commands for option 1") BUG=chromium:804507 BRANCH=cr50 release (after testing) TEST=manual: # Sample sequence spihash ap -> requires physical presence; tap power button spihash 0 1024 -> gives a hash; compare with first 1KB of image.bin spihash 0 128 dump -> dumps first 128 bytes; compare with image.bin spihash 128 128 -> offset works spihash 0 0x100000 -> gives a hash; doesn't watchdog reset spihdev ec spihash 0 1024 -> compare with ec.bin spihash disable # Test timeout spihash ap # Wait 30 seconds spihash 0 1024 -> still works # Wait 60 seconds; goes back disabled automatically spihash 0 1024 -> fails because spihash is disabled # Presence not required when CCD opened ccd open spihash ap -> no PP required spihash 0 1024 -> works spihash disable # Possible for owner to disable via CCD config ccd -> HashFlash is "Always" ccd set HashFlash IfOpened ccd lock spihash ap -> access denied # Cleanup ccd open ccd reset ccd lock Change-Id: I27b5054730dea6b27fbad1b1c4aa0a650e3b4f99 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/889725 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Fizz: Execute PMIC reset before vboot_mainDaisuke Nojiri2018-02-081-0/+5
| | | | | | | | | | | | | | | | | | | When AP requests cold reboot, currently EC does not perform PMIC reset because chipset_handle_reboot is executed only after EC jumps to RW. This causes EC to miss CHIPSET_STARTUP and CHIPSET_RESUME events because power rails do not cycle. This patch will make EC execute PMIC reset to before vboot_main. BUG=b:73093795 BRANCH=none TEST=reboot, reboot ap-off, verify USB ports are powered after transitionining to dev mode. Change-Id: Ic04395d8a4bff45d9fc60601b07c600dfb75d9c0 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/908094 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* charge_state_v2: Store battery information in new structuresNicolas Boichat2018-02-074-17/+48
| | | | | | | | | | | | | | | | | | | On dual battery systems, this allows to keep both batteries information in similar structures. This also means that battery information can only be fetched via host commands EC_CMD_BATTERY_GET_STATIC/DYNAMIC (next CL will make it possible to fetch the information via shared memory/ACPI). BRANCH=none BUG=b:65697620 TEST=Boot lux/wand, dual-battery algorithm works, AP can fetch both battery information via host commands. Change-Id: I3c087e8f378c5cef0006f6bfe58335228a880e5b Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/888381 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* common: Add support for PWM LEDs.Aseda Aboagye2018-02-052-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for a common framework for PWM controlled LEDs. If there are multiple LEDs, they will all follow the same pattern. The pattern is such that it follows the Chrome OS LED behaviour specification, essentially a similar version of led_policy_std.c but for PWM controlled LEDs. To use this framework, a board must do the following: - First, define the number of logical PWM LEDs which will be controlled by this common policy, CONFIG_LED_PWM_COUNT. - Then declare those logical LEDs and define the PWM channels that comprise those LEDs. (struct pwm_led pwm_leds[]). - Next, define what each color should look like (struct pwm_led led_color_map[]). By default, the colors follow the recommended colors in the LED behaviour spec, which assume an LED with a red and green channel. If a board differs or wishes to change the colors in general, they can redefine the colors (CONFIG_LED_PWM_*_COLOR) as they see fit. The colors must be one in enum ec_led_colors. These colors are the ones that can represent the charging state, SoC state, etc. BUG=b:69138917,chromium:752553 BRANCH=None TEST=make -j buildall TEST=Enable led_pwm for meowth, and verify that LEDs behave as expected. Change-Id: I945b86a7f8ed30df58d7da835d83577192548bea Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888220 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* keyboard_scan: Disable when USB is suspended without wakeNicolas Boichat2018-02-051-0/+1
| | | | | | | | | | | | | | | | Keyboard matrix scanning can be disabled when the USB interface is disabled without setting the remote wake feature (USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be ignored anyway. BRANCH=none BUG=b:72683995 TEST=keyboard matrix scanning is disabled when lid is closed. Change-Id: I0b2346cc3426b9ef51127424f9953fd5c20ecd49 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897068 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Enable PD communication in RO for external displayDaisuke Nojiri2018-02-031-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes EC enable PD communication if it's running in manual recovery mode. This is required to show recovery screen on a type-c monitor. This patch also makes EC-EFS ignore power availability. It will make EC verify & jump to RW even if power is sourced by a barrel jack adapter. This should allow depthcharge to show screens (e.g. broken, warning) on a type-c monitor. BUG=b:72387533 BRANCH=none TEST=On Fizz with type-c monitor, verify - Recovery screen is displayed in manual recovery mode. - Critical update screen is displayed in normal mode. - Warning screen is displayed in developer mode. Monitors tested: Dingdong, Dell S2718D Change-Id: Ib53e02d1e5c0f5b2d96d9a02fd33022f92e52b04 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/898346 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32/usb: Add HOOK_USB_PM_CHANGE, called when USB is resumed/suspendedNicolas Boichat2018-02-023-0/+21
| | | | | | | | | | | | | | | | | | In particular, this will allow touchpad driver and keyboard matrix scanning to be powered off/disabled when the USB interface is disabled without setting the remote wake feature (USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be ignored anyway. BRANCH=none BUG=b:72683995 TEST=With next CLs, touchpad and keyboard matrix scanning are disabled when lid is closed. Change-Id: I3750bfaf8c31cde075adf9da4fef39753b8981c5 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/897067 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ppc: Add Vconn and CC polarity settings.Aseda Aboagye2018-02-011-0/+34
| | | | | | | | | | | | | | | BUG=b:72292985 BRANCH=None TEST=Flash meowth; Verify with twinkie that Vconn is provided for a sink that requires it. Change-Id: I8168d2e4c46e04810dcf5c2898b2c337424eefec Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888224 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* sn5s330: Enable VBUS interruptsEdward Hill2018-01-311-14/+4
| | | | | | | | | | | | | | | | | | | | | | | | | If the sn5s330 PPC is being used to detect VBUS presence (CONFIG_USB_PD_VBUS_DETECT_PPC), then enable interrupts and call usb_charger_vbus_change when VBUS_GOOD changes. BUG=b:72007153,b:72007492 BRANCH=none TEST=Connect 3A and 1A USB-A chargers to each of Grunt's USB-C ports, check that BC1.2 detection is working: With 1A: > chgsup port=0/1, type=7, cur=500mA, vtg=5000mV, lsm=1 With 3A: > chgsup port=0/1, type=7, cur=2400mA, vtg=5000mV, lsm=1 TEST=Boot Grunt to OS, then connect USB2 mouse or USB3 flash drive to each of Grunt's USB-C ports. Devices do not work due to b:71772180, but gpioget shows EC is setting USB_C0/1_BC12_VBUS_ON_L correctly. Change-Id: Iffc352105a321997adb364b9fbb8bafef248c224 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/887938 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Add support for HW alertsAnatol Pomazau2018-01-312-0/+11
| | | | | | | | | | | | | | | | | | | | | - Add a vendor command that provides alert counter. Userspace can use it e.g. for user metric analysis. - Add 'alerts' debug console command. It provides information about chip alerts: supported alerts, fuse status, interrupt status, alert counter. - Add 'alerts fire [INT]' command to fire a software defined alert (globalsec/fwN where N is 0,1,2,3). Signed-off-by: Anatol Pomazau <anatol@google.com> BUG=b:63523947 TEST=ran the FW at Pyro and checked alerts data sent to host Change-Id: I7cec0c451ed71076b44dad14a151b147ff1337e8 Reviewed-on: https://chromium-review.googlesource.com/817639 Commit-Ready: Anatol Pomazau <anatol@google.com> Tested-by: Anatol Pomazau <anatol@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* usb pd: Adding PPC vbus discharge pathJett Rink2018-01-312-9/+33
| | | | | | | | | | | | | | Boards with a PPC will use the PPC to discharge the VBUS line instead of the TCPC or GPIO discharge path. BRANCH=none BUG=b:72179253 TEST=Fall time after device removal on grunt within spec now Change-Id: I822923a1cedb32a20efc3610cce4437ade3387f0 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/886563 Reviewed-by: Edward Hill <ecgh@chromium.org>
* stm32: add usb_isochronousWei-Han Chen2018-01-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Templates for USB isochronous implementation. Current implementation only supports TX transmit. Example of usage can be found in CL:803414. Basically, declare an USB isochronous interface by USB_ISOCHRONOUS_CONFIG_FULL(<NAME>, <INTERFACE_NUM>, <USB_CLASS>, <USB_SUBCLASS>, <SUB_PROTOCOL>, <USB_STR_FOR_INTERFACE_NAME>, <USB_EP_NUM>, <PACKET_SIZE>, <TX_CALLBACK>, <SET_INTERFACE>) where <PACKET_SIZE> is size of each USB packet, <TX_CALLBACK> is called when USB hardware has completed a packet. The buffer that USB is not currently using will be passed to <TX_CALLBACK>, allow applications to write next packet to it. When a SET_INTERFACE packet is received, <SET_INTERFACE> will be called with bAlternateSetting and bInterfaceNumber. We will declare interface descriptor with bAlternateSetting = 0 and 1 for you, if you need more alternate settings, you need to declare by yourself. BUG=b:70482333 TEST=manually on reworked staff board Signed-off-by: Wei-Han Chen <stimim@google.com> Change-Id: Ic6d41da6ddd7945edf0bdfff55ede38a97661783 Reviewed-on: https://chromium-review.googlesource.com/818853 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* cleanup: Remove CONFIG_USB_PD_TCPC_BOARD_INITShawn Nematbakhsh2018-01-301-3/+0
| | | | | | | | | | | | | | | | | | It's no longer necessary to call board_tcpc_init() from PD tasks, since HOOK_INIT completion is guaranteed before the task starts. Also, calling board_tcpc_init() for each PD task without a port arg is a bad idea. BUG=b:72229154 BRANCH=none TEST=`make buildall -j` Change-Id: I6fba07771693b8343568041960a263e02775a8fc Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/881538 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* samus_pd: Remove 'adc' console commandShawn Nematbakhsh2018-01-301-3/+6
| | | | | | | | | | | | | | | Remove console command for flash / RAM savings. BUG=None TEST=`make buildall -j` BRANCH=None Change-Id: Ibfccbdf45e5c86260cc55237387994fdf094c19c Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/885463 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Nami: Update for ALS and temperture sensorElmo_Lan2018-01-281-0/+1
| | | | | | | | | | | | | | | | | Implement ALS code and add a new thermal sensor (Fintek, F75303) BUG=b:71839392 BRANCH=none TEST=Verify Nami can read ALS and thermal data via I2C by ec console. Change-Id: I0f8fd486f62508bbca30a57f435b9f26621cf34b Signed-off-by: Elmo_Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/863350 Commit-Ready: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Tested-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
* charge_state_v2: Basic dual-battery charging algorithmNicolas Boichat2018-01-262-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | First version of the algorithm, some TODOs are left in the code but this, generally, works reasonably well. When charging, we allocate input current in this general order: - Base system (fixed, low, number) - Lid system (based on PSYS) - Lid battery (estimating how much current the battery actually requires) - Base battery (similar estimation) - Provide everything else to lid When discharging, we generally: - First discharge the base battery - Then discharge the lid battery BRANCH=none BUG=b:71881017 TEST=Flash lux and wand, EC-EC communication works, adapter power is split in a sensible way, and discharging works fine. Change-Id: I8a4f87963962fc5466b2fedf1347eb4dadd35740 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/659460 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* usbc: Moving PPC init after setting TCPC resistors.Jett Rink2018-01-251-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | We don't want the PPC to connect the CC lines from the TCPC to the USB connector until the TCPC resistors are set in a valid state (SINK initially). If we connect the CC lines (happens in the ppc_init) before setting the resistor values, some TCPC will be toggling the CC line between Rp/Rd since it doesn't detect a cable yet. In the dead battery charging case, connecting the toggling CC lines to the charger can rail the CC lines to 3.3 V signaling to the charger to disconnect Vbus, thus browning out the board. BRANCH=none BUG=b:71865251 TEST=Grunt powers on via usbc p0 with and without USB hub. Change-Id: I8e78aa2af42075398fab89a2dccef5e7df27b260 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/882305 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* driver/led: Add LM3630A driverBenjamin Gordon2018-01-251-0/+1
| | | | | | | | | | | | | | | | | | This chip controls the keyboard backlight. The backlight level is set through PWM, but the chip needs to be enabled and configured before PWM settings are recognized. This will be initially used for grunt and zoombini. BUG=b:69379749 BRANCH=none TEST=In EC console for grunt: kblight 100; kblight 0 Change-Id: I5576d709687d8f61b5757485baa239ffd6b41a74 Signed-off-by: Benjamin Gordon <bmgordon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/879082 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* fpsensor: update interfaceVincent Palatin2018-01-232-3/+36
| | | | | | | | | | | | | | | | | | | | | Update the FP MCU interface to include a few convenient diagnostics functions for factory testing. It's mostly backward compatible, but overall this interface never shipped in anything, so not a big deal regardless. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:71986991 TEST=ectool --name=cros_fp fpinfo && ectool --name=cros_fp fpcheckpixels CQ-DEPEND=CL:*546799 Change-Id: Ic641f891ace02d79af9339cf6cb59a2960e506a7 Reviewed-on: https://chromium-review.googlesource.com/873924 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* host_command: Suppress individual host command debug logDaisuke Nojiri2018-01-222-0/+6
| | | | | | | | | | | | | | | | | | Host command handler prints every single host command except when commands are repeated back-to-back. This patch allows each board decide which commands should be ignored. When debug printf is suppressed, a global counter is incremented. Developers know there were commands processed but not reported to the console. BUG=chromium:803955 BRANCH=none TEST=Observe 0x97 and 0x98 were not printed. Global suppress counter is incremented. Change-Id: I05e8cde9039f602e8fc06c20e89b328e797bd733 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/876952 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* touchpad_elan: Add retry logic if the touchpad does not respondNicolas Boichat2018-01-211-0/+3
| | | | | | | | | | | | | | | After 3 tries, the touchpad is reset by power-cycling it. BRANCH=none BUG=b:71688150 TEST=Short SDA/SCL lines, press on touchpad, see that touchpad tasks retries transaction, and then resets the touchpad power. TEST=Do ESD discharge, and see that touchpad always recovers. Change-Id: If0b5eb936d4d2feb3d34a7ec8748869a1b915c34 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/872131 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* CBI: Allow get command to reload data from EEPROMDaisuke Nojiri2018-01-181-1/+10
| | | | | | | | | | | | | | | | | | This patch adds CBI_GET_RELOAD flag to EC_CMD_GET_CROS_BOARD_INFO command. When the flag is set, the command will be forced to read data from EEPROM even, ignoring the data cached by the previous read. This allows ectool to verify a write was successful without reboot. BUG=b:70294260 BRANCH=none TEST=ectool cbi set 0 0x1234 && ectool cbi get 0 1 Change-Id: I3e7ced5be56a74c605870a4c0622c0a2f47963bb Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/874155 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* backlight: Adding support for active low GPIO signalJett Rink2018-01-182-0/+14
| | | | | | | | | | | | | BUG=b:72007261 BRANCH=none TEST=Verified with grunt board (with is active low) Change-Id: I9a58148b8d92065bec982071ed1d97a466197e9a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/872233 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* CBI: Add host command to set board infoDaisuke Nojiri2018-01-181-0/+23
| | | | | | | | | | | | | This patch adds host command to write board information in EERPOM. BUG=b:70294260 BRANCH=none TEST=Run ectool cbi set <type> <value> to write BOARD_VERSION, OEM_ID, and SKU_ID. Enable WP and verify cbi set command fails. Change-Id: I39536d146313408ace666f350a107d89b331bf7a Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/865570
* CBI: Add host command to get board infoDaisuke Nojiri2018-01-181-0/+21
| | | | | | | | | | | | | This patch adds host command to get board info from EEPROM. BUG=b:70294260 BRANCH=none TEST=Run ectool cbi get <type> to get board version, OEM, SKU Change-Id: I41a84d3eea6da9d88fa8122db36dcd1df515842d Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/865161 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CBI: Read board info from EEPROMDaisuke Nojiri2018-01-182-0/+66
| | | | | | | | | | | | | | | This patch adds Cros Board Info APIs. It reads board info from EEPROM. This patch sets CONFIG_CBI for Fizz to make it use CBI. BUG=b:70294260 BRANCH=none TEST=Read data from EEPROM. Change-Id: I7eb4323188817d46b0450f1d65ac34d1b7e4e220 Reviewed-on: https://chromium-review.googlesource.com/707741 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx7: Add definition/configuration for npcx7m6xb/npcx7m7wCHLin2018-01-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | In this CL, we add the following changes to support the CHIP_VARIANT npcx7m6xb and npcx7m7w: 1. Define the code RAM, data RAM, BBRAM base address/size. 2. Initialize the wov.c file for WoV driver development. (It will be compiled only when CHIP_VARIANT=npcx7m7w in the build.mk and CONFIG_WAKE_ON_VOICE is defined in board.h) 3. Fix the the incorrect offset of PWDWN_CTRL7 register. BRANCH=none BUG=none TEST=No build errors for make buildall. TEST=Change CHIP_VARIANT to npcx7m7w/npcx7m6xb in board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Check ec image can be built. Flash the image on EVB; make sure EVB bootup. Change-Id: I87bccb9097f8f0a6c67f96a8d90adf201ae9e773 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/858637 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* power: introducing pwr_avg console commandRuben Rodriguez Buchillon2018-01-162-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | pwr_avg provides an average voltage, current, and power over the last 1 minute. It's up to the battery drivers to implement this functionality. This change allows us to have better power tracking while minimizing the power impact on the EC, because - the pwr_avg command only needs to be called once every minute, and is short, thus less expensive to parse on ECs without a UART buffer - the work done to keep the avg is partially done by the batteries already and it's just a question of retrieving it. undefined on wheatley since no power debugging planned on that board. usage: > pwr_avg mv = 7153 ma = -605 mw = -4327 BUG=chromium:752320 BRANCH=None TEST=make buildall -j Change-Id: Id1a3479d277aedf90dfa965afb4ee9136654b1cf Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/823884 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ccd: add distinct return code to indicate that password is requiredVadim Bendebury2018-01-121-0/+1
| | | | | | | | | | | | | | | | | | When user is trying to execute 'ccd open' or 'ccd unlock' and password is set, the return error code does not allow to tell the reason for the command failure. Let's add a distinct return code to indicate this condition so that the user can supply password. BRANCH=cr50 BUG=b:62537474 TEST=verified along with the accompanying gsctool modifications. Change-Id: I286f87ab12114cd7dd7ebcdf0e321f7a24723367 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861208 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: 'pp polling' vendor command optionVadim Bendebury2018-01-121-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When implementing 'ccd open' and 'ccd unlock' through gsctool, we need to be able to pass to the host the state of the physical presences state machine regarding the expected user action (pressing the PP button). Two new VENDOR_CC_CCD subcommands are being added: CCDV_PP_POLL_OPEN and CCDV_PP_UNLOCK. In response to these commands, the Cr50 always returns VENDOR_RC_SUCCESS return code and a single byte payload showing the CCD and PP state: - CCDPP_CLOSED - PP process is not running, CCD closed. Maybe user missed a button press deadline. - CCDPP_AWAITING_PRESS (self explanatory) - CCDPP_BETWEEN_PRESSES (self explanatory) - CCDPP_PP_DONE - CCD is opened/unlocked (as per user request), PP process succeeded. BRANCH=cr50 BUG=b:62537474 TEST=with the upcoming change to gsctool verified that PP states are properly conveyed to the user. Change-Id: I97b1fef4440eea93c5c5ac01b7c60bfce9a4595c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861001 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: add 'in progress' return valueVadim Bendebury2018-01-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Depending on device configuration and compile time options, CCD commands 'open' and 'unlock' could either be executed immediately, or require the user to take the device through physical presence state machine. As these commands execute through TPM vendor commands, there needs to be a different return value indicating that the command action is not finished and PP process is in progress. Let's add another vendor command return value, and do not consider it a failure if vendor command returns this value in response to 'ccd open' or 'ccd unlock'. BRANCH=cr50 BUG=b:62537474 TEST=took an Eve through 'ccd open' sequence Change-Id: Ie62ccfb4319a13b6fb6c1c854a0ea26beb9f517c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/860999 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pp: add API to show when press is expectedVadim Bendebury2018-01-121-0/+12
| | | | | | | | | | | | | | | | | | | | This patch adds an API which exports current physical presence state machine state to allow the caller to see if the state machine is in one of the three distinct states: - no PP process in progress - user PP input is expected - PP process in progress, user input is not currently expected BRANCH=cr50 BUG=b:62537474 TEST=with the rest of the patches applied verified that PP state is properly communicated through this API. Change-Id: Ia10cd20c490dadef595f30e0b7257e51b6abf8fa Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/860998 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* cr50: pass essential ccd commands through tpm task contextVadim Bendebury2018-01-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Using and extending the existing framework, move ccd commands 'password, lock, open, and unlock to the same processing path. The first three commands accept a single parameter, password. It is required for the password command and optional for unlock and open. The lock command does not require any parameters. Wiping the TPM, if necessary, now happens on the same context where CCD command is executed, i.e. the TPM task context. This is why the same context TPM reset function needs to be exported and used here. ccd_open() and ccd_unlock() could be further refactored, this would require a bit more effort to find appropriate balance between commonalities and differences. BRANCH=cr50 BUG=b:62537474 TEST=verified that ccd commands to open, unlock, lock and set and clear password all work. Change-Id: I2b9f2b550347b590a55bfaef262a4f050d3f4c1c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/854709 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* config.h: Define CONFIG_EC_EC_COMM_BATTERY_MASTER/SLAVENicolas Boichat2018-01-113-8/+14
| | | | | | | | | | | | | | | | Instead of defining these options in other header files, set them here. This also prevents pre-submit checks from complaining about these symbols being used without being defined in config.h. BRANCH=none BUG=b:65697962 TEST=make buildall -j, presubmit checks pass for CL that makes use of CONFIG_EC_EC_COMM_BATTERY_MASTER. Change-Id: I8098a8ae6422bf0ffb26523785d7c16a3ee1c6df Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861365 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: prepare for handling crucial CCD commands through TPM task contextVadim Bendebury2018-01-102-1/+16
| | | | | | | | | | | | | | | | | | | | We want CCD commands lock, open, password, and unlock (at least to start with) to be available over both CLI and through crosh (i.e. coming over /dev/tpm0). Let's allocate a TPM vendor command for handling all CCD subcommands, and move to this new framework the 'ccd password' command, which already is available over vendor command. BRANCH=cr50 BUG=b:62537474 TEST=verified that 'ccd password' still works both over Suzy-Q CLI and using gsctool on the target. Change-Id: I2d06230b762f47af7e580b188a587bc5678ca169 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/853280 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec_commands: EC_CMD_BATTERY_GET_DYNAMIC: Clarify the meaning of flagsNicolas Boichat2018-01-101-1/+3
| | | | | | | | | | | | | | | | | | flags are actually _not_ BATT_FLAG_*, but EC_BATT_FLAG_*. Clarify that in the comment, and add a new EC_BATT_FLAG_INVALID flag to indicate that some of the data may be invalid (dual-battery master needs to know that to make appropriate charging/discharging decision). BRANCH=none BUG=b:65697962 BUG=b:65697620 TEST=Flash hammer and wand, flags make sense. Change-Id: I3c428c850020a29b3f452504b60b52946a04c503 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/859400 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver/charger/isl923x: Make sure CONFIG_CHARGER_NARROW_VDC is setNicolas Boichat2018-01-101-1/+10
| | | | | | | | | | | | | | | | | | Without this, the battery will discharge if we disallow battery charging (e.g. calling charge_request with either voltage == 0 or current == 0, either by policy, or when the battery is full). Also update config.h to set the option whenever isl923x is used. BRANCH=none BUG=b:66575472 BUG=b:35585464 TEST=make buildall -j Change-Id: Id5515d5ea82a393a3693a3da44cbdc2778296a95 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/856538 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charger/isl923x: Implement charger_get_system_power from PSYSNicolas Boichat2018-01-102-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ISL923x, PSYS output is always enabled when the AP is on (provided CONFIG_CHARGER_PSYS is enabled). We add support for charger_get_system_power function, reading PSYS value, when CONFIG_CHARGER_PSYS_READ is defined. This will be used by the charging algorithm on lux. We also rename CONFIG_CMD_CHARGER_PSYS to CONFIG_CHARGER_PSYS_READ as CONFIG_CHARGER_PSYS_READ provides both "psys" console command and the new function. We also cleanup unneeded undefs in board files. Note that this does not implement the function on bd9995x, but this could be done without too much effort. BRANCH=none BUG=b:71520677 TEST=On lux, without AC connected, check that "psys" output roughly matches the output current from the battery. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Change-Id: Ie1ce8e0ac103daacc5a08b8ccae604d1d83551b8 Reviewed-on: https://chromium-review.googlesource.com/848487 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* EFS: Add EFS_VERIFY host commandDaisuke Nojiri2018-01-091-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | If a bios carries an EC image signed by a wrong key, EFS EC falls back to the previous slot upon reboot. Vboot currently does not handle this case and tries to update the EC with an incompatible image again. When this happens, a user sees 'applying critical update' screen repeatedly. This patch adds EFS_VERIFYV host command. Vboot on AP calls it to check whether the EC likes a newly updated image or not. If the verification fails, it's considered as update failure and vboot displays 'broken' screen. BUG=b:71719323 BRANCH=none TEST=Flash EC SPI with an image which has a different RO key. Boot DUT and let it run software sync. EC-RO rejects the updated image and falls back to the previous one. The update counter is incremented and vboot shows the 'broken' screen, requesting recovery. Change-Id: I8a107a376963baa146ff691c50d80018ec3e429c Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/858159 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec_commands: Add sync sensorGwendal Grignou2018-01-081-0/+3
| | | | | | | | | | | | | | | | | | | SYNC motion sensor are use to count event. It sends an event to the AP each time a GPIO goes low/high, the datum contains a 16 bit counter. The location indicates the source of the event, as Android sensor hal will use this information (via sysfs location attribute) to link the sensor with other subsystem. BUG=b:67743747 BRANCH=none TEST=Unit tests. Change-Id: Ia808b25730ad4100efa216c6a86b7b090197c5a3 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/848496 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32: add SPI master for STM32H7Vincent Palatin2018-01-081-0/+2
| | | | | | | | | | | | | | | | | | Add the driver for the new silicon used in STM32H7 SPI controller, including its bad errata when used with DMA. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:67081508 TEST=on ZerbleBarn, do finger image acquisition on the SPI fingerprint sensor. Change-Id: Ieaf4a09e961d3e0ef78b58886c409a7dfb63aaf3 Reviewed-on: https://chromium-review.googlesource.com/836617 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ec_ec_comm_master: Functions for EC-EC communication masterNicolas Boichat2018-01-051-0/+60
| | | | | | | | | | | | | | This adds functions required for the master in EC-EC communication, requesting base battery static and dynamic information, and charger control. BRANCH=none BUG=b:65526215 TEST=Flash lux and wand, EC-EC communication works. Change-Id: I7a46ee3f5848d22c2c9bea7870cbd7e74141cf3d Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/839201
* charge_state_v2: Add charge_set_output_current_limit functionNicolas Boichat2018-01-042-0/+19
| | | | | | | | | | | | | | | | | | | | | | This function sets up and enables "OTG" mode on the charger chip (i.e. use the charger to provide power from the battery). It also records the output current in curr.output_current, to make sure that the charger loop is aware that current is provided externally. We also add a CONFIG_CHARGER_OTG to remove these functions on boards that do not require it. BRANCH=none BUG=b:65697962 TEST=On wand, when discharging, battery status is updated every 5 seconds (and not every 60 seconds). Change-Id: Ibf93933436f3eb24552a8e1eb9d97522fca2ce79 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/842743 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* wand: Make sure battery is cut-off when criticalNicolas Boichat2018-01-041-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify chipset_in_state to always say that the chipset is off, when we do not actually have a chipset (like on hammer): that makes sure the battery can actually be cut off (else the EC would just wait forever for the chipset to turn off). Also, wake the charger state on "AC" change, that is, when charging_allowed changes state, to make sure the charging loop is executed after lux tries to charge it (else the charging loop would wait until timeout expires, and wand would ask the battery to be cut off again). BRANCH=none BUG=b:65697962 TEST=Deplete wand battery, reboot without providing external power to it. After 30 seconds, battery is cut off: [1.354683 Low battery: 2%, 6866mV] [1.354888 charge warn shutdown due to critical battery] [31.381410 Low battery: 2%, 6865mV] [31.381643 charge force battery cut-off due to critical level] TEST=Upon providing power to wand, charging loop is executed regularly, and battery is charging. Change-Id: I7154b25bd852b8422a0ae3b506675a297a948132 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/842742 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec_commands: battery_dynamic_info: Rename current to actual_currentNicolas Boichat2018-01-041-2/+2
| | | | | | | | | | | | | | | | current is actually a reserved keyword in the Linux kernel, replace it by actual_current. And voltage by actual_voltage for consistency. BRANCH=none BUG=b:65697962 BUG=b:65697620 TEST=make buildall -j Change-Id: I8b8115174d15a1cc4b1189a54104bfec559ed72c Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/848460 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Add SB-TSI temp sensor driverAlec Thilenius2018-01-031-0/+1
| | | | | | | | | | | | | | | | | | This adds the driver for the SB-TSI temp sensor. This is a sensor on the AMD AP SOC (Stoney Ridege FT2) that acts like an 8-pin temp sensor with an I2C interface. BUG=b:69379715 BRANCH=None TEST=Build Change-Id: Iaafe6c7beb3e02e4e341617e8f117c03c0a882a2 Signed-off-by: Alec Thilenius <athilenius@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/833346 Commit-Ready: Alec Thilenius <athilenius@google.com> Tested-by: Alec Thilenius <athilenius@google.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
* espi: Add API to test if signal is eSPI virtual wireScott Worley2018-01-021-0/+18
| | | | | | | | | | | | | | | | | | | | | | Add espi_signal_is_vw in new file common/espi.c for testing if a signal is an eSPI virtual wire. API used in power common and intel_x86. Fix CONFIG_BRINGUP support for eSPI (off by default). Add espi_vw_get_wire_name returning a pointer to constant string. Chip modules do not need to maintain names of eSPI signals. BRANCH=none BUG= TEST=Build poppy and other eSPI enabled boards. Test power state machine. Change-Id: I13319e79d208c69092a02ec3ac655477d3043d61 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/836818 Commit-Ready: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* motion_sense: Fix indentation in headerAlexandru M Stan2018-01-021-5/+5
| | | | | | | | | | BUG=None, while looking at b/67743747 TEST=None Change-Id: I8799c66e236c697c570bfb123531696483ef6db8 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/807330 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* ec_chip_mchp: Add MCHP TFDP trace debug filesScott Worley2017-12-281-0/+1
| | | | | | | | | | Add Microchip MEC17xx family trace fifo debug (TFDP) files. TFDP is a MCHP specific two pin, output only software message port. Added TFDP module ID. Change-Id: Ibe2399a8c3618b207a89552450d80b7901e85f23 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
* ec_flash: Add W25Q128 SPI flashScott Worley2017-12-282-0/+6
| | | | | | | | | | | | Add W25Q128 flash device support. BRANCH=none BUG= TEST=Modify a board build for W25Q128 and check SPI code sets flash security bits correctly. Change-Id: I6173f4cf751f3fbf68af75983f44d357a0b954f6 Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
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