| Commit message (Collapse) | Author | Age | Files | Lines |
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According to the burnside bridge datasheet, the extended connection mode
register is actually at offset 7, not 6.
BRANCH=none
BUG=none
TEST='make BOARD=brya' passes
'./twister -v -T zephyr/test' passes
Change-Id: If0ad1d68d58f7731c242bb7393b7c56957916ab8
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3901261
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Normally we don't do this, but enough changes have accumulated that
we're doing a tree-wide one-off update of the name & style.
BRANCH=none
BUG=chromium:1098010
TEST=`repo upload` works
Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b
Signed-off-by: Mike Frysinger <vapier@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Add the AOZ1380 as an option into the zephyr shim for boards to set up
in their devicetree.
BRANCH=None
BUG=b:244457125
TEST=zmake build skyrim; make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I1876cdca462fe9d7db0dcc0f4d2043cb43639c6d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3880670
Reviewed-by: Keith Short <keithshort@chromium.org>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Define a common function for setting the rms noise floor.
Use static function per sensor to set the proper floor.
BUG=b:236799854
BRANCH=dedede
TEST=Compile
Change-Id: I18e228fd98cb230a77d435f3865c8b249162a4bc
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3860188
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add tcpc_get_bist_test_mode which returns the
BIST mode control status.
BUG=b:229812911
TEST=ensure the BIST status is reported correctly
BRANCH=none
Change-Id: Idbec04e449c962ee1b3185aa91a324c1a5215960
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3787827
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
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The bb retimer usb3 state can be set to enable/disable.
Add mutexing access to the BB_RETIMER_REG_CONNECTION_STATE register.
BUG=b:233975818
BRANCH=None
TEST=build make -j BOARD=Banshee pass
Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com>
Change-Id: Ie59223ac23d5380a52de0189b27fd12eeb81ec89
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3756998
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Currently the mask registers will be reseted after hard reset received.
TCPM did full initialization and restore the mask registers as well.
However, full initialization will cause tPSHardReset time to worse.
To improve tPSHardReset time during hard reset, so only restore the
mask registers during hard reset.
BUG=b:232326002
BRANCH=none
TEST=On Vell. Check tPSHardReset time.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I2ae250af7cb06fe5102c8ba4dce98e5d467a2d93
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3702883
Tested-by: Devin Lu <devin.lu@quantatw.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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The PS8745 is broadly identical to the PS8815, to the point that some
firmware versions of PS8745.A2 claim to be PS8815.A2. A workaround is
included to check whether a device is PS8815 or PS8745 and correct the
device IDs if needed.
BUG=b:236761058,b:237593618
TEST=PS8745-A2 now reports correct IDs on Nereid and USB port
still works.
BRANCH=none
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I5d0542ef00956414854e6a38b1d127294cb3df0b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3752425
Reviewed-by: Andrew McRae <amcrae@google.com>
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A number of files have had non-compliant changes uploaded since all
files were formatted. Likely, the changes were uploaded before
CL:3751770, so the author would not have seen any pre-upload failures.
Re-format these files.
This CL was generated via:
clang-format -i $(find -name '*.[ch]' -type f -not -path '*third_party*')
BUG=b:236386294
BRANCH=none
TEST=none
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Iedad17d13c29f45c7601d43f7fa2ce3215cc678e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3751462
Commit-Queue: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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move i2c device register address and function declarations into
public header.
BUG=b:227359727
TEST=zmake
BRANCH=none
Change-Id: I2fa6cf979a94d5b459e2b50bd1f37d14e44bc204
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3721944
Tested-by: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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move i2c device register address and function declarations into
public header.
BUG=b:227359727
TEST=zmake
BRANCH=none
Change-Id: I6abf44ed35c48a5a8ff087130867b67c1cc5ec8c
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3721943
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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move i2c device register address and function declarations into
public header.
BUG=b:227359727
TEST=zmake
BRANCH=none
Change-Id: I51c967c53c3052196bc51964a7ca2f7d104a1781
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3721942
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
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Add the default tuning function for the ANX7483 devicetree
USB mux configuration.
BUG=b:233170580
TEST=zmake testall
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I7cb7082e155a94380d7289187184eac0659954cc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3739110
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I9d5c0f7fba31b62d373bd07d438b6f7926ee8ed1
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730258
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: If0d5183eac01d0f822b013bd340d8d6d825162c3
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730257
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I92250a4af94f79a81e8509e3ada49926a4a304eb
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730255
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I4c59ffad975a95cdd2e7143d5234b920f2636420
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730272
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I3c1570c0468ebde3e29c9ddc0352b5cf3b5480d5
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730269
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I21a3e2cfbdf2a7b5614610c9c6a820f2469786d9
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730244
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ibcff21093dca2225efdb0433f542b71ef22ca6db
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730273
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ib53918b5910763a36b1f49d10db329b335e70fd6
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730106
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ib3119c7b9bd3c961919bc772fdbd855ad27b8d8e
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730270
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I5c401c552f6e599bd97b4ca6b3509da1bf65310f
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730276
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I6c54eb98398e2673a785af028f1665c37bfb44ad
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730248
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I8701aeb65e931b2567353c4aec627f82bbf21ba2
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730250
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: If9f64b38886c24399fd2cfdb64b4dbefe1cad01e
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730256
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I5b6ee32b6c386768e51f63c0d093b61b63d9edde
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730253
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Iab45abf98e097b508ac53eabf0565fc502f34287
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730274
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ie8164ca4e4dc817882b2ad48cc9d9bbceb689e54
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730254
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I7cac80a05792dbc09d65a0c6df0875e55ba900fa
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730268
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ic39738e28e9ee2de329c325ec5e1cd9f6ad7a271
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730246
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ic5c6a58fdb3e9eb0b9fbdc9104f304410b2e18bd
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730245
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ide78aaec549cccbdea074c44c4a36e353128b9cc
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730259
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I98ad2f622399587bd76c33ef3bf3b5df3ff93f65
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730267
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ia320bb93a4e459f30501f50316284afbb5c36832
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730247
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I4866bb97388019a2f3f987b9dd350922d139c54c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730271
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I87b00943fff70418f99bf0e0c29cfdff8d164b33
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730252
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I9f4d3b951e5b7cf16a05674db72ceca9ad2af010
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730275
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ic3d9ae47d89bdd2ab537680468241c07a8580b35
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730249
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ifdf62770a7960d25b08941704789c33dd4d78df2
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730251
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Add an API which may be used to adjust the EQ settings of pins on the
retimer individually.
BRANCH=None
BUG=b:230694492
TEST=zmake testall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I26ddb01cb3d84ef074545d05a5836ad6e385ed92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3689783
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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Some PD chips have integrated port protection for SBU lines and
the switches to enable the SBU lines coming out of the PD chip
are controlled by vendor specific registers. Hence, added the
code in TCPM & driver skeleton in TCPCI to support those chips.
By checking if the SBU enable function exists in TCPM driver
before trying to enable the SBU from discrete PPC, this code
supports co-existence of both PD based SBU protection and
discrete PPC chip SBU protection in a same platform.
BUG=none
BRANCH=none
TEST=make buildall -j, zmake testall
Change-Id: I3d3a5eec9077df95c0eb91cf1a709cb79f36ca60
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3227374
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Use CONFIG_<driver>_INT_ENABLE to not include interrupt() and
irq_handler() when hardware interrupt are not used.
Disable call to motion_sense_fifo() with IS_ENABLED(CONFIG_ACCEL_FIFO).
Other use of CONFIG_ACCEL_FIFO are removed: only when a hardware
interrupt is configured we enable the sensor FIFO.
Otherwise we directly read into the sensor data registers.
BUG=b:230401133
BRANCH=asurada,dedede,brya
TEST=Build all. Check Zephyr with herobrine. Check on bugzzy.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Change-Id: Ie33ad8dd34b5723ce9da4029effdae0755d81c03
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609354
Reviewed-by: Yuval Peress <peress@google.com>
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Use CONFIG_<driver>_INT_ENABLE to not include interrupt() and
irq_handler() when hardware interrupt are not used.
Disable call to motion_sense_fifo() with IS_ENABLED(CONFIG_ACCEL_FIFO).
BUG=b:230401133
BRANCH=asurada,dedede,brya
TEST=Build all. Check Zephyr with herobrine. Check on bugzzy.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Change-Id: Ifc158d739f2b8f1664323af635dad5017f0761e1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3609127
Reviewed-by: Yuval Peress <peress@google.com>
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Add an API to set all of the default tuning values given by the
datasheet. Additional APIs may be defined as needed to change specific
register differences that come up in board SI tuning.
BRANCH=None
BUG=b:230694492
TEST=zmake testall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I6a10df0a6bed67792b399ad7f072ff62f8c2f467
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3639923
Reviewed-by: Robert Zieba <robertzieba@google.com>
Reviewed-by: Andrew McRae <amcrae@google.com>
Commit-Queue: Andrew McRae <amcrae@google.com>
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Intel Hayden Bridge retimer reuses the Intel Burnside Bridge retimer
driver as the configuration register of both the retimers is same.
Intel Hayden Bridge is a Type-C multi-protocol retimer to be used
in on-board applications. Hayden Bridge offers the ability to latch
protocol signals into on-chip memory before retransmitting them
onwards. It can be used to extend the physical length of the system
without increasing high-frequency jitter.
Hayden Bridge supports spec compliant retimer of following
protocols:
- Display Port: four unidirectional DP lanes
- USB3.2 Gen1/2: two bi-directional USB lanes
- Thunderbolt/USB4: two bi-directional USB4 lanes
- Multifunction Display (MFD): two unidirectional lanes of DP and
one bi-directional lane of USB3.2 Gen1/2
BUG=b:228222434
BRANCH=none
TEST=Able to test USB, DP, TBT, USB4 on MTLRVP
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Change-Id: I42902163afebe0dc2cf8ff9e4c1081ecd04401b4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3138214
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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This patch removes define CONFIG_USBC_PPC to allow TCPM to use
sink and source control without PPCs presence. since they exist
generally in TCPCI specification independently of PPCs.
BUG=b:211791444
BRANCH=none
TEST=make buildall
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: Ia4be8bf872f981c23908944381b156778f63064b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3597314
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Fix anx7447_get_vbus_voltage which was using raw ADC value,
and the new implementation let it report the real reading in mV,
and move the common VBUS calculation to the header so both
tcpci and anx7447 can benefit from it.
Also, unguarded the function by dropping VBUS_DETECT_TCPC macro.
BUG=b:203739613
TEST=uart:~$ vbus
VBUS C0 = 20200 mV
VBUS C1 = 0 mV
BRANCH=none
Change-Id: I61a8eecf1f77a7c87b2ef435af6809821388e66a
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3397145
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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BRANCH=none
BUG=b:224614211
TEST=zmake test test-drivers
Signed-off-by: Yuval Peress <peress@google.com>
Change-Id: I41be4e5bcfc604d03aac1f837666fbe1c985aa61
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3605081
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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If the PD chip has built in PPC, TCPCM uses Sink & Src control
functions from TCPCI driver hence changed the USB-C PD PPC config
name in header file from CONFIG_USBC_PPC to CONFIG_USB_PD_PPC.
BUG=none
BRANCH=none
TEST=Able to directly call the tcpci get and set src & sink
control function for ADL-RVP board file.
Change-Id: Iaff1acdea34723f54ae8e2cf67c33fbe29dbc1f4
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3511367
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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