| Commit message (Collapse) | Author | Age | Files | Lines |
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BC12_DET_EN should be disabled after mt6370 stops bc12 detection.
Otherwise, race condition may happen because both ap and charger have
access to D+ and D- pins.
BUG=b:141005922
TEST=make sure b:141005922 is not reproducible after this fix.
BRANCH=master
Change-Id: I89750efe58ba65b72bc47ee42c4923e560d9d534
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1839711
Reviewed-by: Yilun Lin <yllin@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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BUG=b:138599955
BRANCH=none
TEST=make buildall -j
Change-Id: I84f54f4bef9f38bc194e2a45802fb6fcf335e643
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834023
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:138599955
BRANCH=none
TEST=make buildall -j
Change-Id: Ic8d386355f9297c3da69021999142f35120b214c
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834022
Reviewed-by: Edward Hill <ecgh@chromium.org>
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BUG=b:138599955
BRANCH=none
TEST=make buildall -j
Change-Id: I0c639aae18e8c2c2d1b457e2e209f8484a834f6b
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1825507
Reviewed-by: Edward Hill <ecgh@chromium.org>
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BUG=b:138599218
BRANCH=none
TEST=make buildall -j
Change-Id: Ib06053b2129623683fece8a63ee182d52cb07422
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833922
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Remove BC_REG_TO_CURRENT conversion since for ISL9241 the max/min/step
values are already in milliamps.
BUG=b:141785541
BRANCH=none
TEST=power on trembyle
Change-Id: I77605817aa97a99b9a69a05f663b5fc8d8fd4869
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1838253
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
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The BIT() macro was recently introduced to make things more
comfortable to upstream Linux. However, there's no need for it to
be a long.
Change the macro back to being an int (int and long are the same on
32-bit platforms, which all of our ECs are), so that we can reduce
the number of %l specifiers. The semantics of %l have changed, we
are deprecating its use on master to reduce the risk that we
accidentally cherry-pick one of those printfs to an old firmware
branch.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=None
Change-Id: I95b9cd49895cc67998dcb1de9bab5b5591d93243
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834601
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
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This change fixes the printf formatting errors found by the
compile-time prinf format checker. The errors fall into a few
categories:
1. Incorrect size specifier (missing or extra l).
2. Missing or extra arguments.
3. Bad line splitting.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Change-Id: I5618097a581210b9fcbfc81560dec050ae30b61c
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819653
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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In order to make our printf more standard, utilize %ll for long long
arguments, rather than %l. This does cost a little bit in flash space
for that extra l in a couple of places, but enables us to turn on
compile-time printf format checking.
For this commit only, the semantics are such that both %l and %ll
take 64-bit arguments. In the next commit, %l goes to its correct
behavior of taking a sizeof(long) argument.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Cq-Depend:chrome-internal:1863686,chrome-internal:1860161,chrome-internal:1914029
Change-Id: I18081b55a8dbf5ef8ec15fc499ca75e59d31da58
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819652
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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When printing size_t sized integers, utilize the standard %z
modifier so that the specifier format is correct. This will enable us
to turn on compile-time printf format verification.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Cq-Depend:chrome-internal:1860160
Change-Id: I2c95df5c0d87677cb9fcbde33ab8846708a774a1
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819651
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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In order to turn on compile-time printf format checking,
non-standard specifiers like %b (binary) must be removed. Convert
that into %pb, which takes a pointer to a structure containing the
value to print, and how many bits to print. Use the convenience
macro BINARY_VALUE() to package these values up into a struct whose
pointer is passed to printf().
Technically this is slightly more limited functionality than we used
to support given all the possible flags, field width, and precision.
However every existing instance in our codebase was using %0NNb, where
NN is some number. If more variants are needed, the parameters structure
can be expanded in the future.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=None
Change-Id: I8ef995dcf97af688fbca98ab6ff59b84092b69e3
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1733100
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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In order to make printf more standard, use %ph. Pass a pointer to
a struct describing the buffer, including its size. Add a convenience
macro so that conversion between the old style and new style is purely
mechanical. The old style of %h cannot be converted directly to %ph as-is
because the C standard doesn't allow flags, precision, or field width on
%p.
Ultimately the goal is to enable compile-time printf format checking.
This gets us one step closer to that.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=None
Cq-Depend:chrome-internal:1559798,chrome-internal:1560598
Change-Id: I9c0ca124a048314c9b62d64bd55b36be55034e0e
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730605
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In order to be more compliant to standards, and ultimately turn on
compile-time printf format validation, switch the non-standard %T
into %pT, which takes a pointer to a 64-bit timestamp as an argument.
For convenience, define PRINTF_TIMESTAMP_NOW, which will use the
current time as the timestamp value, rather than forcing everyone
to pass a pointer to get_time().val.
For a couple of instances, simply use CPRINTS instead.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=None
Cq-Depend:chrome-internal:1473305
Change-Id: I83e45b55a95ea27256dc147544ae3f7e39acc5dd
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704216
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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On mt6370, setting ACIR is equivalent to setting Input current max,
and the accuracy is 7%. So if AICR=2150mA, then Max=2150mA,
and Typ=Max*0.93=2000mA, and Min=Typ*0.93=1860mA.
This CL also raise S0 current limit to 2150mA.
TEST=Plug Krane charger, and see it could ramp to 1920mA in S0.
BUG=b:137700946
BRANCH=None
Change-Id: Iea6186c39c916ddf601917ea6e6b6463069c9292
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1708170
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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If the host command handler callback function returns an int, it's easy
to accidentally mix up the enum ec_error_list and enum ec_status types.
The host commands always expect an enum ec_status type, so we change the
return value to be of that explicit type. Compilation will then fail if
you accidentally try to return an enum ec_error_list value.
Ran the following commands and then manually fixed up a few remaining
instances that were not caught:
git grep --name-only 'static int .*(struct host_cmd_handler_args \*args)' |\
xargs sed -i 's#static int \(.*\)(struct host_cmd_handler_args \*args)#\
static enum ec_status \1(struct host_cmd_handler_args \*args)##'
git grep --name-only 'int .*(struct host_cmd_handler_args \*args)' |\
xargs sed -i 's#int \(.*\)(struct host_cmd_handler_args \*args)#\
enum ec_status \1(struct host_cmd_handler_args \*args)##'
BRANCH=none
BUG=chromium:1004831
TEST=make buildall -j
Cq-Depend: chrome-internal:1872675
Change-Id: Id93df9387ac53d016a1594dba86c6642babbfd1e
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816865
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Add a precharge_voltage field to batt_info in case we need its value
differ from voltage_min, and set precharge_voltage = 3.4V according to
battery spec.
BUG=b:139012899
TEST=observe the charging curve (see issue link above for test result)
BRANCH=master
Change-Id: I2e4b240a12cd023ed90aaeda922e10b262508624
Signed-off-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1795491
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This CL makes some modifications to how ICO mode is utilized to
support the input current hw ramp feature. ICO mode can't be used when
there is no battery present, so a check has been added for battery
presence. In addition, the input current limit should have been read
from the IIN_DPM register.
BRANCH=none
BUG=b:126229130
TEST=Tested variaous legacy chargers and verfied that ICO mode
completes and gives the expected current limit. Tested that when no
battery is present, ICO mode is not enabled.
Change-Id: Ib2dcff4c7bddea52c267d678b17c50daf1356b44
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827255
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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this adds the missing "port" argument to a CPRINTS.
BUG=none
BRANCH=none
TEST=buildall passes, boots on atlas
Change-Id: I9308a4beea716441912aaa06eb206e9d17186cd9
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1825876
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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GT7288 firmware version 4 supports these dimensions.
BRANCH=none
BUG=none
TEST=check output of `gt7288_rep` command, comparing palms and fingers.
Change-Id: I9094d8f86f34e4f319a9743c246461853d0382cf
Signed-off-by: Harry Cutts <hcutts@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1815403
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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A simple driver which allows touch reports and firmware version
information to be read. If the appropriate config flag is set, console
commands are included for testing.
Unlike the other two touchpad drivers already implemented, which simply
receive I2C HID events and send them straight out again over USB HID, we
want to do some processing on the touchpad data in the board directory.
For that reason, this driver leaves handling the touch interrupts up to
the user.
BRANCH=none
BUG=none
TEST=With https://crrev.com/c/1716928 patched, run the various host
commands and check the output.
Change-Id: Ia38e516473b78fb052ae18ca89acc5d815b53bd6
Signed-off-by: Harry Cutts <hcutts@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1799290
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Change rp_def level and enable rx deadzone as sink
BUG=b:139400105
BRANCH=None
TEST=Run "TDA.2.1.2.2 BMC PHY RX INT REJ" pass
Change-Id: Ieb684f7a3d38e3b36aab9bcf27cbc823b5a7df39
Signed-off-by: Gene Chen <gene_chen@mediatek.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1784269
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Sean Abraham <seanabraham@chromium.org>
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Found by Coverity Scan #187773, #204053
BUG=none
BRANCH=none
TEST=none
Change-Id: Ie7006828d8a5d760097baade6851c72d15e42cf1
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1801206
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
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This patch must be with removing the external 100k pull up/down
resistors on the Aux P/Aux N lines which avoids the 3.3V DC bias
voltage adds 0.8V pulse of aux channel to turn on TCPC internal
P-MOSFET that causes the signal effect on CCD communication.
BUG=b:124410548
BRANCH=None
TEST=Connect external monitor,usb device or CCD cable to type-c port0
Each type-c device should work normally.
Signed-off-by: Xin Ji <xji@analogixsemi.com>
Signed-off-by: Jack Lai <jack.lai@intel.com>
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
Tested-by: Zhuohao Lee <zhuohao@chromium.org>
Change-Id: Ic920c83232163292c3d6dbfce1b23a8e3a1c6b6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1680664
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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CL:1633930 raised DCP input current limit to 2A when SW ramp enabled,
the same limit should also apply to HW ramp too.
BUG=b:139012899
TEST=observe the charging curve (see issue link above for test result)
BRANCH=master
Change-Id: I22098bd81bb46c7d1e638e7b4db8b87cd3284533
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1760655
Reviewed-by: Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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A couple of the values in the lux atime table needed adjusting
as they were too aggressive and were causing
train-up / saturate / train-down / repeat... pattern cycles.
Allow device to upshift in training when we're >= 2.5x from
saturation (was >= 3x).
Fixed a couple of nits.
BUG=b:139749448
BRANCH=master
TEST=Walked a flapjack through each lux light level, with a test at
the low end of the level and a test at the high end of each level
(i.e. for LUX level 1000, tested at 1100 and 1900 LUX), assure the
tcs3400 doesn't go into saturation while trying to hit the 90% band.
Change-Id: I84c5bf09e072e96d516d91520a176fa35274ce7a
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767598
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For this, restrict the variables' scope and move the print statements
closer to the other variable use.
Found by Coverity Scan #198955, #198960
BUG=none
BRANCH=none
TEST=none
Change-Id: I947249e4fd36524de5065616d5bcd32203d8b7e4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1781469
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This change allows us to use the IS_ENABLED condition to replace
the various ifdef guards around the CONFIG_ACCEL_FIFO
BUG=b:137758297,chromium:981990
BRANCH=None
TEST=buildall and CTS tests on Arcada
Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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This reverts commit bd19b03b128db664dfb5e6582810bd177b635408.
With https://crrev.com/c/1757596/ merged, one doesn't need to
handle repeated MessageID in TCPC.
TEST=make buildall
BUG=b:134556286
BRANCH=none
Change-Id: I0f97e4e574b94ecbc23e5ee97ade7cc4da7f9020
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1763895
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Added GPIOs pin config to support VCONN on tglrvp. Also added
power switch function to enable/disable VCONN according to the
cc lines.
BRANCH=None
BUG=b:139763031
TEST=Able to get characteristics of an E-marked cable
Change-Id: Ib09307aafe68ea955f256d3f35670579072c3040
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1762591
Reviewed-by: Keith Short <keithshort@chromium.org>
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Tighter battery present status by returning BP_NO.
charger task will try to charge battery when battery present
status is BP_NOT_SURE, and this would put PD and charger
tasks in a weird state (and keep resetting) if the battery is
actually not present.
TEST=boot krane w/o battery and w/ PD charger, and see it doesn't
reset for over 5 mins.
BUG=b:139509751
BRANCH=none
Change-Id: I3e3d818b80ffcfdb12fbd83daafa792d837a0fe0
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1765108
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This change is needed to allow better testing of the fifo
behavior. Additionally, motion_sense_fifo.c will only be compiled
if CONFIG_ACCEL_FIFO is defined. This behaviour requires a few
small changes to several boards and baseboards to make
sure that we only define CONFIG_ACCEL_FIFO when the MOTIONSENSE
task is present (some times that may be only in one section RW or
RO).
BUG=b:137758297
BRANCH=None
TEST=buildall and ran CTS on arcada
Change-Id: I2f7e4e436ba9568a35b7a0b2c8d53a73f198ba73
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704163
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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Base on official MT6370 datasheet, ADC_STAT status is 0 which indicates
ADC conversion complete.
BUG=b:139653474
BRANCH=master
TEST=Add more log information, EC will check ADC_STAT status about 6
times in one loop.
Change-Id: I50a10c25cfb35a1f41c569fabf360c5e29f44be2
Signed-off-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1760661
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
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Enable TCPC receive SOP' for communication with cable, when
we are Vconn source role.
BUG=None
BRANCH=None
TEST=test on board: ampton and reef_it8320
1.SRC connects to SNK via E-mark cable, sources Vconn successfully,
and receives cable's ack of discover id request.
2.SRC connects to SNK via E-mark cable, but not source Vconn to
cable, and receives nothing of discover id request
(this isn't effect on request SNK flow).
3.console cmd pdcable 0
2019-07-30 11:43:40 > pdcable 0
2019-07-30 11:43:45 Cable Type: Passive
2019-07-30 11:43:45 Connector Type: Type C
2019-07-30 11:43:45 Cable Current: 5A
2019-07-30 11:43:45 USB Superspeed Signaling support: Gen 1
Change-Id: Icd2e6f8481bb7a4e0b922460d46b831f36112738
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1728669
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch add polling (forced mode) support for lis2dw family.
'froced mode' is a common usage model for lid accel sensor. Treeya
will support two set (BMI160/KX022 and LSM6DS3/LIS2DWL) of base/lid
sensors and both of their lid sensor should work in the same mode
(forced mode or interrupt). Since KX022 driver only support polling,
so lis2dwl also need polling support. This patch add it.
BUG=b:138768226, b:138978278
BRANCH=none
TEST=on Akemi board, build both interrupt and polling (by define
CONFIG_ACCEL_LIS2DW_AS_BASE or not) mode firmware, boot and
confirm sensors init suscess and 'accelinfo on' has correct
sensor x/y/z output.
Cq-Depend: chromium:1739026
Change-Id: Ib0dcb7b317eec51a38598a644f965d7ecc5928c6
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741598
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Commit-Queue: Martin Roth <martinroth@chromium.org>
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lis2dwl has almost the same register interface as lis2dw12.
lis2dwl only has one low power mode and when in low power mode, it
has only 12 bit resolution. In order to get 14 bit resolution, we
only use its high performance mode.
Add MOTIONSENSE_FLAG_INT_ACTIVE_HIGH flag to support both active
high and active low interrupt.
BUG=b:138768226, b:138978278
BRANCH=none
TEST=use Akemi board, add lis2dwl as accel sensor, boot the board
and make sure sensor x/y/z get correct value by 'accelinfo on'
Cq-Depend: chromium:515302
Change-Id: I37fcc0f43af3c8055079e09db00757b665813ba8
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1739026
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: mario tesi <mario.tesi@st.com>
Commit-Queue: Martin Roth <martinroth@chromium.org>
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The IO pins of Nuvoton TCPC NCT38XX chips have the ability to support
the interrupt function. This commit adds the driver to support it.
However, please note that if the system needs to use an IO on NCT38XX
to support the interrupt, the following two consideration should be
taken into account.
1. Interrupt latency:
Because it requires to access the registers of NCT38XX via I2C
transaction to know the interrupt event, there is some added latency
for the interrupt handling. If the interrupt requires short latency,
we do not recommend to connect such a signal to the NCT38XX.
2. Shared ALERT pin:
Because the ALERT pin is shared also with the TCPC ALERT, we do not
recommend to connect any signal that may generate a high rate of
interrupts so it will not interfere with the normal work of the
TCPC.
BRANCH=none
BUG=none
TEST=No error for "make buildall"
TEST=Apply this and related CLs, manually test each IO pins; make sure
each pin's interrupt handler is correctly executed.
Change-Id: I72d835557913d87097b2e0d82165e40fe132ca77
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1734948
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
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Adds an array which holds the number of atime increments needed
at various lux levels and again settings to change delta from
saturation by 1%. Using this table, the anti-saturation
algorithm can get to the 90% band in most cases in a single
adjustment vs the 10 to 15 adjustments previously needed when
not using this table.
Enabling CONFIG_TCS_USE_LUX_TABLES takes up 280 bytes in the
ec.obj.
BUG=b:124512628
BRANCH=master
TEST=Flash and boot flapjack, verify that ALS and RGB sensors
are still generating data. I used alslog patch and enabled
ALS logging in EC console via "alslog 2047". Verify that under
a constant light source, the adjustment mechanism correctly drives
the ALS values such that they land in the sweet spot between 90
to <100% of saturation.
Change-Id: I7cd0b8242e72233f50ff2751834f7bba367c6706
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1677764
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Making settings more sensitive makes the SNR better, so this
algorithm strives to keep the output level as close to 90%
saturation as possible.
Adds calibration mode and lux calculation.
Removes unused last_value field from the tcs3400_rgb_drv_data_t
structure, we use raw_xyz field in motion_sensor_t struct instead.
BUG=b:124512628
BRANCH=master
TEST=Flash and boot flapjack, verify that ALS and RGB sensors
are still generating data. I used alslog patch and enabled
ALS logging in EC console via "alslog 1023". Verify that under
a constant light source, the adjustment mechanism correctly drives
the ALS values such that they land in the sweet spot between 90
to <100% of saturation.
Cq-Depend: chromium:1711958,chromium:1702543
Change-Id: Ibf260a990fe285cb54ee94c1ebe8aa85ea10affc
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1633269
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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When a discover identity command is sent with a SOP prime
packet, the cable plug of an emark cable responds with the
cable attribute.
Added a structure pd_cable that stores the cable type and
and resetting it when the cable is disconnected. Also added
console command that gives the type of cable connected.
Host(DFP) Cable Port-Partner(UFP)
-------------------------EXPLICIT CONTRACT------------------------
Discover Identity SOP ----------------------------->
request |
<------------------------- Discover Identity
response
Discover Identity SOP' --------->
request |
(If Emark Cable)
<------------ Discover Identity SOP'
| response
Store cable type |
(If Non-Emark Cable)
<-------------- No response
|
Discover SVID SOP
request ------------------------------------>
(Rest of the PD flow)
BUG=b:129990370
BRANCH=none
TEST=Verified on dragonegg, able to get cable response
Change-Id: I2536cf24d58f7ee5ff462b34fc32f69d7a200d41
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1707851
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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DCI mode is auto-enabled by default. we don't actually support DCI
(intel specific SoC debug path), so we can explicitly disable DCI
mode. doing so, saves about 40mW on the 3.3v rail when USB2 devices
or USB-C to USB-A dongles are left plugged in. this is particulary
relevant in sleep mode as this accounts for a significant portion
of the system power consumption.
BUG=b:119875949
BRANCH=none
TEST=verified power consumption drops using sweetberry, USB devices
still functional across suspend/resume.
Change-Id: Id13630425c78965d2ac4f2e97715374ae0640d23
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1732231
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Caveh Jalali <caveh@google.com>
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Before entering into alternate mode, state of the USB-C MUX needs to be
in safe mode so that the USB-C pins cab be re-purposed without getting
damaged or do not damage their Port Partner. Hence, sending the DP
safe mode info to virtual MUX from EC.
BUG=b:139140865
BRANCH=none
TEST=Manually tested on Intel RVP, MUX is able to configure to safe mode
before entering alternate mode.
Change-Id: I3715b5118112b7744407ac5e652f63f6d7cd0a1b
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1745540
Reviewed-by: Keith Short <keithshort@chromium.org>
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The nx20p348 should also set the initial current limit during its
initialization.
BRANCH=octopus
BUG=b:139110010,b:139201733
TEST=with CL stack, phaser limits both ports to 1.5A
Change-Id: I876b32434bd37bf410d546a3d27f0f7ba949d3ea
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749945
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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To use integer instead of float, we use d1_1k/d0_1k instead of d1/d0.
But when we devide value, d1_1k/d0_1k is not 1k base.
So, before we use value, we need to multiply value by 1K.
BUG=b:130835790
BRANCH=none
TEST=make -j BOARD=kohaku
flash ec.bin on kokaku and read lux with ectool motionsense
Change-Id: If4e6abae43b4d296007680452f0584366825ad1e
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1739028
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
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Added ACC LIS2DW12 driver support.
Features included in this driver are:
- Basic Sensor Read acceleration data
- ODR and FS runtime configuration
- FIFO support with watermark interrupt events
- Shared commons function with ST MEMs devices
- Switch Low Power to High perf. mode in case
of ODR > 200 Hz
- Configure D-TAP event detection in Hardware
BUG=b:73546254
BRANCH=master
TEST=Tested on discovery_stmems target BOARD with
LIS2DW12 connected to EC i2c master bus and motion
sense task running.
To build firmware for discovery_stmems target with
LIS2DW12 sensor connected, simply uncomment
CONFIG_ACCEL_LIS2DW12 define in board.h target file
and make with target BOARD=discovery_stmems.
Commands used to test LIS2DW12 device are:
- accelinit 0 (to configure accel. device)
All basic features tested, including changing
in ODR:
- accelrate 0 10000 (set ODR to 10 Hz)
- accelrate 0 12500 (set ODR to 12.5 Hz)
- accelrate 0 25000 (set ODR to 25 Hz)
- accelrate 0 50000 (set ODR to 50 Hz)
- accelrate 0 100000 (set ODR to 100 Hz)
- accelrate 0 200000 (set ODR to 200 Hz)
- accelrate 0 400000 (set ODR to 400 Hz)
- accelrate 0 800000 (set ODR to 800 Hz)
- accelrate 0 1600000 (set ODR to 1.6 kHz)
Full Scale Range:
- accelrange 0 2 (set Full Scale Range to 2g)
- accelrange 0 4 (set Full Scale Range to 4g)
- accelrange 0 8 (set Full Scale Range to 8g)
- accelrange 0 16 (set Full Scale Range to 16g)
FIFO features and interrupt management:
- accelinfo on 1000 (motion info task with
refresh rate 1 s)
and polling data read:
- accelread 0 (to read data from accelerometer)
Change-Id: I0b9861a71e81052e7ee8eb235a1a5b2a57d4c6f5
Signed-off-by: mario tesi <mario.tesi@st.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/515302
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com>
Tested-by: Paul Ma <magf@bitland.corp-partner.google.com>
Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Add support for 30.9K pull-up on resistor divider with the 47K
thermistor.
BRANCH=none
BUG=b:124316213
TEST=Rebuild EC and flash
Change-Id: I5bc72fa67549ab15c0e4e1b0291eb934990ee61b
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1742914
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Refactor code to use proper type for cc1 and cc2 lines.
BRANCH=none
BUG=none
TEST=builds. No functional change.
Change-Id: Id292db8480920e2b191bac9d9ecc2685f61e4ea9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1744654
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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For the pi3usb9201 the usb D+/D- switches are closed automatically
based on either the result of bc1.2 client detection completion or
setting CDP_HOST mode. There is a console log already that shows the
bc1.2 client mode detection result. However, for host mode there was
no console log. This CL adds a message when this setting is used which
is useful for knowing for certain that the D+/D- switches have been
closed.
BUG=b:138618816
BRANCH=none
TEST=Verfied message when data role is DFP
2019-08-07 14:32:40 [0.716611 pi3usb9201[p0]: CDP_HOST mode]
Change-Id: I65a6321452a8e668c839eba7a18d92398c2b78d1
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1742869
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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BUG=b:138600692
BRANCH=none
TEST=make buildall -j
Change-Id: Idd20b1833945e37a84db4e7c444d8974f6059f83
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1742532
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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BRANCH=none
BUG=b:138968914
TEST=make buildall -j
Change-Id: Ia753d1a089a326eb15a28528f0ff0cfa320b4e1d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741588
Reviewed-by: Yilun Lin <yllin@chromium.org>
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the ps8751 really does not behave well with explicit low power mode
commands - it enters low power mode on its own in about 2 seconds, so
there's really no need to command it into low power mode.
when the ps8751 is awake, it will take the low power command, but also
generate an alert. when we try to read the alert register, it fails
because the chip is in low power mode, so we go through the normal
process of waking it up, including re-initializing the chip. we then
process the alert and power down the chip again.
but this time around the i2c transaction for the power down command
fails (we don't check this status). the reason the i2c transaction
failed is very likely because the chip processed the I2CIDLE command
and didn't complete the i2c transaction.
BRANCH=none
BUG=b:137622553
TEST=verified chip still goes to sleep on its own
Change-Id: I01b864791ae27a81a4512ddb752329e59be6a8c6
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1733860
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Caveh Jalali <caveh@google.com>
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