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* driver: ln9310: Update init function signature to return statusYuval Peress2021-09-011-7/+8
| | | | | | | | | | | | | | | Return the status of the init function. This will be used in testing to verify that initialization was correct. BRANCH=none BUG=b:184856083 TEST=make buildall -j Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I578b32b24b3ee59abf646307fb9670d2db74fe3b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3133624 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* STT: Don't talk to the SoC outside S0Rob Barnes2021-08-312-0/+10
| | | | | | | | | | | | | | | | STT interface is not available outside of S0, so report that the interface is not powered and allow the STT hook to exit quickly in this condition. BRANCH=None BUG=b:197745639 TEST=No STT errors with board in G3 state Change-Id: Id0c926ce896cdb4d3096746b3e7cc99db83bdd2d Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3126700 Tested-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* driver: ln9310: fix typoYuval Peress2021-08-311-1/+1
| | | | | | | | | | | | | | | | | | There's a bug in the chip_revision calculation. Also, add a missing include which causes a warning during build. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Id636f4abcfffc0158d879d4b9333c7cb3ac1ee21 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3133800 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Tested-by: Yuval Peress <peress@chromium.org> Auto-Submit: Yuval Peress <peress@chromium.org> Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPM: Rename enum tcpm_sop_type and its constantsAbe Levkoy2021-08-3110-51/+51
| | | | | | | | | | | | | | | As a followup to CL:3104290, give the TCPCI TRANSMIT and RX_BUF_FRAME_TYPE types more consistent names. Most of them can be used for receiving, not just transmitting. Fix lint errors thus revealed. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I399ec479eacc18622fc4d3f55f8bdabf4560fcff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3125995 Reviewed-by: Keith Short <keithshort@chromium.org>
* USB MUX: Convert usb_mux HPD functions to use mux_state_tDiana Z2021-08-307-17/+15
| | | | | | | | | | | | | | Since we have definitions for HPD IRQ and level in the mux flags, extend this to the HPD update function in the usb_mux structure as well. BRANCH=None BUG=b:172222942 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I19c3a65fc821a341338d73fabd7876339b37fe7d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095437 Reviewed-by: Keith Short <keithshort@chromium.org>
* USB MUX: Pull HPD update into mux configurestabilize-14189.B-mainDiana Z2021-08-301-6/+17
| | | | | | | | | | | | | | | The mux HPD update is the only function not currently going through configure_mux(). Pull out its contents so it may be run with the rest of the mux changes. BRANCH=None BUG=b:186777984 TEST=tast typec.Mode*.manual on voxel Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5d91ca89dcdab0dcb0ba844494f9009948ee5abc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078412 Reviewed-by: Keith Short <keithshort@chromium.org>
* ANX7451: Report failure to set mux in G3Diana Z2021-08-261-3/+6
| | | | | | | | | | | | | | | | | | | Since the ANX7451 is unpowered in Z1/G3, return an error for mux sets during this time. This will let the usb_mux.c code know that any set it attempted to perform was unsuccessful. Otherwise, it will be assumed that setting mux mode of None succeeded, when we'll actually power up to default USB mode. BRANCH=None BUG=b:195045790 TEST=on guybrush, power on board and ensure that C1 is put into None mode successfully after its powered Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic98be3bc15e8f0affeda25d7d7170b89e3aecf10 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093087 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* tmp112: Support reading TMP112 in millikelvinRob Barnes2021-08-252-13/+35
| | | | | | | | | | | | | | | TMP112 supports .0625 degrees of resolution. Retain this resolution and support reading the temp in degrees millikelvin. BUG=b:176994331 TEST=Build and run on guybrush BRANCH=None Change-Id: I2802016b1edb08678953238e7f01acdd320c37cf Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001391 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* rt1718s: enable FRSTing Shen2021-08-253-10/+75
| | | | | | | | | | | | | BUG=b:190348051 TEST=Combined with other CLs in the chain, verify FRS workable on Tomato BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I52a020b1288928eb9a0f3ada1364776cd8e78337 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3109709 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* Homestar: Distinguish PS8755 with hidden registerxuxinxiong2021-08-252-0/+26
| | | | | | | | | | | | | | | | | | When TCPC PS8755 is upgraded to PS8805 firmware, the product id cannot distinguish whether the chip is PS8755 or PS8805. Only the hidden register value of PS8755 is 0x80, so use this hidden register to distinguish whether it is PS8755. BRANCH=trogdor BUG=b:196889096 TEST=emerge-strongbad chromeos-ec Change-Id: I99b50dfb2f5ae47c3d4dbb3334dcdae20c281478 Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3113261 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* ec: Fix returning uninitialized varsJeremy Bettis2021-08-241-3/+3
| | | | | | | | | | | | | | | | | | | | And just to make it clearer, don't return ret at the bottom of a if all other cases already do if (ret) return ret; As it turns out, building with coverage doesn't initialize vars to 0. BUG=None TEST=zmake coverage. BRANCH=none Change-Id: Iae5368673517724fd23cb01425c027db9a50644b Signed-off-by: Jeremy Bettis <jbettis@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115428 Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
* mt6360: Don't clear negative number supplier's charge port infoDino Li2021-08-241-1/+3
| | | | | | | | | | | | | | | Because we didn't create space for it to store current/voltage info. Clear its charge port info will override other global variables. BRANCH=asurada BUG=b:179206540 TEST=No panic on asurada when plug AC only on port 0. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ia7a9a058d65aca9b5a84963d1e08f3e2541bc8da Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3113487 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* driver: bmi3xx: Fix perform calibrationBhanu Prakash Maiya2021-08-212-16/+62
| | | | | | | | | | | | | | | | BRANCH=none BUG=b:193869438 TEST=Accel implementation tested on Guybrush $ ectool motionsense calibrate 1 Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Change-Id: Ib52f5a70137a135b8be68115c705f004f932b3b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3036651 Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com> Reviewed-by: Rob Barnes <robbarnes@google.com>
* driver: bmi260: integrate body detectionGwendal Grignou2021-08-201-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | Body detection is accelerometer agnostics. It was added in BMI260, but not finalized. Add list_activity function to enable/disable body detection. BRANCH=volteer BUG=b:195908820 TEST=Check cros-ec-activity is loaded. Enable proximity event: echo 1 > events/in_proximity_change_either_en Load iio_event_monitor, check we get events when moving device on lap to floor: Event: time: 925239910373, type: proximity, channel: 0, evtype: change, direction: falling Event: time: 945020001791, type: proximity, channel: 0, evtype: change, direction: rising ... Change-Id: I423c7044761d2addac36d435781ea19c1f1b18ed Signed-off-by: Gwendal Grignou <gwendal@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3097151 Tested-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Ching-Kang Yen <chingkang@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* sm5803: Replace is_acok methodstabilize-14163.B-mainDevin Lu2021-08-191-28/+12
| | | | | | | | | | | | | | | | Since the CHARGER_MODE_SINK bit is not truly ACOK if discharging on ac. Also the VCHGPWR will drop to zero if discharging on ac. This patch replace is_acok method to avoid AC off while discharging on ac. BUG=b:194990808, b:196998260 BRANCH=dedede TEST=Make sure ectool chargecontrol discharge works. Attached charger to make sure AC is ON. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I7ee72da26b99c8bcb8fbd8c878c930506a244e28 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3081039 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPM: Remove enum pd_msg_typeAbe Levkoy2021-08-183-6/+6
| | | | | | | | | | | | | Convert usages of this enum to tcpm_sop_type. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I5fed273d72e7ad0e191db0cb0d121b70bdd9ecdb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104291 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPM: Rename enum tcpm_transmit_typeAbe Levkoy2021-08-188-11/+14
| | | | | | | | | | | | | | | Rename tcpm_transmit_type to tcpm_sop_type to reflect that it can be used for Rx as well. Describe it in comments. This prepares to consolidate enum pd_msg_type into this enum. BUG=b:155476419 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ife97d4ad51c48f2e832b94e007954919e236a309 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104290 Reviewed-by: Keith Short <keithshort@chromium.org>
* ps8xxx: Wait for chip to wake up from LPMCaveh Jalali2021-08-171-1/+51
| | | | | | | | | | | | | | | | | | The ps8815 can take up to 50ms to fully wake up from sleep/low power mode. When the chip is asleep, the 1st I2C transaction will fail but the chip will begin to wake up within 10ms. After this delay, I2C transactions succeed, but the firmware is still not fully operational. The way to check if the firmware is ready, is to poll the firmware register for a non-zero value. BRANCH=none BUG=b:195087071,b:186189039 TEST=buildall passes Change-Id: If047fc122d7f61ed5fc361f97b47180e5cf08970 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3084331 Reviewed-by: Keith Short <keithshort@chromium.org>
* nx20p348x: Check device status reg for sink modeCaveh Jalali2021-08-171-3/+8
| | | | | | | | | | | | | | | | | | | | | | | This fixes an issue where we sometimes time out waiting for the HVSNK_STS bit to get set after enabling sink mode using the EN_SINK GPIO. Checking for HV_SNK mode in the device status register is more robust as it appears to reflect the state of the EN_SINK pin as expected. I'm still not sure why the HVSNK_STS bit isn't set as expected sometimes. I suspect that it only gets set when there is actual voltage presented by the connected device. BRANCH=none BUG=b:194833460 TEST=with additional debug code, verified that we detect HV_SNK mode even when HV sink switch is off.N Change-Id: Ifa5b9ebaedfc03755306ecb4e3e6e1fa654418d0 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058079 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* driver/amd_stt: Add AMD STT driverRob Barnes2021-08-162-0/+139
| | | | | | | | | | | | | | | | | | Add a driver for writing Skin Temperature Tracking (STT) sensor readings to the SB-RMI interface. STT readings are used to maximize the SOc performance while keeping the skin temperature within specification. BUG=b:176994331 TEST=Build and run on guybrush BRANCH=None Change-Id: If655545158e7dc05946bc67686b1b0b40a40a713 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078050 Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Raul E Rangel <rrangel@chromium.org> Commit-Queue: Raul E Rangel <rrangel@chromium.org>
* driver/sb_rmi: Add AMD SB-RMI driverRob Barnes2021-08-163-0/+248
| | | | | | | | | | | | | | | | | | Add Side-Band Remote Management Interface driver. SB-RMI can be used to manage power limits of the SOC. SB-RMI uses a soft mail box for executing transactions. BUG=b:176994331 TEST=Build BRANCH=None Change-Id: Ie185985e4c8d2c2d915b2ae2447709ddc16adda6 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078049 Tested-by: Rob Barnes <robcb85@gmail.com> Commit-Queue: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Fanli Zhou <fanliccc@gmail.com> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* USB MUX: Introduce flag to clear mux state in G3Diana Z2021-08-161-0/+24
| | | | | | | | | | | | | | | | | | Some muxes may need to be re-set after they've power cycled, and many muxes are tied to the S5 power rails. Introduce a flag which can be used to indicate a mux needs to re-run init and is no longer in LPM after the G3 state has been hit. BRANCH=None BUG=b:195045790 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8bd4184dbea629edf106dbee32f811620ebda0dd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093086 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* ps8xxx: Check for register access errorsCaveh Jalali2021-08-161-7/+15
| | | | | | | | | | | | | | This adds error checking to ps8815_disable_rp_detect_workaround_check. BRANCH=none BUG=none TEST=buildall passes Change-Id: I6c901893e0f5f8ea02fbcb0e6dc082671f13a172 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3087984 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* ps8xxx: Refactor role control delay logicCaveh Jalali2021-08-141-8/+13
| | | | | | | | | | | | | | | | | | This refactors how we deal with ps8xxx_role_control_delay. An array of booelans is replaced with an array of delay values with default of 0ms. Instead of checking the array to determine whether a 1ms delay should be performed, the array unconditionally specifes the delay to be performed. The default 0ms delay is equivalent to the previous "false" entry. BRANCH=none BUG=b:186189039 TEST=buildall passes Change-Id: Ie351c58442eb206f38cea7a1f30dd1789a8c8025 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3084330 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* USB MUX: Generalize mux ACKDiana Z2021-08-1425-47/+175
| | | | | | | | | | | | | | | | | | | | Currently, only the virtual mux driver uses the mux ACK feature, but the actual wait for the host command ACK is a part of the usb_mux general code. Generalize this mux ACK wait so it's available if needed in the future for more muxes. Additionally, moving this wait out of the mux set will allow us to lock the muxes intelligently between tasks, without keeping the muxes locked during the inactive ACK wait. BRANCH=None BUG=b:172222942,b:186777984 TEST=tast typec.Mode*.manual on voxel Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I61a043425a482cc6f3170548c888d91ec20c2a82 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078411 Reviewed-by: Keith Short <keithshort@chromium.org>
* ps8xxx: Simplify firmware version logicCaveh Jalali2021-08-141-21/+18
| | | | | | | | | | | | | | This removes a test that we know is always true before fetching the firmware version number from the chip. BRANCH=none BUG=none TEST=buildall passes Change-Id: Ie3096f80cb229291681ebe6c48f69a4b7a4d7be3 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093036 Reviewed-by: Keith Short <keithshort@chromium.org>
* ps8xxx: Remove redundant & operator on functionsCaveh Jalali2021-08-131-27/+27
| | | | | | | | | | | | | This removes redundant usage of the address operator on function names. BRANCH=none BUG=none TEST=buildall passes Change-Id: Idd9fbe03af90e3ee75f6b420041a0c9bf67be884 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093034 Reviewed-by: Keith Short <keithshort@chromium.org>
* IOEX: nct38xx: Map Type-C port to IOEX portVijay Hiremath2021-08-132-3/+28
| | | | | | | | | | | | | | | | Default function assumes Type-C port number to be same as the I/O expander number. This logic can differ based on the board design hence added overridable function to map Type-C port to I/O expander port. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Iec9deba7d2a6bf981664ec8d1665f54dfa2905b6 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3076471 Reviewed-by: caveh jalali <caveh@chromium.org>
* rt1718s: implement adc readTing Shen2021-08-132-6/+119
| | | | | | | | | | | | | | | | | | | | Cherry uses the VBUS1 adc channel in RT1718S to check the VBUS voltage on port 1. Thus add this function for Cherry. BUG=b:196001868 TEST=1) manually check the readings of ADC_VBUS1 2) Combined with board/ side changes, `ectool usbpdpower` shows correct value BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I243f28b2bd4e8541257afcacb50a024a72e301fd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3040801 Reviewed-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* nct38xx: Split after-reset timestabilize-14151.B-mainDevin Lu2021-08-131-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Split after-reset time for NCT3807 and NCT3808, since the after-reset time is not the same. From the datasheet (section 4.4.2 Reset Timing) as following: * | Min | Max | * ----------------------+-------+-------+ * NCT3807 (single port) | x | 1.5ms | * ----------------------+-------+-------+ * NCT3808 (dual port) | x | 3ms | * ----------------------+-------+-------+ Currently the after-reset time for NCT3807 is zero. Change to 2ms to fit specification as well. BUG=none BRANCH=none TEST=On Redrix. Initial success with NCT3807. TEST=On Dirinboz. Initial success with NCT3807. TEST=make buildall. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I1f47f57c0d8955946b1c2522e1a1736739217f41 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3068492 Reviewed-by: caveh jalali <caveh@chromium.org>
* bq25710: add min system voltage configurationScott Chao2021-08-122-0/+33
| | | | | | | | | | | | | Add this function to let each board can control it. BUG=b:196184163 BRANCH=none TEST=make -j BOARD=gimble Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Ic47c67e11eba1bfadef5f5942cff9fcad8b49ad2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3086786 Reviewed-by: caveh jalali <caveh@chromium.org>
* DP/TBT/USB4: Retimer WA resolved Brya TBT lane bonding issue in AP modemadhusudanarao amara2021-08-061-0/+20
| | | | | | | | | | | | | | | | | In AP Mode DP exit to TBT entry is causing TBT lane bonding issue. Issue is not seen by calling the retimer reset as WA at the time of disconnect mode configuration. Revert this patch after getting the actual fix. BUG=b:193402306 BRANCH=None TEST=Checked TBT enumeration in AP Mode TOREVERT=b:195375738 Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com> Change-Id: Ia22e061a863940b2a13ad5a38f4fe130737c5c20 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058157 Reviewed-by: Keith Short <keithshort@chromium.org>
* rt1718s: add proper define guardTing Shen2021-08-061-0/+2
| | | | | | | | | | | | | | | | | The original code can't compile if CONFIG_USB_PD_TCPC_LOW_POWER not defined. Compiler complains that tcpci_enter_low_power_mode not found. BUG=none TEST=make BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: If59bf9e82bf5db879d83eb02b64a36c32c9613b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3076474 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* Drop some obsolete boardsJack Rosenthal2021-08-051-9/+0
| | | | | | | | | | | | | | | | | | | | | samus: AUE in M91, M92 pushed to stable already samus_pd: samus pd chip dragonegg: canceled cheza: canceled flapjack_scp: flapjack was canceled atlas_ish: atlas shipped, but ish project canceled sklrvp,glkrvp: these are pretty old intel reference boards and the portage overlays were already deleted ... assume nobody needs the EC firmware anymore either BUG=none BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I794867ac82f37ffa2267e2e59ac02bc381688c57 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069716 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* driver: lis2dw12: Set FIFO vector number properlyGwendal Grignou2021-08-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | We have been lucky the accelerometer was always in first position, as the FIFO filling routine always set the sensor number to 0. Fix for hayato. BUG=b:192649615 TEST=On hayato, using iioservice_simpleclient --channels="accel_x accel_y accel_z" --device_id=0 --frequency=10 --samples=10 Check the sensor data is constant. (device_id 0 is the base accelerometer), we get data for that sensor only. Checking with device_id set to 2 (the lid accelerometer), that we get samples for that sensor. BRANCH=asurada Signed-off-by: Gwendal Grignou <gwendal@google.com> Change-Id: I96ea5f696c38b8c54aed7537f93eba70a647dc53 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069990 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org>
* tcpm/rt1718s: implement software workaroundTing Shen2021-08-032-0/+65
| | | | | | | | | | | | | | | | Implement the software workarounds suggested by Richtek. See issue link for details. BUG=b:194982205 TEST=On Cherry & Tomato, manually verify PD works BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I7d9c6c5fd3c9266f27e52c1756a7ecedc75f1846 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848280 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* ps8xxx: patch ps8805 A3 chip Device IDSue Chen2021-08-032-0/+43
| | | | | | | | | | | | | | | | | Add config option for the ps8805 to override the TCPCI Device ID field based on the page 0 register 0x62 bit 7-4. A2 chip: reg 0x62 bit7-4 = 0x0 A3 chip: reg 0x62 bit7-4 = 0xA BUG=b:193099851 BRANCH=trogdor TEST=ectool pdchipinfo can show overridden DID for both A2 and A3 chip on Lazor DUTs Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I99767c92a97c2fcefd3bbe03e3cd2b90de192ff3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3056225 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* COIL: FPC: Update SPI terminologyCaveh Jalali2021-08-011-3/+4
| | | | | | | | | | | | BRANCH=none BUG=b:181607131 TEST=compare_build.sh matches Change-Id: I2dc308bfc80c5921dcc172bee433a6502105852f Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jora Jacobi <jora@google.com>
* cherry: enable usb pdTing Shen2021-07-291-0/+4
| | | | | | | | | | | | | BUG=b:177391887 TEST=verify pd works BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ied4516abef3d544b8b4bdf8355f0f9fc305629a3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793783 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* rt1718s: fix incorrect alert methodTing Shen2021-07-291-1/+1
| | | | | | | | | | | | | | | | | | | | rt1718s driver incorrectly used the common alert function instead of its own implementation. This bug was not detected by `make buildall` because no one actually enables rt1718s until CL:2793783. BUG=b:177391887 TEST=make BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I303cb0b6b7d0177648871ea36c1fc5c513fbb336 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058082 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* ppc/rt1718s: notify charger task about vbus changeTing Shen2021-07-292-14/+48
| | | | | | | | | | | | | | | | | | | PPC driver is responsible to notify charger task about vbus change. Original driver didn't implementation this. Also make BC1.2 driver correctly enables BC1.2 detection on vbus change. BUG=b:192422592 TEST=manually verify PD and BC1.2 works BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I0bcbe0a1a43d9a9bcae61d69e247829648dd0d7c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3045249 Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* nx20p348x: Fix DB_EXIT flag handlingCaveh Jalali2021-07-281-1/+1
| | | | | | | | | | | | | | | | This fixes a typo where the CTRL_DB_EXIT was being set on the wrong variable. this appears to date back to the very first commit of this driver with chromium:966926. BRANCH=none BUG=b:74206647 TEST=buildall passes Change-Id: I2c389419c09b0bed1e341dcd6ae6d187a698efcd Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058078 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* zephyr: Add TCS3400 emulatorTomasz Michalec2021-07-271-122/+0
| | | | | | | | | | | | | | | | | | Add TCS3400 emulator which is emulated device on i2c bus. Emulator properties can be defined using device tree or runtime TCS emulator API. It allows to set custom handlers for write and read messages. Emulator is able to convert internal values to register values that can be obtained by driver through i2c interface. Conversion takes current state set by driver into account (gain and data acquisition time). BUG=b:184856080 BRANCH=none TEST=none Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I16f25de43e047df39f84ce86044736d50c9a49c8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3048094 Reviewed-by: Simon Glass <sjg@chromium.org>
* SM5803A: Handle OVP_VBAT in chargingudaykiran2021-07-272-5/+135
| | | | | | | | | | | | | | | | | | | | | | | One of the boards under test having charging process interrupted due to early triggering of SM5803A battery over voltage comparator (OVP_VBAT). Programmed OVP_VBAT comparator has +/-5% setpoint accuracy. Current setpoint was 9.2V. so the possible triggering range is from 8.74V to 9.66V. In order to avoid this issue OVP_VBAT was set to new setpoint and simultaneously setting GPADC threshold to 9V. VBAT_SENSP high interrupt is configured. When this interrupt happens battery charge is disabled. Although this issue only found for 2S batteries this tolerance range can possibly effect 3S batteries too. BUG=b:182373694 BRANCH=dedede TEST=Fix was verified by Silicon Mitus. Signed-off-by: udaykiran <udaykiran@google.com> Change-Id: Ibc7bb51af56ec9d8ef8d27b58cdab9c59a03ae87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2927935 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch_fp/board_rw: Set DIVIDER_HIGHSIDE to 1 during board initPatryk Duda2021-07-261-6/+0
| | | | | | | | | | | | | | | | | | | | | On dragonclaw, setting GPIO_DIVIDER_HIGHSIDE to 1 is necessary to enable communication with FP sensor. Until now it was enabled during fp_sensor_init() which was called from fp_task() only in private build (when HAVE_FP_PRIVATE_DRIVER is defined). This was causing problems with fpsensor_hw hardware unittest, which is public build. The problem was solved by enabling GPIO_DIVIDER_HIGHSIDE in configure_fp_sensor_spi(). This approach also required to change get_fp_sensor_type() function to leave GPIO pin enabled. BUG=b:170432597 BRANCH=none TEST=./test/run_device_tests.py --board bloonchipper --tests fpsensor_hw Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I9cf50ef1377da2dec57d73f9e1374928da86481d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3034857 Reviewed-by: Craig Hesling <hesling@chromium.org>
* ppc/nx20p348x: Initialize device control regCaveh Jalali2021-07-221-0/+5
| | | | | | | | | | | | | | | | This initializes the Device Control Register (0x0b) to its power-on reset value. This chip is not connected to the system reset signal, so we need to explicitly set registers to their power-on reset value so we start from the same configuration when we reboot as we do on system power on. BRANCH=none BUG=b:193211352 TEST=charging from another chromebook is reliable now Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I82ce3fd624091b89668a682cb8748af171552d72 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044412
* ppc/nx20p348x: Disable VBUS discharge in sink modeCaveh Jalali2021-07-221-4/+26
| | | | | | | | | | | | | | | | | This explicitly disables VBUS discharge when entering sink mode. According to the vendor, keeping VBUS discharge enabled can cause some noise and that explains some of the instability we had observed when charging from another chromebook and 5V3A charger. BRANCH=none BUG=b:193211352 TEST=charging from another chromebook is reliable now Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I117dd3f7f9efddce00f903c2b290fa85c6052c5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044411 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* raa489000: Wait 853us before checking VBUS at initwangganxiang2021-07-201-0/+2
| | | | | | | | | | | | | | | | | According to the RAA489000 manual, extend the time to read the vbus after the ADC initialization is completed. BUG=b:193402296 BRANCH=keeby TEST=make BOARD=cappy2 pass Signed-off-by: jesen <wangganxiang@huaqin.corp-partner.google.com> Change-Id: Ie326932a9a5d3849e31e15a090074ad1274a7266 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3023762 Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* rt1718s: implement low power modeTing Shen2021-07-202-1/+18
| | | | | | | | | | | | | | | enable low power mode to further decrease power consumption. BUG=b:192815893 TEST=manually measure power BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ib5d22d1d3c9cc8ed644075b8ed239f96d0eea67e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3004127 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* driver: bma4xx: Reduce FOC sample limitBhanu Prakash Maiya2021-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | Reduce FOC sample limit to avoid EC command timeout when factory toolkit rums the calibration process. BRANCH=none BUG=b:192409667 TEST=Accel implementation tested on Guybrush $ ectool motionsense calibrate 2 Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Change-Id: I75a0d4dfa1e2b3b947000f97f2f15142e597e657 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3034961 Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com> Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
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