| Commit message (Collapse) | Author | Age | Files | Lines |
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No functional changes.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system
Change-Id: I55cf9c60e92177fd441614a8f9fce2d3acca3d0e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36706
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This removes the duplicate uart_emergency_printf() vs. panic_printf()
/ uart_emergency_puts() vs. panic_puts() implementation and saves
~0.5kb of code size.
The other significant change is that uart_flush_output() is now smart
enough to determine if it's in an interrupt; if so, it will spin-flush
the output buffer instead of waiting on the uart interrupt. This
removes the need for a separate panic_flush().
BUG=chrome-os-partner:15579
BRANCH=none
TEST=crash unaligned; should print well-formatted crash dump
Change-Id: Ifae756203dd1881806be563308077c1d68302e1f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36695
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With this CL, if CONFIG_FPU is defined (only for Link, ATM), the EC task
switcher will enable CONTROL.FPCA and expect all stack contexts to include
floating point state as well as normal state (an additional 18 words).
To support this, we need to increase the allocated stack space for each
task. The stack sizes are already chosen empirically, so I'm just rounding
them up a bit.
BUG=chrome-os-partner:14766
BRANCH=Link
TEST=manual
There should be no noticeable change. If you run the EC command "taskinfo"
you'll see the increased size each thread's stack, but everything that was
working before should continue to work just fine.
The additional overhead required to load and store another 18 words on each
context switch is not really measurable (I tried).
Change-Id: Ibaca7d7a2565285f049fda6906f32761e83207af
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/34391
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Increase stack size slightly for vboot hash task since the vboot
SHA256 function allocates ~300 bytes of stack data. Reduce stack size
for watchdog, power LED, and a few other tasks with simple call trees
where we can be sure an error path isn't going to blow past the
reduced stack.
This frees up ~1KB of RAM on STM32.
BUG=chrome-os-partner:13814
BRANCH=all
TEST=boot system; shmem should show more unused RAM; taskinfo should show
tasks still have unused stack
Change-Id: I47d6b77564a0180d15d86667cc0566a8919b776e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32608
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This is a precursor to supporting task-specific stack sizes.
BUG=chrome-os-partner:13814
TEST=boot; taskinfo shouldn't print garbage
BRANCH=all
Change-Id: Iff6cee8b5f292dd026244239c99ba2252e75cf12
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32592
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This is a precursor to supporting task-specific task sizes. I've
benchmarked this vs. the current stack pointer method; no measurable
performance difference.
BUG=chrome-os-partner:13814
TEST=boot EC; taskinfo; if it boots and doesn't print garbage, it worked
BRANCH=all
Change-Id: Ia326c3ab499ac03cce78dbacaa52f735601a171e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32603
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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BUG=chrome-os-partner:13814
TEST=taskinfo; should show stack used per task
BRANCH=all
Change-Id: Ie40a70a8647c767ea6ec3d164f81c63b62b5008e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32590
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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When the AP is not running and we have enough time go to STOP mode
instead of simple idle.
The EC consumption should drop from 12mW to a few mW.
This is currently not activated by default, you need to type "sleepmask
0" in the EC console to activate it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8866
TEST=on Snow, check the software is still working properly when STOP
mode is activated and measure power consumption on 3v_alw rail.
Change-Id: I231d76fe6494c07b198c41694755b82d87c00e75
Reviewed-on: https://gerrit.chromium.org/gerrit/29315
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:10042
TEST=boot system, ctrl+alt+F2, type on console; shouldn't crash
Change-Id: I935bc141fbbc1e7d0d073f1754104808a24fe869
Reviewed-on: https://gerrit.chromium.org/gerrit/24232
Commit-Ready: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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...so I can use usleep() for eeprom delays in the CL coming next...
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:10200
TEST=if it boots, it worked
Change-Id: I564578f24452a4ac39abe79ff28cfff4b665ad2f
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Additional help messages and usage are gated by
CONFIG_CONSOLE_CMDHELP, so we can turn it on if there's space (adds
about 3KB to image size) and turn it off when there isn't.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=manual
1) help
2) help list
3) help gpioset
4) gpioset -> wrong number of params
5) gpioset fred 0 -> param1 bad
6) gpioset cpu_prochot fred -> param2 bad
Change-Id: Ibe99f37212020f763ebe65a068e6aa83a809a370
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Instead of storing task contexts in .data and wasting several kB of
flash with mostly 0s, move them to .bss and fill the initial context at EC
startup. The runtime overhead is small enough.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9839
TEST=run on Link and check verified boot and chromeOS startup are OK.
Change-Id: Iaef23d46a4e3e80e49886dfbf7ab1f537c587362
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This makes timestamps much easier to read.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9866
TEST=timerinfo, taskinfo, battery commands have fixed-point numbers,
and timestamps printed in the log look right.
Change-Id: If91c83f725984c8e04bfb7cdcff316d9c3bfe24c
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Charging state machine doesn't need to be able to preempt everybody.
Keyboard scanning and power button should preempt, because they need
to debounce/scan at a stable rate.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=system still boots
Change-Id: Id57c680b9fa4652bc10d19270620d63788a7b269
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1) When frequency changes, reload the watchdog timer right away, or it
may expire before the next reload. (Only matters when re-enabling the
PLL.)
2) Split out the timer/task debug output used by the watchdog into
their own routines, instead of assuming it's safe to call the command
handlers. Also make the flushes in those print routines safe to call
from interrupt level.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=waitms 1500; should print task dump again
Change-Id: I07e0ed24a526ae499566dab0bbeb0f5755cd5be6
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(Or, if profiling is enabled.)
Also, track the number of task switches if profiling is enabled.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9274
TEST=taskinfo
Also test by commenting out CONFIG_TASK_PROFILING in board.h; code
should still compile and run.
Change-Id: Ib3dbce74b6ccfba2bbe18c7309136412c30f364e
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This adds a 'ch' command which prints/sets which channels are active
This handles all the async output; the remaining debug commands will
be refactored to use ccprintf() / ccputs() in a followup CL.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7464
TEST=manual
ch --> all channels active
ch 0x100 -> just port80 active
powerbtn -> system boots; only port 80 codes shown on console
Change-Id: I9efc43acec919b62b78c2c82c61946d32380adfe
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Also tracks the distribution of IRQs, so we can see what's triggering
interrupts.
Task profiling is optional, enabled via CONFIG_TASK_PROFILING.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7464
TEST=taskinfo
Change-Id: I266f2b49bff9648cda446210d5a302b460fec244
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Fewer magic externs = good.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=if it boots, it works
Change-Id: Ifadeb1701400c5492c40d2eaf8f68f2d70189648
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When we are in interrupt context and doing a task_set_event,
if we are interrupted by a timer interrupt firing, we might end
resetting the runnable bit added by the expiration of a timer (when
finishing the interrupted read-modify-write to tasks_ready).
So we need to have an atomic access there.
We don't need to atomic primitives (and the associated overhead) on other
tasks_ready accesses because there are always done at the highest
priority.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8721
TEST=from Linux, run "ectool lightbar test" several times and see that
the keyboard task no longer ends up stuck with a timer event set and no
runnable bit.
Change-Id: Ied45ee33cb6aba4549626d35d694f1c259f2400c
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8971
TEST=manual
waitms 1500
(see watchdog trace)
waitms 1500
(should see watchdog trace again)
waitms 3000
(should see trace, then system should reboot)
Change-Id: Ieb5009d7a7bc9e1ed795e58efb0cb44a1eeb2706
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Fix some mistakes in previous commit. Modified some comments and moved
guard value initialization to a more readable place.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8069
TEST=Compile with detection enabled. Cause a task to overflow and see
device halted. Hook gdb and see it stopped at the assertion.
Change-Id: I608ee9aec3fda8c3945e1874d4bbb2c4ae1fc6dd
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Use guard value to detect stack overflow
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8069
TEST=Compile with detection enabled. Cause a task to overflow and see
device halted. Hook gdb and see it stopped at the assertion.
Change-Id: I3417cca8edf4e1291ccb7848bd564b631a9ce463
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Add nopll command to turn off the PLL, reducing the system clock to 16Mhz.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8798
TEST=manual
boot system
press power button to boot x86
temps // should print all temperatures
timerinfo
timerinfo
timerinfo // convince yourself this is counting up at about 1MHz
nopll // this drops the system clock to 16MHz
temps // should still print all temperatures
timerinfo
timerinfo
timerinfo // should still be counting up at about 1MHz
Change-Id: Ie29ceb17af348148bffadf63d60c1b731f4c3f6d
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7461
TEST=manual
make BOARD={bds,link,daisy}
make tests
flash link system and make sure it boots
Change-Id: I1241a1895c083e387e38ddab01ac346ca4474eb9
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This is necessary at init-time for verified boot to jump from RO to
one of the RW images.
It's also used by factory EC update to update one image and then jump
to the updated image to finish the update. In this case, the x86 does
NOT reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8449
TEST=manual
1) power on x86 and log in
2) sysjump a --> system is in a; x86 has not rebooted
3) sysjump ro --> system is back in RO; x86 has not rebooted
4) reboot -> system is in RO; x86 HAS rebooted
Change-Id: I9dbadcf9775e146a0718abfd4ee0758b65350a87
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The re-scheduling is protected by increasing our priority to -1,
according to ARMv-M architecture manual, we need an ISB after setting
the faultmask register to ensure that the new priority is visible.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8492
TEST=run on proto-0.5 and see that the temperature sensor and battery
tasks are longer hanging (see the bug for details how to check it)
Change-Id: Ia55859cf5c9101a09c61be7647a920126fc0a3b9
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When updating the lock field of the mutex to acquire it, if the store
exclusive fails, we want to retry immediatly else if the failure has
been triggered by the other user doing the mutex_unlock we might not be
woken up.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8492
TEST=run on proto-0.5 and see that the temperature sensor and battery
tasks are longer hanging (see the bug for details how to check it)
Change-Id: I0c8a4e997666a7781b3837f0dbbc47ffbc06b6c3
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8350
TEST=manual
Hack a task function to return. Then see that it prints an error to
the debug console and the EC continues running, instead of seeing a
hard-fault.
Change-Id: Iacd2b83c4d4845bb8e6c61e07c3150df8edc7e49
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Implement enable_fpu() and disable_fpu().
enable_fpu() disables interrupt and then enables FPU.
disable_fpu() disables FPU and enables interrupt.
Also added a CONFIG_FPU flag.
BUG=chrome-os-partner:7920
TEST=none
Change-Id: I2d71f396d9c7d7ac4a6a2d525f3d86f8aae87521
Signed-off-by: Vic Yang <victoryang@chromium.org>
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Preparatory work to introduce a second SoC : 5/5
All Cortex-M3/4 have the same NVIC registers at the same address.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run EC firmware on BDS and check a few console commands
Change-Id: I6b03c4c1fb21850be8c8afb711ea44134c8cdea1
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Preparatory work to introduce a second SoC : 3/5
We split the drivers files which contain SoC specific drivers from the
OS files which only depend the actual CPU core.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run EC firmware on BDS and test a few commands on the console.
Change-Id: I598f8b23e074da9bd6b0e2ce6689c1075fe854f0
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