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* zephyr: Remove CONFIG_VBOOT_HASH_RELOAD_WATCHDOGMichał Barnaś2021-05-181-18/+0
| | | | | | | | | | | | | | | | | | This reverts commit 0e5fa530e2f1eba6e16188be65ac39974a151a17. After commit 97e22d467 it is no longer needed to reload watchdog during hash calculation. BUG=b:182499153 BRANCH=none TEST=Flash EC and verify that hash calculation is correctly done without rebooting by watchdog. Reading watchdog value shows that there is enough remaining time. Change-Id: Ia7bb6452a6ac42cda88d8b5e1203876cd0465b31 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897239 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Mock: Add hard reset to PRL mockDiana Z2021-05-171-1/+5
| | | | | | | | | | | | | | Add the ability to detect hard reset send through the PRL mock. Note that a hard reset is a transmit type, not a control or data message. BRANCH=None BUG=b:184764468 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iac4e52a66b8282e8a0e341e65c4f437c6154fe77 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897127 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* TCPMv2: Hard reset on PR swap interruptionDiana Z2021-05-171-0/+11
| | | | | | | | | | | | | | | | When a PR swap is interrupted, send a hard reset. Since Vbus is turning off, a soft reset wouldn't restore our Vbus and connection state for this protocol error. BRANCH=zork BUG=b:184764468 TEST=on jelboz, connect problematic dock which interrupts PR swap and ensure connection can recover successfully Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I901c5a99af3f8cfae038d447bac8e0f37fedc9c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2880811 Reviewed-by: Edward Hill <ecgh@chromium.org>
* kblight: Don't leave kblight enable state undeterminedRob Barnes2021-05-171-0/+2
| | | | | | | | | | | | | | | Keyboard backlight enabled state is undetermined after initialization. Set kblight enabled state to off on initialization. BUG=b:187757151 TEST=Guybrush kblight enable GPIO is deasserted on reboot BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ia62c9f84c5593ac393808fac4f0373e831ccd5fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2888226 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Port80: handle 4-byte Port80 codes properlyJun Lin2021-05-171-9/+8
| | | | | | | | | | | | | | | | | | | | | | | In this CL, there are the following changes: 1. call hook_call_deferred to dump Port80 codes in any case. 2. inhibit Port80 code which is greater than 0x100 from being sent to host (i.e. written to last_boot variable) BRANCH=none BUG=b:184872297 TEST=build the image with "#define CONFIG_PORT80_4_BYTE"; connect npcx9_evb to the eSPI host emulator; the host sends a PUT_IOWR_SHORT transaction to IO address 0x80 with 4 bytes of code "0xEEE20400"; the EC console shows: Port 80 writes: eee20400 <--new Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I4bcc75cc74c2ad75a51bb25af5d1a13e8b36dca6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2894324 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com>
* kblight: Set kb backlight enable gpiostabilize-13974.B-mainRob Barnes2021-05-141-0/+4
| | | | | | | | | | | | | | Set the keyboard backlight enable gpio on enable/disable. This will improve power usage on some boards. BUG=b:187757151 TEST=Set backlight to 0, 50, 0 and observe the enable gpio is 0, 1, 0 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ie03e98d939d05aea861c7b885a45b7e0c476db59 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2887550 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TCPMv2: Initiate VCONN Swap when requestedstabilize-13971.B-mainAbe Levkoy2021-05-141-1/+1
| | | | | | | | | | | | | | | | | | | Do not ignore a requested VCONN Swap if VDM setup is done. Use a DPM request flag (which is always handled in the ready state) instead of the VCONN Swap PE flag (which is only handled if mode entry hasn't completed). BUG=b:187861138 TEST=make buildall BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I32ebb7c50e9abc47351398f229a2b464605f634d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895425 Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* TCPMv2: Correct PD 3.0 reply when SVDM isn't supportedDiana Z2021-05-141-1/+11
| | | | | | | | | | | | | | | In PD 3.0, a DUT must reply with Not_Supported when a SVDM isn't supported. Note that PD 2.0 is still perfectly welcome to send a NAK reply for this case. BRANCH=None BUG=b:181194535 TEST=with follow-on CL, verify TD.PD.VNDI3.E3 VDM Identity passes Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie3b554cca017494b86342df1e9149b4452c83852 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2881028 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr: i2c: remove scl and sda referencesYuval Peress2021-05-141-0/+2
| | | | | | | | | | | | | | | The SDA and SCL components of the struct i2c_port_t are only used in and for the i2c_wedge.c logic. This isn't needed in Zephyr. Remove the values and functions that use them from the Zephyr build. BRANCH=none BUG=b:188179405 TEST=build volteer and trogdor Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I71a26fbd9bc51def744ef1f16a540728482c5a2b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2896235 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* mkbp: Move key simulation to input devicesBoris Mittelberg2021-05-102-65/+68
| | | | | | | | | | | | | | | | | | Today some platforms include MKBP_KEYBOARD because they use side buttons, switches or other events that share the same driver with MKBP keyboard. Those platforms don't enable KEYSCAN task. The CL is moving key emulation functionality to MKBP input devices, to make a clear separation between the real keyboard usage and emulation/buttons/switches/etc. All boards that were selecting `CONFIG_KEYBOARD_PROTOCOL_MKBP` without KEYSCAN task are now updated to select `CONFIG_MKBP_INPUT_DEVICES` BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I515140ebf6e175f4b29991329f92266ffca232a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2824044
* mkbp: EC buttons and switches via MKBPBoris Mittelberg2021-05-106-166/+195
| | | | | | | | | | | | | | Allowing EC buttons and switches to be signaled via MKBP protocol, using CONFIG_MKBP_INPUT_DEVICES. Default behaviour is unchanged. BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Cq-Depend: chromium:2824044 Change-Id: Ib96f98ecb3717a8ee8963be69fb7d7eb72e6d132 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796382
* PCHG: Enable device event on suspend completeDaisuke Nojiri2021-05-102-0/+14
| | | | | | | | | | | | | | | | | | | | | | Currently, PCHG can send a device event any time. When a signal is sent to the host while it's attempting to suspend, suspend is delayed by 10 seconds. A solution is to make Powerd disable a corresponding PCHG event (i.e. EC_DEVICE_EVENT_WLC) when it's notifying an upcoming suspend to other processes. This patch makes PCHG re-enable EC_DEVICE_EVENT_WLC after suspend is complete. BUG=b:182973695, b:173235954 BRANCH=trogdor TEST=Verify CoachZ suspends without a delay. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I10d7fcf234a7e0e05ce5d77b8e930a0cf0748331 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2863564 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Storo: Use display SoC to control charge LEDDaisuke Nojiri2021-05-101-2/+11
| | | | | | | | | | | | | | | | | | | | Currently, Storo uses the state of charge provided from the battery. This isn't the same as the SoC shown on the screen because Powerd compensates it based on the full factor and the low battery shutdown threshold. This change makes Storo use the display SoC for the charge LED module so that the charge LED and the display SoC synchronously work. BUG=b:181506409 BRANCH=dedede TEST=Storo's LED turns from amber to white when the display soc reaches 95% (internally 94.6%). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I42c505c9fbd39f82de2318f0d7ff8589eeca4d8c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2876165 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* util: Add explicit castsTom Hughes2021-05-061-1/+1
| | | | | | | | | | | | | | When compiling with C++, the implicit casting that is performed in C is disallowed. Add casts in preparation for C++ compatibility. BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I5c25440819428db65225c772c1c5115a735db58a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2864519 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: lid angle calculation: Exclude any measurement over 1.1gGwendal Grignou2021-05-061-1/+1
| | | | | | | | | | | | | | | | | When a given axis is reporting 1.1g or over, it means the device is moving. The constant representing the limit was not set properly. BUG=b:187338766 TEST=unittests. BRANCH=none Signed-off-by: Gwendal Grignou <gwendal@google.com> Change-Id: I36e38b5d7957ecaccc2c4e088d9aa506af6a2315 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875484 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org>
* common: motionsense fifo: Reset the initialized bits after commitYuval Peress2021-05-041-0/+6
| | | | | | | | | | | | | | | | | | | | | Previously once we had one sample from a sensor, we considered the fifo initialized. Meaning we would use our computed next timestamp to spread the timestamps. This was causing issues with some devices that ended up causing the timestamps to run ahead. Reset next_timestamp_initialized back to 0 after each commit. This will allow repeated timestamps but only if a driver stages/commits the same timestamp twice. Staging the same timestamp with only a single commit will still work as before (which is the expected path). BRANCH=none BUG=b:168335284 TEST=make run-motion_sense_fifo Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ib7c566f69d7c1e4e898050b67105555dd05376e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2871055 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Port80: allow to accept 4-byte Port80 codeJun Lin2021-05-041-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | The original Port80 implementation assumes that the Port80 code is only 2-byte wide and is less than 0x100. In the recent AMD chipset (CEZANNE), AP will send a 4-byte Port80 code via a single PUT_IOWR_SHORT eSPI transaction in PSP. This CL adds a config option to allow the Port80 to print 4-byte code when the config is defined. BRANCH=none BUG=b:184872297 TEST=build the image with "#define CONFIG_PORT80_4_BYTE"; connect npcx9_evb to the eSPI host emulator; the host sends a PUT_IOWR_SHORT transaction to IO address 0x80 with 4 bytes of code "0xEEE20400"; the EC console shows: Port 80 writes: eee20400 <--new Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I3b93d9fc41e1875bb628a15c58231005e9555cfd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2858296 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Raul E Rangel <rrangel@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* vboot: convert watchdog reload check to plain #ifdefYuval Peress2021-05-021-6/+7
| | | | | | | | | | | | | | | | When not defining CONFIG_WATCHDOG or in Zephyr builds setting CONFIG_WATCHDOG=n the build would fail here because CONFIG_WATCHDOG_PERIOD_MS was not defined. This is avoided by using #ifdef instead of IS_ENABLED BRANCH=none BUG=none TEST=built lazor with and without zephyr Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I9f390bf32840fc98d38612cc1fcf00d779f902ee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2859466 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Use board specific MF preference for DP AttentionScott Collyer2021-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Both DP Status and DP Attention messages contain a MF bit which allows the UFP-D to signal to the DPF-D its multi-function preference. Chromeos host machines only act on this bit in the DP Status message. However, other host machines may also use this bit in the DP Attention message. This CL adds a call to a board specific policy function so that the MF bit can be set correctly in both the DP Status and DP Attention message. BUG=b:186632734 BRANCH=quiche TEST=ODM partner verifed that with this bit set in both DP Status and DP Attention, the host machine will select pin configuraiton D. Previously, the host machine was selecting pin configuration C. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I0242d2a5ad056ec210d7364b606528e4a54858c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2856290 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Battery: Add command to export display SoCDaisuke Nojiri2021-05-011-13/+44
| | | | | | | | | | | | | | | | | | | | | | Currently, CrOS EC passes the battery remaining capacity (mAh) and the full capacity (mAh) through ACPI to the AP so that the host can calculate the battery SoC. The host further manipulates the SoC to get the display SoC, which is used to determine user visible behaviors. To get consistent behaviors in all power states, this change enables the EC to send the display SoC to the host via EC_CMD_DISPLAY_SOC command. The Powerd's part is I5bd1371f2569d21d55df1b50a3d709b98bbf0325. BUG=b:174433637, b:181506409, b:80270446, b:109954565 BRANCH=dedede, trogdor, nami, hatch TEST=Storo, CoachZ Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Idc6992625d992a73be141987d02ed220508d3b74 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853142 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* retimer: check power for firmware upgradeli feng2021-05-011-12/+26
| | | | | | | | | | | | | | | | | | | | | | | Before retimer firmware update, check power, if battery is not present, or battery level is low (<5%), not allow PD suspend/performing retimer firmware update process. BUG=b:185320314 BRANCH=none TEST=On Voxel DVT, AC only, no battery, boot up system and confirm NDA PD port is not suspended, and retimer firmware update is not performed. DA port has correct device functions. TEST=On Voxel DVT, battery is low (< 5%), boot up system and confirmed NDA PD ports is not suspended, and retimer firmware update is not performed; DA port has correct device functions. TEST=On Voxel DVT, when battery level >=5%, confirmed NDA PD port can be suspended and retimer is scanned. DA port has correct device functions; device tested are DP dongle, TBT dock and USB4 device. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I1c5b2bc54b2f6307503f82112f28bbc8d6b0591a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2858283 Reviewed-by: Keith Short <keithshort@chromium.org>
* tcpc: Add common routine to check powerli feng2021-05-012-42/+43
| | | | | | | | | | | | | | | | | | | | | | | This comment is from CL:1123314: We do not want to allow depthcharge to suspend the PD port for a firmware upgrade if there is not enough battery power to last during the full firmware upgrade. A common routine is created to check power: pd_firmware_upgrade_check_power_readiness() in usb_common.c. Firmware upgrade which needs to suspend PD port should check this function to make sure there is enough power. BUG=none BRANCH=none TEST=make -j buildall Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I47910a4d82da9b569c297ad2cd399a2faf4cf98a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2862556 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* TCPMv2: Set CC on contract invalidation only if connectedDiana Z2021-04-301-2/+2
| | | | | | | | | | | | | | | | | | | When a contract is invalidated, it's important we advertise our current limit Rp rather than a residual collision avoidance Rp. However, we should not attempt to set CC's when we're in a disconnected state. This may cause us to set an unexpected CC selection, such as Ra if the TC layer hasn't set the first termination yet. BRANCH=None BUG=b:183182447 TEST=on guybrush, boot with i2c tracing enabled and ensure Ra is never set during init. Perform PR swaps and hard resets as source to ensure correct Rp is set. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8fbe06685e4b4a6493dfbf55270ce3bda8cfbdfd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845013 Reviewed-by: Edward Hill <ecgh@chromium.org>
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSJeremy Bettis2021-04-273-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4ac1d81e1430dbfbfba1376a23ab19dfa845d7ef. The config name collides with the same config name in zephyr. Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig side. BUG=chromium:1202406,b:180980668 TEST=make -j16 runhosttests buildall && zmake testall && \ /mnt/host/source/src/platform/ec/zephyr/firmware_builder.py --metrics \ /tmp/tmplt8ty8ci test ; echo $? BRANCH=none Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I5b5e58b30d936b5232e049827f458d9a2ed06340 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855320 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Enter TBT/USB4 only if port supportsVijay Hiremath2021-04-271-1/+3
| | | | | | | | | | | | | | | Type-C ports may not be symmetrical on Reference Design Platforms hence check if the port supports TBT & USB4 mode before entering the mode. BUG=none BRANCH=none TEST=Tested on ADLRVP, TBT is not entered on non supported port Change-Id: Ifd3eae72f6226686462b07f9008b66bd60c7895b Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2846634 Reviewed-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* mkbp: Separate MKBP_INFO host command from the keyboard driverBoris Mittelberg2021-04-273-125/+157
| | | | | | | | | | | | Detaching protocol-related info command from the keyboard driver. BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I7943f7537bdf003145e9bd909a14f9451d922a5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796381
* mkbp: Separate FIFO from the keyboard driverBoris Mittelberg2021-04-275-226/+260
| | | | | | | | | | | | | | Move protocol-related functionality out from the keyboard driver. This change is required to allow passing button events via MKBP on devices with non-MKBP keyboards. It reorganizes the code without changing the logic. BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: Ifb5b9d8e605f491313ee1dfe2c9950eb52152aa8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2669355
* usb_pe_drp: Consider CHARGE_PORT_NONE for HardRstAseda Aboagye2021-04-261-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When we arrive in the EC image without a battery and with a PD supplier, we would eventually consider sending a HardReset since we are expecting SourceCaps to be sent by the port partner. However, since we no longer maintain our contract across images and we would like for the board to not brown out, we avoid sending the HardReset and simply disable the port instead. However, this situation can occur before we decide on a charge port. Therefore, this commit simply adds another condition when deciding to skip sending the HardReset. If a battery is not present, but there's no active charge port, we must be running on AC somehow so don't send the HardReset as this port may in fact be the previous charge port. BUG=b:176214112,b:178728138 BRANCH=dedede TEST=Build and flash galith; plug in charger on C1, remove battery, sysjump between RO and RW many times, verify that SoC remains in S0. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I16054d9c1ddac780243524e23a656ba3770bb4a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848290 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* TCPMv2: PE: Refer to vconn swap policy for sop'/sop''Scott Collyer2021-04-241-1/+2
| | | | | | | | | | | | | | | | | | | | | There is a vconn swap check in pe_attempt_discovery that is used to trigger a possible vconn role swap requeest. This check takes into account a board's specific policy (if necessary). But, a vconn role swap can also be triggered when sending a VDM message to SOP'/SOP''. In this case, board specific policy still needs to be checked. BUG=b:183026242 BRANCH=quiche TEST=tested on quiche and verified that there is no longer a continous stream of vconn swap attempts. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I5d239c78dc0d324e0c3dbb99dfc7fa093e2f6570 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2827510 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Revert "config: rename CONFIG_FLASH to CONFIG_FLASH_CROS"stabilize-13935.B-mainJack Rosenthal2021-04-243-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4e074a16c5703f0cdd7b7d780a8ae1bea53a445a. Reason for revert: responsible for CQ failures (crbug.com/1202406) BUG=chromium:1202406 BRANCH=none TEST=CQ Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Original change's description: > config: rename CONFIG_FLASH to CONFIG_FLASH_CROS > > The config name collides with the same config name in zephyr. > > Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to > CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig > side. > > BUG=b:180980668 > TEST=make buildall > BRANCH=none > > Change-Id: Ibac008ddff8c041aae04dca0bbf973823abe7640 > Signed-off-by: Eric Yilun Lin <yllin@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816622 > Tested-by: Eric Yilun Lin <yllin@google.com> > Reviewed-by: Keith Short <keithshort@chromium.org> > Commit-Queue: Keith Short <keithshort@chromium.org> Bug: b:180980668 Change-Id: Idc5e799d3b0ea8cc76dbbb49a91b3758ce6e9719 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847274 Auto-Submit: Jack Rosenthal <jrosenth@chromium.org> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Update banner to match Chromium OSKeith Short2021-04-232-14/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the boot banner to match Chromium OS. This also modifies the version output to include "_zephyr" after the board name to clearly identify the image type. Boot banner: Booting Zephyr OS build zephyr-v2.5.0-31-g6fcd6373e58a --- UART initialized after reboot --- [Image: RO, volteer_zephyr_v2.0.8350-190d6f 2021-04-08 11:15:09 keithshort@mtbaldy] [Reset cause: reset-pin] uart:~$ version Chip: Nuvoton NPCX796FC 02 Board: 1 RO: volteer_zephyr_v2.0.8350-190d6f RW: volteer_zephyr_v2.0.8350-190d6f Build: volteer_zephyr_v2.0.8350-190d6f 2021-04-08 11:15:09 keithshort@mtbaldy BUG=none BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ia136c4e025aba95217f1d8c51de39255fef54f7b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822208 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSEric Yilun Lin2021-04-233-3/+3
| | | | | | | | | | | | | | | | | | | The config name collides with the same config name in zephyr. Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig side. BUG=b:180980668 TEST=make buildall BRANCH=none Change-Id: Ibac008ddff8c041aae04dca0bbf973823abe7640 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816622 Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* LED On/Off: Add state for off with insufficient powerDiana Z2021-04-231-1/+13
| | | | | | | | | | | | | | | | | Add a common state to communicate that we're off due to insufficient power. If not defined, allow this state to fall back to OFF since many systems with batteries will be using the battery LED to communicate this information. BRANCH=None BUG=b:185508707 TEST=on boten, confirm no regressions with fake low battery in S5 Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie8b37785a43fdfdd6619fe72c8bd7e2be6776e43 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832694 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* LED On/Off: Allow compiling without CONFIG_CHARGERDiana Z2021-04-221-0/+8
| | | | | | | | | | | | | | | | The header for charge_get_percent() will only define this function if CONFIG_CHARGER is present. Make a declaration for complilation to use, and then allow most of the led_get_state() function to be optimized out with IS_ENABLED(). BRANCH=None BUG=b:185508707 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I3d94f290ac5b9ec82b46b9c0a6fc668b2e8dd91c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832693 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* LED On/Off: Make battery LED optionalDiana Z2021-04-221-0/+12
| | | | | | | | | | | | | | | Currently, all boards using the LED On/Off module have battery LEDs. However, if we'd like to expand support to Chromeboxes then the battery LED must become optional. BRANCH=None BUG=b:185508707 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ieae098829ebe6c8b103f23d5abdbf70e7bcbdf2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832692 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* LED On/Off: Remove power LED configDiana Z2021-04-221-6/+10
| | | | | | | | | | | | | | | | | | | | | | Move the LED on/off module towards using a more flexible LED support approach. Define a weak power LED table and setter for boards to override when needed. Note that during run-time these functions will not get called since led_auto_control_is_enabled() will return false for nonexistent LEDs. This consumes an average of 165 additional bytes of flash space on boards which do not use a power LED. BRANCH=None BUG=b:185508707 TEST=make -j buildall, load on guybrush (battery LED only) and confirm no errors are seen. Load on Boten (both LEDs) and confirm behavior appears normal Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iaa1e22a7f5d8be39eb8792ee13d358087d7f7482 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832691 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: PE: Clear PRS request following acceptfactory-13929.B-mainScott Collyer2021-04-211-0/+12
| | | | | | | | | | | | | | | | | | | | | This CL adds logic to clear any pending DPM_REQUEST_PR_SWAP once we accept a PRS request from the port partner. This prevents a possible back to back swap if we want to PRS, but the port partner sends the request before PRS swap request is generated. BUG=b:182441965 BRANCH=quiche TEST=tested quiche with kohaku where quiche attaches in sink role. This case causes quiche to want to power role swap and causes the port partner to request a power role swap. Verified that only 1 power role swap occurs. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I05ee27897d5900e71257d268acd3bd37c8abb787 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799450 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* battery: Correct battery_get_disconnect_state() returnSimon Glass2021-04-211-1/+1
| | | | | | | | | | | | | | | | | | | | This cannot return a value from a different enum. Doing so produces an error with clang: battery_fuel_gauge.c:228:10: warning: implicit conversion from enumeration type 'enum ec_error_list' to different enumeration type 'enum battery_disconnect_state' [-Wenum-conversion] Fix it by returning the existing error value. BUG=none BRANCH=none TEST=CQ Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I1f3826ef26b1255934ea96cd1541f60436546b57 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2842204 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPC: Cleanup: Get Sink & SRC state from PD or PPCVijay Hiremath2021-04-211-0/+2
| | | | | | | | | | | | | | Added option to get the Sinking or Sourcing state from either PD or PPC. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ibb21ef69b5825ea5722ceacd5d7ef6f535aad17c Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2838127 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPC: Cleanup: Enable PPC from PD or Power MUXVijay Hiremath2021-04-201-1/+1
| | | | | | | | | | | | | | | Some PD chips have integrated SRC FET and control the SRC/SINK FET from GPIOs hence cleaned up the code to enable Power Path Control from either from PD or from Power MUX. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I77f96b681fd2e5fca35bce425e4bd5ec87d5ccfd Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2828980 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* system: Wait 1s for EC to quiesce before hibernateAseda Aboagye2021-04-151-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | The EC can enter hibernate via a keyboard shortcut alt+vol_up+H when in S0. However, the EC will never actually hibernate from S0; instead, it waits until the system is in S5/Pseudo G3 for 1hr (default setting). If the system is in S0 when hibernate is requested, it performs an unclean shutdown and then enters hibernate immediately. However, this can allow spurious interrupts to wake up the EC again. This commit simply adds a 1s delay after the unordely shutdown and before entering hibernate. BUG=b:185302895,b:185206379 BRANCH=dedede TEST=Build and flash DUT, boot to S0, press alt+vol_up+H, verify DUT turns off and stays off. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I98e094a64ae716811e44fe1858ad981403da7b39 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2829116 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: i2c: Fix use of I2C_PORT_VIRTUAL_BATTERYYuval Peress2021-04-151-1/+2
| | | | | | | | | | | | | | | | | | In Zephyr builds, the I2C_PORT_* values are enums generated from devicetree (instead of #define values). This means that in Zephyr, it should suffice to just check VIRTUAL_BATTERY_ADDR_FLAGS. BRANCH=none BUG=b:185392974 TEST=zmake testall TEST=make buildall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: Ifedaf45ec8bcfa33bb75c8381604ad565ca08d6a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2826919 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: use interrupt based RX bufferingYuval Peress2021-04-151-13/+6
| | | | | | | | | | | | | | | | | | | | Poll-based RX was technically incorrect since Zephyr was setting up the UART to FIFO mode (instead of byte mode). This change replaces polling the RX UART with interrupt based callbacks. When calling uart_shell_stop(), the ISR will be replaced and will instead queue items to a ring buffer which can be read from uart_getc() (it can also be cleared via the uart_clear_input() function). BRANCH=none BUG=b:181352041 TEST=Build volteer, run, see expected 0xec07 from the GSC. Cq-Depend: chromium:2730870, chromium:2730869 Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I5d2b61e914b56f678a259b373969522da87e8df3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728824 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* TCPMv2: Generate Hard Reset eventAbe Levkoy2021-04-152-0/+7
| | | | | | | | | | | | | | | Inform the AP when the PRL completes a Hard Reset. BUG=b:183946291 TEST=Observe event during transition-to-default states TEST=With kernel patch, observe mode reentry after Hard Reset BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I4af576bd3a8fb57d820bd91d74817040214eaa5b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799924 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* TCPMv2: Soft reset on Vconn_Swap sequence interruptionDiana Z2021-04-141-0/+12
| | | | | | | | | | | | | | | When a non-interruptible AMS is interrupted, the unexpected message should yield a soft reset on the SOP* of the incoming message. Before sending PS_RDY, check for this condition and soft reset if necessary. BRANCH=None BUG=b:182221344 TEST=on sasuke, confirm charger can successfully connect reliably Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6612cb5d5d74cf99155cac99894a7746462a7b9e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823633 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Remove dual-role capability check from Attached.SNK entryDiana Z2021-04-132-19/+13
| | | | | | | | | | | | | | | | | | Currently, we'll check the partner dual role flag when entering Attached.SNK not from a power role swap. However, we have no way to know the partner dual role capabilities at that point. Set up connections as dedicated, and then allow the PE to update accordingly when source capabilities are received. BRANCH=None BUG=None TEST=on guybrush, confirm we automatically charge from a PD charger, non-PD charger, and do not automatically charge from another chromebook Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia7cdf4259c35af32a303113befe0bd2fb26cf6d7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821365 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: Update source PDO flags alwaysDiana Z2021-04-131-8/+12
| | | | | | | | | | | | | | | | | | | Always ensure we update our source PDO flags when storing partner source cap replies during PE_SNK_Evaluate_Capability. However, only propose a power role swap the first time we're storing source capabilities to prevent infinite PR swap loops between Chromebooks. BRANCH=volteer BUG=b:184971310 TEST=ensure connection with a DRP partner results in correct setting of dual role flags (dual-role for anything we don't want to automatically charge from, dedicated for anything we do want to automatically charge from). Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ida139af43fb384096b14e686cf5bd6bbfdf16aa9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821602 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* usb_prl_sm: Fix spellingAbe Levkoy2021-04-131-1/+1
| | | | | | | | | | | | | wad -> was BUG=none TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I75647696c7150b03d681e190d803fd5de28523d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2812140 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Don't retry after failed alt mode entryAbe Levkoy2021-04-132-5/+12
| | | | | | | | | | | | | | | | If entering DP or TBT alt mode fails, leave the state machine in an inactive state. Allow the DPM to see that the mode entry process is done and stop trying to send more VDMs. BUG=b:184197145,b:179443762 TEST=make buildall TEST=Pass TDA.2.1.2.1 on Voxel with AP-driven mode entry TEST=Enter, exit, and reenter DP and TBT mode with host commands BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: If72b3410f9aa174c48c65a8ca908d79e2090fa62 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798525
* TCPMv2: Set SOP before requesting chunkAbe Levkoy2021-04-131-0/+1
| | | | | | | | | | | | | | | | When requesting the next chunk in the RCH state machine, set the SOP type for the request to the type of the just-received chunk response. Do not just use the SOP type of the last transmitted message. BUG=b:179443762 TEST=Pass TD.PD.SRC3.E32 with SOP' traffic immediately before chunk 0 BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ifb520bb7ee439ea895b11938395a943d5ca32edf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2812138 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
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