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* change the init proiorities of ec_efs_init() and ec_comm_init()release-R82-12974.B-cr50_stabNamyoon Woo2020-03-122-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reprioritizes ec_comm_init() and ec_efs_init() so that they won't be executed prior to board_init(), which executes nvmem_init(). BUG=b:151187315 BRANCH=cr50 TEST=let cr50 reboot a few times, and checked the console message and the ec_comm command output that Kernel secdata was reloaded without error. Swapped cr50 image from normal to dev, vice versa, and repeated the rebooting. [Reset cause: hard] [0.003799 Inits done] strap pin readings: a1:2 a9:3 a6:0 a12:0 [0.005893 Valid strap: 0xe properties: 0xa00041] [0.007991 init_jittery_clock_locking_optional: run level high, ... [0.045539 init took 29953] [0.051185 tpm_rst_asserted] [0.052074 EC-COMM: Initializtion] Console is enabled; type HELP for help. ... > ec_comm ... response : 0xec00 ec_hash : LOADED secdata_error_code : 0x00000000 > Change-Id: Ia695896986374ac9d23ac111fe0086ec6a13923e Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2093102 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* add corrupt and reload options to 'ec_comm' console cmdNamyoon Woo2020-03-112-2/+37
| | | | | | | | | | | | | | | | | | | | Two new options for 'ec_comm' are for test usage only. - ec_comm corrupt: it corrupts the ECRW hash in ec_comm module. Hash corruption will cause EC-FW verification failure. It can be useful to check how AP firmware performs software sync on this failure. - ec_comm reload: it forces Cr50 to reload ECRW hash from tpm nvmem. This is to restore the EC EFS2 status in Cr50 from corrupted status. BUG=b:150650877 BRANCH=cr50 TEST=manually ran 'ec_comm corrupt' or 'ec_comm reload' with dev image. Checked cr50 normal image refuses those command lines. Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: Ib4aa9532132e1ee786e623bd658a68987e4681dc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094781 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* introducing an unittest of EC-EFSNamyoon Woo2020-03-111-0/+7
| | | | | | | | | | | | | | | This patch adds a test case for EC-EFS functions. BUG=b:150650877 BRANCH=cr50 TEST=make run-ec_comm make runhosttests make buildall -j Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: I90cdc3aa73cf8946da4cf094de5ca0adfaaa0a7c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2096338 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* minor cleanup on EC-EFS2 implementationNamyoon Woo2020-03-112-2/+1
| | | | | | | | | | | | | | usart.h doesn't need to be included in ec_comm.c. This patch also fixes nit output format in cprints. BUG=none BRANCH=cr50 TEST=make run-ec_comm Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: Icadf0d860cee8d3cf882cdb4571aaa2bc325adf9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094751 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* allowing repeating an EC-EFS command, SET_BOOT_MODENamyoon Woo2020-03-111-2/+27
| | | | | | | | | | | | | | | | This patch allows the repeating SET_BOOT_MODE command except one case that attempts to change the boot mode from NO_BOOT to NORMAL. Cr50 resets EC on those violating commands. This patch adds error handling for an unknown boot mode parameter. BUG=none BRANCH=cr50 TEST=ran unittest, 'make run-ec_comm'. Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: Ib6c97596ed9c7b7563fbe5e6497cbd668f57a474 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2096840 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* system: avoid printing one character at a timeVadim Bendebury2020-03-111-13/+35
| | | | | | | | | | | | | | | | | | | | With the upcoming transition to handling console traffic in packet mode it is very expensive to be shipping one character at a time, each character results in sending a packet of 16 or so bytes. This patch modifies print_build_string() such that it splits the long build version string into manageable substrings and prints them instead of printing one character at a time. BRANCH=cr50, cr50-mp BUG=b:149964350 TEST=built a Cr50 image, verified that build string is printed as expected. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I743205932892b0f14c161ade5ea856a658fb26e6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2097444 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* gpio_commands: reduce number of vararg parametersVadim Bendebury2020-03-111-17/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | The extended GPIO state support command uses a lot of format elements when trying to report properties of the GPIOs. The upcoming source code processing scripts do not support more than eight format elements per format string. On top of that there is no need to even try to generate the string in case extended GPIO command mode is supported. Let's move generating the string with properties into the conditionally compiled section, to make sure that it is generated/processed only when needed, and let's use snprintf() first to reduce the number of format elements in the following ccprintf invocation. BRANCH=cr50, cr50-mp BUG=b:149964350 TEST=verified proper 'gpiog' command output when code is compiled both with and without CONFIG_CMD_GPIO_EXTENDED Change-Id: I0836a350d1f787c84d2079f10de3652523a8a5a9 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2097442 Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* move ec_comm implementation to common directoryNamyoon Woo2020-03-103-0/+606
| | | | | | | | | | | | | | | This patch moves ec_comm.c and ec_efs.c from board/cr50 to common/, so that they can be shared with other board configuration (like host). This is to build unittest for those files. BUG=none BRANCH=cr50 TEST=make buildall -j Signed-off-by: Namyoon Woo <namyoon@chromium.org> Change-Id: I67ac313054ebe4604848a176f0a42e3483957e74 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2094076 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: add TPM vendor-specific commands to support EC-EFS2Namyoon Woo2020-02-221-0/+2
| | | | | | | | | | | | | | | | | | | Based on the design in go/ec-efs2, this patch adds two TPM vendor-specific commands: - VENDOR_CC_GET_BOOT_MODE - VENDOR_CC_RESET_EC BUG=b:141578322 BRANCH=cr50 TEST=tested with EC-EFS supporting EC/AP firmware. With CR50 dev image, tested with gsctool on Octopus and Helios by sending each of new vendor commands. Checked flash_ec working on Scarlet in bitbang mode. Change-Id: Ia8f38a7b9cc45b172a1a1ef7e216034e520b79c7 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956409 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: add gpio_set_wakepin() to configure wake pinsMary Ruthven2020-02-071-0/+6
| | | | | | | | | | | | | | | | | | | | | | | Cr50 needs a cleaner way to enable and disable wakepins. This change adds gpio_set_wakepin() to enable the wake pin or disable. The gpio_set_flags() or gpio_set_flags_by_mask() remain unaffecting wake-pin configuration. This patch increases the flash usage by 16 bytes. BUG=b:35587259 BRANCH=cr50 TEST=verify pinmux has the same output before and after the change on octopus. Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/533674 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org> Change-Id: I0387c673aedc046ce9cf6b5f0d683c40f3079281 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2044355
* cr50: update CN for G2F certificateAndrey Pronin2020-01-161-1/+1
| | | | | | | | | | | | | | | Modify the issuer and the subject for the certificate to have a way to distinguish between implementations before and after fixing b:147097407. BRANCH=none BUG=b:147097407 TEST=build Change-Id: I2b10212384940e101e8f0d0ac711350e64503168 Signed-off-by: Andrey Pronin <apronin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2003533 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* extend INT_AP_L pulseNamyoon Woo2020-01-161-0/+10
| | | | | | | | | | | | | | | | | This patch extends INT_AP_L pulses to be at least 6.5 micro seconds. It is a tentative solution to to meet Intel TGL/JSL requirement on interrupt duration. BUG=b:130515803 BRANCH=cr50 TEST=checked INT_AP_L pulse length ranges extended to 6.5 ~ 11 usec with logic analyzer on Hatch. Checked dmesg and coreboot log has no TPM errors. Change-Id: Iea8d0a779fff7cbda0c8647f3c1de719c3c3d7e0 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002958 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* cr50: add checks to U2F_ATTESTAndrey Pronin2020-01-161-3/+34
| | | | | | | | | | | | | | | | | | | | This CL adds checks to U2F_ATTEST and rejects signing of the passed data if one of the following conditions is not satisfied: - reserved byte is 0, - public key matches the key associated with the keyhandle. BUG=b:147097407 TEST=test_that <dut> firmware_Cr50U2fCommands Change-Id: I10005742042a182a894eed243e006fcf14f68e28 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1984891 Reviewed-by: Andrey Pronin <apronin@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Andrey Pronin <apronin@chromium.org> Auto-Submit: Andrey Pronin <apronin@chromium.org> (cherry picked from commit aa9cdf2daf1aa2b30866c2d3aa260b47ed40808a) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2003403
* cr50: update size checks for U2F_ATTESTAndrey Pronin2020-01-161-2/+2
| | | | | | | | | | | | | | | | | This CL updates verification of the message size in U2F_ATTEST after adding userSecret field. BUG=b:147020573 TEST=test_that <dut> firmware_Cr50U2fCommands Change-Id: Ib1e9444fdd13ed27547df27aa9c2fed19ba59496 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1984894 Tested-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Andrey Pronin <apronin@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org> (cherry picked from commit d982955abbd9a7d85ca48d13f85809576f2efc26) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2003942
* drop chip factory mode supportVadim Bendebury2020-01-131-56/+21
| | | | | | | | | | | | | | | | There is no need to keep the code supporting chip factory mode in Chrome OS production branches, this code is never used outside of the chip factory environment. BRANCH=cr50, cr50-mp BUG=none TEST=built an image, verified that an Atlas device boots up into the previously created Chrome OS account. Change-Id: If72635b014d15ef6e97fbc4fd5b54b61ec23299a Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994369 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* nvmem: do not waste time looking for legacy NVMEM spaceVadim Bendebury2019-12-131-2/+3
| | | | | | | | | | | | | | | | | | | | It takes 14.5 ms to decrypt two 12K flash spaces into SRAM, then calculate their hash to see if either one is is a valid NVMEM space. There is no need for this check when the 'other' Cr50 image is newer than {3,4}.18. BRANCH=Cr50, Cr50-mp BUG=b:132665283 TEST=with added instrumentation verified that in case the other slot is occupied by 0.0.22 image, the check takes 14.5 ms, when the other slot is occupied by 0.4.23 image the check takes 8 us. Change-Id: I0414ca3d7e90d343589a21e91319f35479632eff Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1967543 Reviewed-by: Keith Short <keithshort@chromium.org>
* cr50: change OWNERS to cr50 team membersMary Ruthven2019-12-101-7/+0
| | | | | | | | | | | | | | Change the OWNERS to cr50 team members and remove OWNERS files from all subdirectories. BUG=none BRANCH=none TEST=none Change-Id: I5ddff7c433a55b6724d92c026e9e64e82e1492ad Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957850 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: narrow the condition for custom TPM command codesNamyoon Woo2019-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | CR50 used to detects the custom TPM command code if the vendor specific bit field is set. This patch enfornces this condition by comparing the command code to 0x20000000 value. It is planned to support extended TPM commands, which are not yet standard, and those commands shall have 0x20000000|x as their command code. This patch will pass those commands to tpm2 library directly by calling ExecuteCommand(). BUG=b:140527213 BRANCH=cr50 TEST=ran gsctools with -m, -o, -i options. Cq-Depend: chromium:1892419 Change-Id: I43ce52bee96f6b6def8e4bf3a14f092b3235740a Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1891523 Reviewed-by: Andrey Pronin <apronin@chromium.org> (cherry picked from commit 939160b5b82424e57457a3d07dccfe7127681787) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958419
* chip/host: Avoid concurrent recipes of libcryptoc.astabilize-12748.B-cr50_stabYicheng Li2019-12-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DCRYPTO compiles and links thirdparty/libcryptoc for cr50. CONFIG_LIBCRYPTOC does similar things for other boards that configures it, including host. This resulted in cr50_fuzz having concurrent recipes for libcryptoc, as it has both configs. This change separates CONFIG_DCRYPTO from the responsibility of building and linking libcryptoc. Libcryptoc is now solely handles by CONFIG_LIBCRYPTOC. BRANCH=none BUG=b:144811298 TEST=make -j buildall > /dev/null Observed no more "warning: overriding recipe for target 'build/host/cr50_fuzz/cryptoc/libcryptoc.a' " Change-Id: I2186cbead773629456da254df5f82b96e9646fc2 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949554 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> (cherry picked from commit a018043265ecb3466863ff9020ab25d552105c61) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956404 Tested-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
* Fix smart erase.Barry Twycross2019-11-271-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Smart erase is used by the haven private-CR51 firmware, I don't know if other projects use it. Smart erase attempts to speed up erase by checking if the block to be erased is all ff's, and only erasing it if there is content (not ff's). The bug is that after erasing a block, the code does not wait for completion of the erase before reading ahead to see if the next block is already erased (all ff's). This is contrary to the spec where the only valid operation is a check of the status after issuing the erase. On some eeproms, with some timings, this causes the smart erase to give a flase positive erased block detection. Ie, the eeprom reads back al ff's while it's busy doing the erase. The upshot is that only the first non erased block is erased, and the rest of the eeprom is left untouched. The code before smart erase looked like: do wait for not busy erase block until all erased wait for not busy Smart erase was added by inserting the check for erased at the top of the loop. If instead, it's moved down below the wait for not busy, everything works fine. (Or, the wait for not busy is moved back to top of the loop.) This is the fix used here. TEST= Run without and with patch on a Starcard. Without patch not all of the targeted flash is erased. With patch, all of the targeted flash is erased. BUG=b:144868388 BRANCH=barryt/smart Signed-off-by: barryt@google.com Change-Id: I679ad4d21c3c353252646394f5631abc42782ded Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1931466 Reviewed-by: Jeff Andersen <jeffandersen@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Barry Twycross <barryt@google.com> Commit-Queue: Barry Twycross <barryt@google.com> Tested-by: Barry Twycross <barryt@google.com> Auto-Submit: Barry Twycross <barryt@google.com>
* host_command: clear any leftover dataJett Rink2019-11-261-0/+14
| | | | | | | | | | | | | | | We want to ensure that the entire buffer we may be sending back to the host from the EC does not contain any data from previous host command responses. Clear the data in common code so all chips do not have to implement this functionality. BRANCH=none BUG=b:144878983,chromium:1026994 TEST=new unit test shows cleared data Change-Id: I93ad4d36923ba1bf171f740e94830640d3fde3b0 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930931
* usbc: make BB virtual mux retimer compatible with non-virtualDenis Brockus2019-11-251-2/+0
| | | | | | | | | | | | | | | | Changed the driver interface for BB virtual mux retimer to stop using global functions and use the usb_retimers array instead. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I56befaca1720eb2f4e0599a983629b4df45dc76b Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928121 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* Reland "smart_battery: add smbus error checking support"Ting Shen2019-11-251-36/+208
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of daccb3adea9394116d7ab2c807e4a360cb5a93a1 Original change's description: > smart_battery: add smbus error checking support > > Jacuzzi/Kodama has a unstable software controlled i2c bus, its data > transmission may be interrupted by other higher priority tasks and > causes device timeout. > > If timeout happens when ec is reading data, it has no knowledge about > what's happening on slave, and keep receiving bad data (0xFF's) until > end. The standard i2c/smbus error handling mechanism can not handle this > case, so we need the error checking feature from smbus 1.1 to ensure our > received data is correct. > > This CL adds the error checking (PEC) functions to i2c and smart battery > module. > > BUG=b:138415463 > TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST, > no failure after 100k read/writes. > test code at CL:1865054 > BRANCH=master > > Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3 > Signed-off-by: Ting Shen <phoenixshen@google.com> > Reviewed-on: http://crrev.com/c/1827138 > Reviewed-by: Denis Brockus <dbrockus@chromium.org> > Tested-by: Ting Shen <phoenixshen@chromium.org> > Commit-Queue: Ting Shen <phoenixshen@chromium.org> BUG=b:138415463 TEST=in addition to the TESTs above, verified this CL boots on hatch(npcx chips), and reef_it8320(it83xx chips). BRANCH=master Change-Id: I67975eee677cfd6e383742d48103662372cac061 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913940 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* battery : differentiate overtemperature conditionYongBeum.Ha2019-11-251-2/+13
| | | | | | | | | | | | | | | | Battery charging is stopped over 55'C during charging and started below 45'C. BUG=b:140596424 BRANCH=hatch TEST=make -j BOARD=kohaku && ./util/flash_ec --board=kohaku check charging status & led on chamber Change-Id: Ib4a8ba5236d107397db904ca7075f0d0f29dd724 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928539 Tested-by: YongBeum Ha <ybha@samsung.com> Reviewed-by: Shelley Chen <shchen@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* TCPMv2: Keep message transmission and reception synchronizedSam Hurst2019-11-242-52/+114
| | | | | | | | | | | | | | | | | | | | | If a message is expected after a transmit, hold off on checking for that until the sender response timer is set. BUG=chromium:1022715 BRANCH=none TEST=make -j buildall manual tests: Connect StarTech CDP2DP USB-C to DP dongle Observe REQUEST send less than 1ms after SRC_CAP Look for ACCEPT message sent by PE and PD Change-Id: I1d155ead698ac39172c604cc3f656631565855d5 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1907807 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* TCPMv2: PD: Separately track each SOP and SOP' and SOP''Sam Hurst2019-11-243-89/+168
| | | | | | | | | | | | | | | | | | Tracked PD header spec. version for each port partner type. BUG=chromium:1023025 BRANCH=none TEST=make -j buildall Manual Testing: Connected PD2.0 source charger and made sure we talked PD2.0 Connected PD3.0 source charger and made sure we talked PD3.0 Connected apple 2019 PD2.0 dock with charger and made sure we downgraded from PD3.0 to PD2.0 Change-Id: I3b49d9630acf6c19101ac71334445890c78c4077 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1907430 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: ServoV4 is not recognized appropriatelySam Hurst2019-11-222-95/+340
| | | | | | | | | | | | | | | | | | Configure the port as a SNK with PD in DebugAccessory.SNK state BUG=chromium:1020752 BRANCH=none TEST=make -j buildall Manual Test: 1: Connect Servo v4 with NeckTek charger pluged in DUT power port The DUT negotiates to 20V, and starts charging. Change-Id: Id44d566024b5016965f996435d11befdc1c53e98 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906993 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usbc: fix storm tracker overflow issueJett Rink2019-11-221-6/+9
| | | | | | | | | | | | | | | | | | | If there is no USB-C interrupt activity for 2^31 microseconds, then there are more than ALERT_STORM_MAX_COUNT events within 2^31 microsecond (instead of ALERT_STORM_INTERVAL), then the interrupt storm would incorrectly detect a storm and disable the port due to incorrect math regarding 32-bit overflow. BRANCH=octopus and all branches with original storm detection (CL:1650484) BUG=b:144369187 TEST=unit test in CL Change-Id: I90b888ac092f81d151538d6018771fb32f8e9c39 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1925668 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* battery : Define CONFIG_BATTERY_DEAD_UNTIL_VALUEYongBeum Ha2019-11-221-0/+4
| | | | | | | | | | | | | | | | It takes 850ms~950ms to get valid RSOC after battery wake-up. Sometimes battery FG returns garbage data(1%) as RSOC and 0 value of desired current / voltage. Add CONFIG_BATTERY_DEAD_UNTIL_VALUE to continue charging. BUG=b:138413964 BRANCH=None TEST=build & flash, check battery charging with dead battery Change-Id: I0cbe30aa973499b0c27faf9b6da03a0344ad1065 Signed-off-by: YongBeum Ha <ybha@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918985 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Enable TCPC low power when port is looking for a connectionSam Hurst2019-11-214-253/+473
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the port is in a state where it is looking for a connection, to save power, we should put the TCPC in its low power mode and enable auto toggling. Low power mode can happen when DRP auto toggling, acting as a SNK only, or acting as a SRC only. BUG=chromium:1022217 BRANCH=none TEST=make -j buildall manual tests: 1: (S0) Nothing plugged in, port is drp and low power mode 2: (S5/S3/S0ix) Port is SNK only, and low power with nothing plugged in 3: (S3/S0ix) If TypeC sink was previously plugged in, port remains powered 4: (S5/S3/S0ix) TypeC source is recognized 5: (S3->S0) TypeC sink plugged in, port is powered when S0 is reached Low power exit test: Using this command from the AP console: ectool i2cread 8 2 0x16 0x0d Transfer failed with status=0x1 # This means the TCPC was asleep. On the EC console: 2019-11-21 09:50:24 [315.235538 TCPC p1 init ready] 2019-11-21 09:50:24 [315.236048 TCPC p1 Exit Low Power Mode] 2019-11-21 09:50:24 [315.242837 TCPC p1 init ready] 2019-11-21 09:50:24 [315.243229 C1: DRPAutoToggle] 2019-11-21 09:50:24 [315.246471 C1: Unattached.SNK] 2019-11-21 09:50:24 [315.252504 C1: DRPAutoToggle] 2019-11-21 09:50:24 [315.362878 C1: LowPowerMode] 2019-11-21 09:50:24 [315.363314 TCPC p1 Enter Low Power Mode] Change-Id: I7e853d05e0ece1f6b3031f17a18fcbf0d9a15a51 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1904974 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv1: Improve jitter based collision avoidanceAseda Aboagye2019-11-211-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | | For the holdoff timer, we were using the system timestamp as a source of adding jitter. However, it seems that there are certain cases that can cause a periodic collision with the jitter only varying by ~1-2ms. This leads to many repeated collisions until the jitter slides just out of the collision window. This commit changes the jitter calculation to use more of the bits that are changing to reduce the number of collisions. BUG=b:144676183, chromium:925618 BRANCH=hatch,atlas,nocturne,grunt,octopus,rammus,kukui TEST=Flash kohaku, plug some peripherals known for collisions, verify that if a collision is encountered, it's only encountered once (no cycles). TEST=Add debugging prints for the jitter, verify that the jitter is varied and appears non-deterministic. Change-Id: I6c27880551dd35b78993f7130d1ce4eb81aa10ef Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922751 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* cleanup: fixing warnings and formattingJett Rink2019-11-212-2/+2
| | | | | | | | | | | | BRANCH=none BUG=none TEST=builds Change-Id: Idf4b7363ce08a638fcca3407355c8f232100496d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924786 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org>
* tcpmv2: Make battery handling optional.Andrew McRae2019-11-211-0/+8
| | | | | | | | | | | | | | | | Some systems like puff do not have a battery, so conditionally compile the battery handling portion of the Type C PD module. BRANCH=none BUG=b:144390300 TEST=EC buildall runtests Change-Id: I72fc41d64820d450161273902eaf99476bf0dfce Signed-off-by: Andrew McRae <amcrae@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1916763 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* fpsensor: Make fpcapture and fpenroll restrictedCraig Hesling2019-11-181-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There should be no functional difference to fpcapture or fpenroll, since the restricted console command feature is implemented in a similar manor. The only noticeable difference is that the list of commands provided by the "help" command should denote when these commands are restricted. Note, each board requires a configuration, similar to crrev.com/c/1867388, in order to activate restricted console commands. Otherwise, this restricted flag has no restricting effect. BRANCH=nocturne BRANCH=hatch BUG=b:142559996, b:142505927 TEST=# Test on nocturne_fp make BOARD=nocturne_fp scp build/nocturne_fp/ec.bin dut1:~/ ssh dut1 flash_fp_mcu ./ec.bin # From FPMCU UART console version # Ensure that version is custom based on workstation help # Ensure that fpcapture and fpenroll are not prefixed # with "-" help list # Ensure that a "Flags" column exists and that # fpcapture and fpenroll both have a 1 in the column. fpcapture fpenroll # Ensure that both commands above succeed in their # own operations syslock fpcapture fpenroll # Ensure that both commands above fail with "Access Denied" help # Ensure that fpcapture and fpenroll are now prefixed # with "-" in the help message Change-Id: Icbb74a1afece66db9ebd071de0770650d42bd553 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1869400 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* chgstv2: stop charging when battery temp exceeds specsPaul Fagerburg2019-11-151-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a check for the battery temperature in the safe range to charge the battery, and if it isn't, stop charging. The battery information defines minimum and maximum temperatures for discharge and for charge. The state machine already checks if the battery temperature is outside of the range for discharge (as part of is_battery_critical) and will shut down the system completely if the battery temperature is out of range. However, the temperature range for charging is usually tigheter than for discharging, and it can be safe to discharge, but unsafe to charge. For example, Kohaku specifies a maximum charge temperature of 55 C, and a maximum discharge temperature of 60 C. If the battery is at 57 C, we don't want to charge, but it's still OK to use the system. The check is enabled by CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITS. BUG=b:140596424 BRANCH=None TEST=`make buildall -j` builds with no errors. No boards have enabled CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITS, so no effect. Change-Id: I3b76eab942ca3ef3871f0909395e91634db5640e Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1914510 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* mock: Update README.md with design patternCraig Hesling2019-11-141-5/+32
| | | | | | | | | | | | | | Add the reasoning behind the design pattern of placing all params in one struct. BRANCH=none BUG=none TEST=Examined in Gitlies Change-Id: I80f29468126c3a3a36363c857d52d3baad785638 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880578 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* retimer: usbc retimer name cleanupDenis Brockus2019-11-131-1/+1
| | | | | | | | | | | | | | Need to cleanup naming around USBC Retimers for adding PI2DPX1207 code BUG=none BRANCH=none TEST=make buildall -j Change-Id: I7e18e0abbe5bfd89bf0e20fa7b5174669689778f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911296 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Clean up double tap related definitionHeng-Ruey Hsu2019-11-132-5/+5
| | | | | | | | | | | | | | | | Fixes: commit 2f2a81079191ca "Add double tap and make motion sense wake up ap" CONFIG_GESTURE_DETECTION_MASK includes significant motion in activity list. We cannot use it for double tap. Add more flags to distinguish it. BUG=b:135575671 BRANCH=kukui TEST=AP can receive mkbp event when double tap is triggered Change-Id: I13776a01b14dc251396a615c8c97353f2d0477d4 Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911263 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* rollback: Remove unused rollback_lock functionTom Hughes2019-11-111-26/+0
| | | | | | | | | | | | | | Use of the rollback_lock function was removed in https://crrev.com/c/479176. BRANCH=none BUG=none TEST=make buildall -j Change-Id: I15bfeba9b169c7b0fae8d3c9423bc2f4817d52d8 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1902460 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* common: Refactor motion_sense_fifoYuval Peress2019-11-112-145/+250
| | | | | | | | | | | | | | | | | This change refactors the motion_sense_fifo to uniformly prefix all the functions to avoid collisions. It also adds several unit tests and fixes a few bugs with the fifo logic. BUG=b:137758297 BRANCH=kukui TEST=buildall TEST=run CTS on arcada, kohaku, and kukui TEST=boot kohaku (verify tablet mode works as expected) Change-Id: I6e8492ae5fa474d0aa870088ab56f76b220a73e3 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1835221 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* EC: Do not clear wake only events on resume from S3.Ravi Chandra Sadineni2019-11-111-6/+10
| | | | | | | | | | | | | | | | | | On path to S3, coreboot sets SCI and SMI mask to 0. It also sets appropriate wake mask. It then clears all pending events so as to prevent early wake (chromeec_smi_sleep). Thus the current resume hook to clear non SCI/SMI events would clear all events when resuming from S3 as SCI/SMI mask are set to zero. This change thus fixes the same. BUG=b:65976859 BRANCH=NONE TEST=Tested suspend/resume with wakeup count on grunt. Change-Id: Iea7652d1bdd122c2e66f52e2d8d0a6b7f2854c22 Signed-off-by: Ravi Chandra Sadineni <ravisadineni@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879517 Reviewed-by: Todd Broch <tbroch@chromium.org>
* Add double tap and make motion sense wake up apHeng-Ruey Hsu2019-11-111-1/+5
| | | | | | | | | | | | | | | Change to use CONFIG_GESTURE_DETECTION_MASK since CONFIG_GESTURE_SENSOR_BATTERY_TAP and CONFIG_GESTURE_SENSOR_DOUBLE_TAP both define it. BUG=b:135575671 BRANCH=none TEST=build pass. EC can receive double tap interrupt. Change-Id: I6eec40ef7405ec0653ff62dbce98f975cb19e332 Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1710210 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Fix skip interrupt logic for host eventHeng-Ruey Hsu2019-11-111-4/+10
| | | | | | | | | | | | | | | | | If CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK and CONFIG_MKBP_EVENT_WAKEUP_MASK are defined at the same time, |skip_interrupt| will be set for non host events. Add a check to handle it when |events_to_add| is MKBP host event. BUG=b:135575671 BRANCH=none TEST=CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK and CONFIG_MKBP_EVENT_WAKEUP_MASK work as expected. Change-Id: Iff72b0e276b63a211c249b3d1a92c0303012684e Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1903630 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Add a board specific helper to return USB PD port countKarthikeyan Ramasubramanian2019-11-0914-60/+120
| | | | | | | | | | | | | | | | | | | | | Certain SKUs of certain boards have less number of USB PD ports than configured in CONFIG_USB_PD_PORT_MAX_COUNT. Hence define an overrideable board specific helper to return the number of USB PD ports. This helps to avoid initiating a PD firmware update in SKUs where there are less number of USB PD ports. Also update charge manager to ensure that absent/ invalid PD ports are skipped during port initialization and management. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS in bobba(2A + 2C config) and garg(2A + 1C + 1HDMI config). Change-Id: Ie345cef470ad878ec443ddf4797e5d17cfe1f61e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879338 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* printf: be consistent using PRINTF_TIMESTAMP_NOWVadim Bendebury2019-11-091-2/+1
| | | | | | | | | | | | | | | | | PRINTF_TIMESTAMP_NOW is used to indicate that %pT format specifier means 'current time'. Let's use it at the point where format is analyzed to be consistent with the rest of the EC tree. BRANCH=none BUG=none TEST=make buildall succeeds, 'ccprintf ("%pT", PRINTF_TIMESTAMP_NOW);' still prints the current time. Change-Id: I42e80039a4335015f5504830070ca36abfb2487c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906994 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Evan Green <evgreen@chromium.org>
* pd: Clarify flag commentsDenis Brockus2019-11-083-55/+102
| | | | | | | | | | | BRANCH=none BUG=b:141563840 TEST=make -j buildall Change-Id: Iaff605f5d93ccce26aec4d9e33be78017c7b9231 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906194 Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Clear PE_FLAGS_PS_TRANSITION_TIMEOUTDenis Brockus2019-11-081-1/+1
| | | | | | | | | | | | | | | | The flag was being checked for being set and then if it was set it was being set again. The pattern everywhere in this situation is to clear the flag and not set it again. Looks like a typo that was not caught BUG=none BRANCH=none TEST=make buildall -j Change-Id: I18f52343e0583cd0eecc509b01337ab60804130d Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1906193 Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Remove EMarker Cable ProbeSam Hurst2019-11-081-164/+17
| | | | | | | | | | | | | | | The current PD3.0 EMarker cable probe functionality is unstable. Remove and add back as a feature after the PD3.0 code base is stable. BRANCH=none BUG=b:144093713 TEST=make -j buildall Used total phase to verify that the cable was not probed. Change-Id: I2906a16c96faff9d8107ef19286acdbe60869180 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1904157 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usbc: fix vbus discharge path for GPIOJett Rink2019-11-071-15/+24
| | | | | | | | | | | | | Code on Tot assumes that port count was the port to discharge instead of port parameter BRANCH=none BUG=none TEST=verified with unit test (in this CL) Change-Id: I17658a0c555f9cea56fa4ec1652e0faf62e3d6cc Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1896125
* pd: Comment all flagsSam Hurst2019-11-073-57/+76
| | | | | | | | | | | | | | | | All of the flags in all layer needs comments of what the flags means and a potential usage. all TC_FLAGS_*, PR_FLAGS_* and PRL_FLAGS_* BRANCH=none BUG=b:141563840 TEST=make -j buildall Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I520daa841a61e36a8a6b394e0f96b198b16ad561 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1904148 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org>
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