| Commit message (Collapse) | Author | Age | Files | Lines |
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Changed NOISY_MAGNITUDE_DEVIATION from 1 to 1.5.
Current value seems to be set too low.
So ec could regard lid angle as unreliable even when sensors are at rest.
BUG=b:79670788
BRANCH=firmware-poppy-10431.B
TEST=Build & flash EC then ectool motionsense
Change-Id: I07c3e5c2149e7dade567592a437d36d3a294b7af
Signed-off-by: Inno Park <ih.yoo.park@samsung.com>
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1065954
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Ih-Yoo Park <ih.yoo.park@samsung.corp-partner.google.com>
Reviewed-by: Ih-Yoo Park <ih.yoo.park@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Ih-Yoo Park <ih.yoo.park@samsung.corp-partner.google.com>
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Currently, console_init calls cflush() twice, once before
"Console is enabled" string is printed, once afterwards.
The reason is that firmware_ECBootTime looks for that string,
and it may get corrupted/interleaved with others if the EC
is busy during initialization.
The problem here is that the CONSOLE task may have higher
priority than other tasks (for good reasons), but, on boot,
there are other more critical tasks that need to run (e.g.
RW image verification), rather than busy-looping waiting for
the console to be flushed.
By fixing firmware_ECBootTime to not look for the string anymore,
we do not need those 2 console flush.
BRANCH=poppy
BUG=b:35647963
BUG=chromium:687228
CQ-DEPEND=CL:1075832
TEST=Flash staff, see that RW verification starts at 0.001037
instead of 0.028087 (=> 27 ms faster).
TEST=test_that -b $BOARD $IP firmware_ECBootTime
Change-Id: I794e48eb69cc647c4595fd80265adee4a434d566
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1073180
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1081767
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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In RSA, we often need to actually compute (a*b)+c+d: provide some
assembly optimized functions for that.
With -O3, 3072-bit exponent, lower verification time from 104 ms to
88 ms on STM32F072 @48Mhz.
BRANCH=poppy
BUG=b:35647963
BUG=b:77608104
TEST=On staff, flash, verification successful
TEST=make test-rsa, make test-rsa3
TEST=make BOARD=hammer test-utils test-rsa3, test on board
Change-Id: I80e8a7258d091e4f6adea11797729ac657dfd85d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1071411
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1080584
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We multiply 2 32-bit numbers (and not 64-bit numbers), and then add
another 32-bit number, which makes it possible to optimize the
assembly and save a few instructions.
With -O3, 3072-bit exponent, lower verification time from 122 ms to
104 ms on STM32F072 @48Mhz.
Optimized mac function from Dmitry Grinberg <dmitrygr@google.com>.
BRANCH=poppy
BUG=b:35647963
BUG=b:77608104
TEST=On staff, flash, verification successful
TEST=make test-rsa, make test-rsa3
TEST=Flash test-utils and test-rsa to hammer => pass
Change-Id: I584c54c631a3f59f691849a279b308e8d4b4b22d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/449024
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1080583
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There are still more ifdef than can be added: this just takes out
the low hanging fruits.
BRANCH=poppy
BUG=b:35647963
TEST=make buildall -j, see that we gain from 0 to 64 bytes on many
boards.
Conflicts:
board/nocturne/board.c => Does not exist on FW branch
Change-Id: Ibe85b8bfa5d5c22c160e4a6656104256067beee9
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070948
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1080582
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hammer does not need that command, let's just remove it.
BRANCH=poppy
BUG=b:35647963
TEST=make newsizes, saves 112 bytes of flash
Change-Id: I24ed979f8a9053128d4eb56fc5af00429f7ba0ae
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070950
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1080579
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On hammer, we do not need the console channels, so we can just
disable them to save flash size.
BRANCH=poppy
BUG=b:35647963
TEST=make newsizes, staff image size shrinks by 704 bytes
Change-Id: I7a493ae57573814b166d45e57f1ad3d885f26086
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070949
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1080578
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Add a state to indicate that a data role is actually disconnected and
notify the board-level data swap function with this state when a cable
is unplugged. This allows the board to clean up and restore any state
that may have been set up with a data role swap.
BUG=b:78308749
BRANCH=eve,poppy
TEST=manual on eve: plug in C-to-C cable, execute data swap on port 0
with 'pd 0 swap data' and ensure the OTG pins are asserted. Then unplug
the cable and ensure OTG pins are now deasserted.
Change-Id: I7d8fff22dd5836b4b5af54f0ede71ee1b6e40b5c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1036904
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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__builtin_ffs takes an int as argument, and, therefore, does not
find bits >= 32. Fix this up when CONFIG_HOST_EVENT64.
BUG=b:69329196
BRANCH=fizz,poppy
TEST=Patch coreboot to add bit 33 in SCI mask, add EC code to send
such events, EC does not watchdog anymore
Change-Id: I91a4366c7b0e565fc523246d0abb684ffa50d483
Original-Change-Id: If868095f19fe1940b4f5924cf669a719f9535991
Original-Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/989514
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1029250
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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This reverts commit 47c0dde1b5e97906b8b4436d45924cce5a814760.
Reason for revert: Note from Nicolas "This increases stack size usage and should _not_ have been backported to a stable branch."
Original change's description:
> i2c: expose port num during unwedge console output.
>
> Signed-off-by: Todd Broch <tbroch@chromium.org>
>
> BUG=b:72837836
> TEST=manual,
> on Nami, 'echo mem > /sys/power/state'
>
> From EC console see,
> [4823.162371 I2C4 unwedge failed, SCL is held low
>
> Change-Id: Ic66c7fe00442fdcef90b3a0e4c10bcddc73e04c6
> Reviewed-on: https://chromium-review.googlesource.com/981450
> Commit-Ready: Todd Broch <tbroch@chromium.org>
> Tested-by: Todd Broch <tbroch@chromium.org>
> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
> Reviewed-by: Todd Broch <tbroch@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/982350
> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
> Tested-by: Furquan Shaikh <furquan@chromium.org>
> Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Bug: b:72837836
Change-Id: I08cacf8291daf4738a284f325e1300e74a7a006b
Reviewed-on: https://chromium-review.googlesource.com/1006316
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Fix typo in i2c_master.c to use CONFIG_I2C_XFER_BOARD_CALLBACK instead
of CONFIG_I2C_XFER_CALLBACK.
BUG=b:73147310
BRANCH=None
TEST=None
Change-Id: I4a8179df48940e6d4347f9d76908a0fc4d3ea692
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/996252
Reviewed-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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Signed-off-by: Todd Broch <tbroch@chromium.org>
BUG=b:72837836
TEST=manual,
on Nami, 'echo mem > /sys/power/state'
From EC console see,
[4823.162371 I2C4 unwedge failed, SCL is held low
Change-Id: Ic66c7fe00442fdcef90b3a0e4c10bcddc73e04c6
Reviewed-on: https://chromium-review.googlesource.com/981450
Commit-Ready: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982350
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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The NX20P3483 is a USB PD and Type C high voltage sink/source combo
switch. This CL adds support for this PPC variant. Unlike the TI
SN5S330, the NX20P3483 does not support VCONN and does not need to be
informed of CC polarity by the TCPM. To account for these differences,
2 new PPC config options are added and the driver for the TI SN5S330
was modified to include these new options.
The SNK/SRC switch mode for the NX20P3483 is controlled by 2 GPIO
signals which may be connected the EC or directly to the TCPC. To
handle both cases, the ppc_chips structure was modified with a flags,
snk_gpio, and src_gpio elements.
BUG=none
BRANCH=none
TEST=make -j buildall and verified there are no build errors.
Change-Id: Ic4415ab7571b80e7661ea673434eaf4cf1f1fd2d
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/966926
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982314
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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This function enables variadic functions to take advantage
of functionality provided by snprintf.
Signed-off-by: Jeff Andersen <jeffandersen@google.com>
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I0095a96339b374ef8030b87b5184fa4678b439eb
Reviewed-on: https://chromium-review.googlesource.com/971761
Commit-Ready: Jeff Andersen <jeffandersen@google.com>
Tested-by: Jeff Andersen <jeffandersen@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982313
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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Add the state machine and the interfacing to the enrollment and matching
algorithm providing by the private driver part.
Implement the host commands interface for it (based on MKBP event) along
with the console debug commands to exercise it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=On ZerbleBarn console, use 'fpenroll' then 'fpmatch' for several
fingers.
TEST=With ZerbleBarn and a servo-v2, retrieve and upload templates with
'ectool_servo fptemplate'.
TEST=On Meowth, exercise with the prototype of biod
CrosFpBiometricsManager.
CQ-DEPEND=CL:*555078
Change-Id: I10b0d76d3faa898a682cf9a2eb7fc7e212b0c20c
Reviewed-on: https://chromium-review.googlesource.com/886401
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/982310
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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i2c transaction
This change adds a new config option CONFIG_I2C_XFER_CALLBACK that
makes i2c_xfer callback into board-provided functions before the start
and after the end of every I2C transaction. This can be used by boards
to implement any I2C device-specific quirks e.g. requiring minimum
bus-free time between every I2C transaction when the slave device
cannot actually do clock stretching.
BUG=b:73147310
BRANCH=nautilus
TEST=make -j buildall
Change-Id: I452de4f22a81ffd97ca4944e1b940a3537637df9
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/956934
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit f1bd7040ee2c456b8278682926f9ac3b36a427b8)
Reviewed-on: https://chromium-review.googlesource.com/974601
Reviewed-by: Philip Chen <philipchen@chromium.org>
Tested-by: YongBeum Ha <ybha@samsung.com>
Commit-Queue: YongBeum Ha <ybha@samsung.com>
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This reverts commit 89a3caa2b5104129fa55066c51493ef117052cd6.
Reason for revert: Some instabilities reported on other platforms. Let's be safe and skip this.
Original change's description:
> power button: Wait for charger and battery initialization
>
> For PWRBTN_STATE_INIT_ON, before attempting to power the
> system on, we need to wait for charger and battery to be
> ready to supply sufficient power. Check every 100
> milliseconds, and give up after 1 second. This allows
> time for charger, battery and USB-C PD initialization.
>
> Previously, init-on would fail because it called
> set_pwrbtn_to_pch too soon (before charge current had
> been initialized, and before the USB-C 3A current was
> detected).
>
> BUG=b:72645441,b:74017044
> BRANCH=none
> TEST=cold reset Grunt with ac/battery connected/disconnected
>
> Change-Id: I0413e7f2d7b19a99c994b51b22f28a2f993137de
> Signed-off-by: Edward Hill <ecgh@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/900049
> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
> Reviewed-by: Duncan Laurie <dlaurie@google.com>
> (cherry picked from commit e74d21f5bdf7f05f13a3b6d496fe37235cb4fdef)
> Reviewed-on: https://chromium-review.googlesource.com/963740
> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
> Tested-by: Furquan Shaikh <furquan@chromium.org>
> Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Change-Id: I7083aff3f31c80ebdb3a483f74b8383b1ec785f6
Reviewed-on: https://chromium-review.googlesource.com/972203
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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A few commands had help text of "[0 | 1]" but parse_bool()
doesn't recognize 0 and 1. Change help text to "[on | off]",
matching other commands.
BUG=b:75302458
BRANCH=none
TEST=none
Change-Id: I9b1e4a70e024d17ec8bccc015069e31d7fff08ca
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/967248
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 53ce2a77f545e594405e4c7b7da5082a1bdfeb06)
Reviewed-on: https://chromium-review.googlesource.com/967331
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This patch removes flash WP check in the EFS main. It means even
if the SPI flash is not write protected, it performs EFS.
This allows dogfood devices to boot just like normal devices.
BUG=none
BRANCH=none
TEST=Boot Fizz. Verify EFS works as expected.
HW_WP=0, SW_WP=0: No EFS
HW_WP=0, SW_WP=1: No EFS
HW_WP=1, SW_WP=0: EFS is performed (Dogfood devices)
HW_WP=1, SW_WP=1: EFS is performed (Normal devices)
Change-Id: I33b39463d6bd16fe0fc398cd49f3c92c76fa5103
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/964740
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 39684f894620238c6ea08b54ad7bb23bb2025499)
Reviewed-on: https://chromium-review.googlesource.com/967329
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Configure the large arrays for the image frame and template in other
SRAM memory regions to free up space for the malloc heap in the 'main'
SRAM.
Note: the template buffer is only used in future CLs.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=on ZerbleBarn, run the 'shmem' console and see 500kB of heap
available for malloc.
Change-Id: I31a1b4fb0d5e124e3229d29386cc6500e402dac0
Reviewed-on: https://chromium-review.googlesource.com/946370
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
(cherry picked from commit 171916a4a37c369013849b1ebc597538504254f6)
Reviewed-on: https://chromium-review.googlesource.com/967326
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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These print-outs are usually very deep in the call stack (rare
error cases that do not happen often), and therefore are the
longest branches on most tasks. Replacing cprints by
cputs/cprintf helps with that.
BRANCH=none
BUG=b:75234824
TEST=make BOARD=soraka SECTION=RW analyzestack | grep Task shrinks
significantly (more than 100 bytes on some tasks)
Change-Id: I7c5bb750f4aa624cd06736e0bb6b24d307fc0196
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/966041
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit c776583aeb62eadddbe50846cd4d41f6520be37a)
Reviewed-on: https://chromium-review.googlesource.com/967921
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set_resolution is only used for few sensors and is not exposed to the AP.
Remove definition when sensors have a fixed resolution.
BUG=none
BRANCH=master
TEST=compile, kevin has enough space for perform_calib.
Change-Id: I8482387e135356467edaee44da3a0e47cf1db524
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/961222
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit e0a2a98b69a06fa56b30a88e87d9720c0cd2b533)
Reviewed-on: https://chromium-review.googlesource.com/965433
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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Instead getting the time for each sample in the task code, we should be
getting it as soon as the sensor reported it added it to its fifo (so
sensor just finished integration).
Because of that each sensor should provide the time when it provides a
sample, ideally from an accurate spot like an interrupt.
Deprecate motion_sense_fifo_add_unit (without a timestamp) in favour of
motion_sense_fifo_add_data (which adds the timestamps). Update all
relevant sensors to use the new api.
Note: for now I focused on the BMI160, where I actually made it get the
time in the interrupt. The other sensors were made to use the new api,
but still don't record the time in the right place (though it's not any
worse than before).
BUG=b:67743747
TEST=In the kernel, fifo_info->info.timestamp still has sane values.
TEST=CTS should still pass
BRANCH=master
Change-Id: I9829343f8702e00cc19f9c88134fa1f258c9e1e9
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/807331
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
(cherry picked from commit b63595258df33b0c31effe979feb4bfe884cc9fb)
Reviewed-on: https://chromium-review.googlesource.com/963741
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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For PWRBTN_STATE_INIT_ON, before attempting to power the
system on, we need to wait for charger and battery to be
ready to supply sufficient power. Check every 100
milliseconds, and give up after 1 second. This allows
time for charger, battery and USB-C PD initialization.
Previously, init-on would fail because it called
set_pwrbtn_to_pch too soon (before charge current had
been initialized, and before the USB-C 3A current was
detected).
BUG=b:72645441,b:74017044
BRANCH=none
TEST=cold reset Grunt with ac/battery connected/disconnected
Change-Id: I0413e7f2d7b19a99c994b51b22f28a2f993137de
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/900049
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
(cherry picked from commit e74d21f5bdf7f05f13a3b6d496fe37235cb4fdef)
Reviewed-on: https://chromium-review.googlesource.com/963740
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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yorp measures each port's vbus separately on a deticated ADC.
Also, add config to take care of ADV_VBUS -1 case too.
BRANCH=none
BUG=none
TEST=none
Change-Id: I6f4df96caffc3b527b69e67358631dd448172cde
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956555
Reviewed-by: Edward Hill <ecgh@chromium.org>
(cherry picked from commit ef4e70174ac2797f0c02753685b35d038a317a6a)
Reviewed-on: https://chromium-review.googlesource.com/959114
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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To prevent invalid timestamping, call load_fifo only when we get a FIFO
interrupt.
In consequence, remove load_fifo entry point and only process fifo
inside the IRQ.
Add helper function to know when we are in forced mode (the EC needs to
periodically read sensor data or interrupt driven).
BUG=None
BRANCH=master
TEST=compile
Change-Id: I959e476f3f7215be95424c07223f7421e8b13da1
(cherry picked from commit bc766130becff13136baa53070749899dce687f6)
Reviewed-on: https://chromium-review.googlesource.com/959112
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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The exact behaviour still needs to be optimized based on actual
power consumption (for example, it might be worth providing power
to base without charging it, or charge it a bit more, then let
it slowly discharge).
BRANCH=none
BUG=b:71881017
BUG=b:74414928
TEST=Low base battery, check that lid provides power to it in S0 or
suspend.
TEST=Check that lid stops providing power in S5.
Change-Id: Idf198ab1b4358827f9db6c0898234b6e2be45808
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956982
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 5734467674a57ddb48dd57bfb66869a8d9588ac9)
Reviewed-on: https://chromium-review.googlesource.com/957933
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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When the base battery is low, we need to provide it with some power,
to make sure the battery does not fully deplete.
Instead of relying on a separate configuration value, we simply
reuse min_base_system_power. Also, we fix a bug that incorrectly
used a power value as current.
BRANCH=none
BUG=b:71881017
BUG=b:74414928
TEST=With a critically low wand (3%), lux is able to provide
enough power to charge wand battery a little (44mA), even
when backlight is fully on, and touchpad is in use.
Change-Id: I3174ac273712eeb83ce1283dda3d786ad503e6f3
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/956661
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 730c70e33eca0f7dd2ff3ae35408beedad925858)
Reviewed-on: https://chromium-review.googlesource.com/957932
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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At present issuing several 'waitms 1000' commands immediately after each
other trips the watchdog. Add a watchdog reload to avoid this.
Also document the behaviour in the command help.
BUG=b:72542719
BRANCH=none
TEST=manually on grunt, pasting these three lines in:
waitms 1000
waitms 1000
waitms 1000
and see that it does not reset now.
Change-Id: I453708299e4e26c1bbdb5fc406f26e916e7389af
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/955927
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
(cherry picked from commit 427005489fdbbfa43fdf237b2ddcb5d38ac0c6e8)
Reviewed-on: https://chromium-review.googlesource.com/957926
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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This patch splits struct fan_t into two parts: base configuration
and RPM configuration. RPMs are expected to be different from
model to model while a base configuration is most likely shared.
BUG=b:73720175
BRANCH=none
TEST=make buildall
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/949382
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 7f4018c41f875c7fbdff03ee4a489753d541b0a9)
Change-Id: Iff17573f110e07e88d097dd848cf91ee98b83176
Reviewed-on: https://chromium-review.googlesource.com/953791
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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BRANCH=none
BUG=b:73528930
BUG=b:73660652
TEST=Flash lux, check that lux adc VBUS voltage when only no
charger is connected is around 12V.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/948322
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 3d4db585fa751d0b480050003280df79f9a6f8da)
Change-Id: Iccc245c96ca3c83674446f96f78f1ce15ffa7de2
Reviewed-on: https://chromium-review.googlesource.com/953380
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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Add a new config for the boards using charger (e.g. rt946x)
to report if VBUS source is enabled instead of using GPIO.
BUG=b:65446459
BRANCH=none
TEST=Charge Scarlet rev3 with SDP and DCP.
Change-Id: Id0a07945f0f888b6a36c422c596b56c5aa5065c0
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/905400
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
(cherry picked from commit 9896e428f72670562f73713456d5966ad3f2d491)
Reviewed-on: https://chromium-review.googlesource.com/949620
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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When checking the RMA authentication code the code currently just
verifies the value, but does not act on it.
This patch directs the user input through the same vendor command path
which is used when the RMA operation is controlled using gsctool.
BRANCH=cr50, cr50-mp
BUG=b:74080723
TEST=verified that issuing 'rma_auth <code>' on the Cr50 console now
trigger CCD open and reboot.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/945311
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit f6b72676a0e4794805b14ab3452db7c82b989518)
Change-Id: Ib2640a916bd5a4b5ae2bd5b7a222d16347bb7145
Reviewed-on: https://chromium-review.googlesource.com/947459
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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Set GscFullConsole to Always in RMA open. We need this to be accessible
after rma open, so that we can use RMA open as a ccd open testlab
replacement.
Commands like rddkeepalive and bitbang are needed for testlab use, so
they should be accessible after open.
BUG=b:74019846
BRANCH=cr50, cr50-mp
TEST=build, do rma open, verify commands are not locked out, and do rma
disable
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/942309
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 097f5e6a0b1258dbb69842d1ebc6e4dd0142a5d7)
Change-Id: Ia5d56ab8f1fb60b0f739237d40b920b84baf528d
Reviewed-on: https://chromium-review.googlesource.com/947455
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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Also define the EC_FEATURE_RWSIG feature bit if the RO firmware contains
the RWSIG task but not the RW.
Given the RWSIG verification task is not terribly useful in RW
(where it is never executed), it can be skipped there but the host
program trying to detect RWSIG usage (e.g. flashrom) still wants to be
able to detect it.
In order to be able to do so, add the HAS_TASK_xXx_RO and
HAS_TASK_xXx_RW flags which define the tasks defined in the other
partition (at compilation-time you might still run a frankeinstein combo).
Fix ectool 'inventory' to avoid segfaulting on missing feature string
definition.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:36125319
TEST=on ZerbleBarn, run 'ectool inventory', also uses flashrom to
re-flash the RW partition.
Reviewed-on: https://chromium-review.googlesource.com/937262
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 045aef2cda7284dae0afc04957a42320f0497149)
Change-Id: If855fd7b7511239c90577dcd0e8568594d522d19
Reviewed-on: https://chromium-review.googlesource.com/947452
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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The shmem console command was looping with the wrong iterators,
doing an infinite loop when there was more than one allocated or
free block.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=build software with CONFIG_MALLOC and CONFIG_CMD_SHMEM, then run
'shmem' on the console at different time without hitting watchdog reset.
Reviewed-on: https://chromium-review.googlesource.com/943070
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
(cherry picked from commit f917f447d7206faa98ea2c1b1915fb4196913ef0)
Change-Id: Ic965e8d6f3ef3a0eec5a01c6aa9b120d013ea8fc
Reviewed-on: https://chromium-review.googlesource.com/947450
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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BRANCH=none
BUG=b:72961003,b:72956593
TEST=verified with grunt that parade TCPC will no longer shut down when
PPC sources Vconn
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/935301
(cherry picked from commit 284c0c35893ff40a2023d52f58670d3b92172a59)
Change-Id: Iaf86f3cc5e9d9e1540cb12e4b0a55d788221ec97
Reviewed-on: https://chromium-review.googlesource.com/947440
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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Add crc32_ctx.. functions to take context parameter.
This allows for multiple instances to exist in parallel.
Signed-off-by: mschilder@google.com
TEST=make buildall -j8 succeeds
BRANCH=none
BUG=b:73832883
Reviewed-on: https://chromium-review.googlesource.com/935825
Commit-Ready: Marius Schilder <mschilder@chromium.org>
Tested-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
(cherry picked from commit 3c4800e59452a7124c34f563d548e09849d59b8d)
Change-Id: Ib31bb167b67bb6e80536e476f2797e93926b9891
Reviewed-on: https://chromium-review.googlesource.com/947429
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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This patch makes EC firmware and cbi-util share the common code.
BUG=b:70294260
BRANCH=none
TEST=Set fields using ectool. Verify the contents by cbi command.
Verify cbi-util creates the same binary as before.
Verify emerge ec-utils ec-devutils pass.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/932001
(cherry picked from commit 546c606b5f0d4a3b8af54a17f5c729e670061fdc)
Change-Id: Ieab65730d7a7082d5503326979e6483695426df9
Reviewed-on: https://chromium-review.googlesource.com/947421
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
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Currently, cbi console command dumps the buffered contents. This
patch will make the command dump the entire EEPROM.
BUG=b:70294260
BRANCH=none
TEST=Run cbi command on Fizz:
CBI_VERSION: 0x0000
TOTAL_SIZE: 18
BOARD_VERSION: 514 (0x202)
OEM_ID: 2 (0x2)
SKU_ID: 0 (0x0)
43 42 49 5c 00 00 12 00 00 02 02 02 02 01 00 01
01 02 ff ff ff ff ff ff ff ff ff ff ff ff ff ff
ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
...
Change-Id: I39f3335a38eb72c95d53264ddc7386dd0910e946
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/930322
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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If the other side answers our DR_SWAP request with a WAIT message (as
bizarre as it might be), we want to retry later rather than giving up.
Set again the PD_FLAGS_CHECK_DR_ROLE flag in order to do so.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=fizz
BUG=chromium:814098
TEST=do repeated cold reset on Fizz connected to the 'interesting' USB-C
screen and see the DP alternate mode negotiated.
Change-Id: Icfb9fa209ce8cbe3c42c1e6946b43464544bdaea
Reviewed-on: https://chromium-review.googlesource.com/921141
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
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Execution of this command requires physical presence on the DUT, this
is why it is save to allow it over USB.
BRANCH=cr50, cr50-mp
BUG=chromium:812880
TEST=using modified gsctool verified that the command goes through and
physical presence indication is requested
Change-Id: I0aa371d8aaa5a480cc12d5d16edad8497142f4b4
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/927796
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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BUG=chromium:803955
BRANCH=none
TEST=Verify counters are printed every hour and before sysjump as follows:
[12.540051 HC Suppressed: 0x97=25 0x98=0 0x115=0]
Change-Id: I1c1aecf316d233f967f1d2f6ee6c9c16cc59bece
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/912150
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Currently CBI data offset and size are fixed. This patch makes them
variable. Each data item consists of <tag><size><value> where <tag>
is a numeric value assigned to each data item, <size> is the number
of bytes used for <value>.
BUG=b:70294260
BRANCH=none
TEST=Use 'ectool cbi set' to set board version, oem, sku.
Verify the contents by cbi console command and ectool cbi get.
1. ectool cbi set 0 0x202 2 2 (Init CBI and write board ver. of size 2)
2. ectool cbi set 1 1 1 (write oem id of size 1)
3. ectool cbi set 2 2 1 (write sku id of size 1)
4. ectool cbi get 0
514 (0x202)
5. ectool cbi get 1
1 (0x1)
6. ectool cbi get 2
2 (0x2)
7. Run cbi console command:
CBI_VERSION: 0x0000
TOTAL_SIZE: 18
BOARD_VERSION: 514 (0x202)
OEM_ID: 1 (0x1)
SKU_ID: 2 (0x2)
43 42 49 8c 00 00 12 00 00 02 02 02 01 01 01 02
01 02
Change-Id: I5a30a4076e3eb448f4808d2af8ec4ef4c016ae5e
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/920905
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Add support for an additional finger image capture type
used for quality testing.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:72360575, b:71770455
TEST=On Meowth, run 'ectool --name=cros_fp fpmode capture qual'
then 'ectool --name=cros_fp fpframe raw > finger_mq.bin'
Change-Id: I1b9525dc2adf0b91aef2f7124803c90d6a3bb0ca
Reviewed-on: https://chromium-review.googlesource.com/924124
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
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A typical CCD use case is when the DUT is not fully functional, or
even completely dead, including corrupted AP/EC firmware.
We still want to be able to enable CCD in this case, but routing CCD
commands through TPM task context (necessary to ensure the large stack
size some CCD commands require) is blocked if TPM was not reset after
startup.
Let's allow both reset requests and alternative commands when AP is
held in reset after reboot. The only situation when the alternative
command arrives would be the CCD use case of the system not generating
TPM reset pulse at startup and the operator is trying to execute a CCD
or RMA reset command.
BRANCH=cr50, cr50-mp
BUG=b:73292631
TEST=on a reef device: destroyed AP firmware and observed that the
'ccd open' command indeed results in the hung Cr50 console after
Cr50 is reset in this state.
Loaded the new Cr50 image, (which caused another Cr50 reset),
successfully took it through the 'ccd open' sequence resulting in
enabling AP flash write access, restored the AP flash and
observed the DUT boot into Chrome OS.
Change-Id: I4413bc200f5b2be563ba666ff80dd2d889ae5790
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/920924
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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Add a way to report the current state using this command. This is useful
when debugging.
BUG=b:71902053
BRANCH=none
TEST=manually
> ledtest 0
PWM LED 0: led_id=0, auto_control=1
> ledtest 0 enable amber
> ledtest 0
PWM LED 0: led_id=0, auto_control=0
Change-Id: I478980d82573b60b536ea0f4dcf324b7ccfb6fdb
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/919764
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On sysjump, if power button is held down, first check
power_button_pulse_enabled setting to decide if powerbtn to pch should
be asserted. This is important to prevent accidental shutdowns when
user is attempting to do an EC reset with Vup+Pwr held down.
BUG=b:73129177
BRANCH=None
TEST=Verified following:
1. Reset EC by holding Vup+Pwr.
2. Keep holding Vup+Pwr until AP reaches depthcharge.
3. Ensure that AP does not shutdown.
Change-Id: I0375fc8e8baabb40807dfdc6d4c9fa70c9b3b87d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/912364
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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According to table 4-25 in USB TypeC spec version 1.3, Vconn should be
sourced before Vbus or within 2ms. On Grunt I am see tVconnON around 2.3
ms, which is out of spec. We can simply source Vconn first to comply with
spec.
BRANCH=none
BUG=b:72811851
TEST=Grunt's tVonnOn is now <2ms
Change-Id: I52ca6a52bf576487061b2c33f348edf58eb06ca0
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/911928
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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In the case where we are resetting Vbus and it is our only power source,
then we will brown out before we set the active port to 0.
BRANCH=none
BUG=none
TEST=Did a cold reset on grunt with no battery power. System booted as
normal.
Change-Id: I3823af6b0475e4cf8abbe12dd8ae4ceef26d1eab
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/911613
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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