| Commit message (Collapse) | Author | Age | Files | Lines |
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Added ACC LIS2DW12 driver support.
Features included in this driver are:
- Basic Sensor Read acceleration data
- ODR and FS runtime configuration
- FIFO support with watermark interrupt events
- Shared commons function with ST MEMs devices
- Switch Low Power to High perf. mode in case
of ODR > 200 Hz
- Configure D-TAP event detection in Hardware
BUG=b:73546254
BRANCH=master
TEST=Tested on discovery_stmems target BOARD with
LIS2DW12 connected to EC i2c master bus and motion
sense task running.
To build firmware for discovery_stmems target with
LIS2DW12 sensor connected, simply uncomment
CONFIG_ACCEL_LIS2DW12 define in board.h target file
and make with target BOARD=discovery_stmems.
Commands used to test LIS2DW12 device are:
- accelinit 0 (to configure accel. device)
All basic features tested, including changing
in ODR:
- accelrate 0 10000 (set ODR to 10 Hz)
- accelrate 0 12500 (set ODR to 12.5 Hz)
- accelrate 0 25000 (set ODR to 25 Hz)
- accelrate 0 50000 (set ODR to 50 Hz)
- accelrate 0 100000 (set ODR to 100 Hz)
- accelrate 0 200000 (set ODR to 200 Hz)
- accelrate 0 400000 (set ODR to 400 Hz)
- accelrate 0 800000 (set ODR to 800 Hz)
- accelrate 0 1600000 (set ODR to 1.6 kHz)
Full Scale Range:
- accelrange 0 2 (set Full Scale Range to 2g)
- accelrange 0 4 (set Full Scale Range to 4g)
- accelrange 0 8 (set Full Scale Range to 8g)
- accelrange 0 16 (set Full Scale Range to 16g)
FIFO features and interrupt management:
- accelinfo on 1000 (motion info task with
refresh rate 1 s)
and polling data read:
- accelread 0 (to read data from accelerometer)
Change-Id: I0b9861a71e81052e7ee8eb235a1a5b2a57d4c6f5
Signed-off-by: mario tesi <mario.tesi@st.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/515302
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Paul Ma <magf@bitland.corp-partner.google.com>
Tested-by: Paul Ma <magf@bitland.corp-partner.google.com>
Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767531
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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None of the existing i2c addresses in the EC code base are less than 0x08
and those addresses are reserved by the i2c and SMBus specification.
BRANCH=none
BUG=b:138156666
TEST=i2c bus scan with a smart battery doesn't "misbehave" any more and
other devices can be detected properly.
Change-Id: I561b082c4c7e3df7caaa33b6ef6ad467dabbd5a5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715326
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767530
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767528
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Semantics of renew field in EC_CMD_USB_PD_CHIP_INFO is changing as
follows:
0 -> Return hard-coded info for Vendor ID/Product ID and cached info for
the Firmware Version
1 -> Return the live chip info for Vendor ID/Product ID/Firmware Version
Also rename the 'renew' field to 'live' to match the new semantics.
BUG=b:128820536,b:119046668
BRANCH=None
TEST=make -j buildall; Boot to ChromeOS.
Change-Id: Ie3dd022336b0be5c9728bb0ebabef32b7a6b5d57
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1617893
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Auto-Submit: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767526
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767525
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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crbug.com/982442 requests a way for developers to enable tracing of
i2c commands when debugging. This adds a new debug feature, the
i2ctrace command, which provides that. The command is guarded by
CONFIG_I2C_DEBUG.
BUG=chromium:982442
BRANCH=none
TEST=enabled CONFIG_I2C_DEBUG on arcada_ish, made sure that command
functioned as it says on the tin
Change-Id: I9c762271237cbf131e5ef7c0f605c89af4f209fd
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699347
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767524
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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CONFIG_SMBUS is not used. Cleaning up the code by
removing this.
Added a comment to document the removal and why. This will
give a way to find the code if we ever needed to bring it back
BUG=chromium:982316
BRANCH=none
TEST=make buildall
Change-Id: I40703a95bc849538e1aee32f6f96beab811285bd
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704279
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767523
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, tcpc_config assumes TCPCs are on I2C bus. ITE's EC has an
embedded TCPC.
This patch adds bus_type field to struct tcpc_config_t so that a TCPC
location on other type of bus can be specified.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ieac733011700b351e6323f46070dcf46d9e1154b
Reviewed-on: https://chromium-review.googlesource.com/1640305
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767520
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch updates the help message for i2cread, i2cwrite, i2cxfer
to clarify which addressing mode (7-bit or 8-bit) each command uses.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=chromium:971296
BRANCH=none
TEST=buildall
Change-Id: I757e8a1d30ad19dbc333a30a97f8049f007853d1
Reviewed-on: https://chromium-review.googlesource.com/1641600
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767519
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch replaces EC_CMD_I2C_LOOKUP with EC_CMD_LOCATE_CHIP.
This is a more generic command which locates a peripheral chip in
i2c or other bus types.
Additionally, it includes the following changes:
- Change chip (device) type # of CBI_EEPROM (from 1 to 0).
- Support TCPCs.
localhost ~ # ectool locatechip 0 0
BUS: I2C; Port: 0; Address: 0x50 (7-bit format)
localhost ~ # ectool locatechip 1 0
BUS: I2C; Port: 0; Address: 0x0b (7-bit format)
localhost ~ # ectool locatechip 1 1
BUS: I2C; Port: 1; Address: 0x29 (7-bit format)
localhost ~ # ectool locatechip 1 2
EC result 11 (OVERFLOW)
Index too large
localhost ~ # ectool locatechip 2
Usage: locatechip <type> <index>
<type> is one of:
0: CBI_EEPROM
1: TCPCs
<index> instance # of <type>
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verified ectool locatechip work on Nami.
Change-Id: I1a773ced65b1c5ce3656f03eff04a6eadd4bc5ff
Reviewed-on: https://chromium-review.googlesource.com/1614582
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767518
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently the I2C tunnels of all TCPC ports are protected implicitly
when the system jump is disabled. Depthcharge issues that command after
the EC jumps to RW and before the TCPC firmware update is applied. This
leads to failure while updating the TCPC firmware and hence a reboot loop.
Fix this behavior by adding a sub-command to protect all the I2C tunnels
so that depthcharge can issue that command after both EC SW Sync and
TCPC Firmware update are done.
BUG=b:129545729
BRANCH=None
TEST=make -j buildall; Boot to ChromeOS. Force a TCPC FW update and
ensure that the reboot loop does not happen.
Change-Id: I5dd2314cf82dcfff520dc32ce3ced232326ab3d5
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1605260
Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767517
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch makes debug printf messages more informative as follows:
- All messages are prefixed with I2C_PTHRU
- Don't print pointers for read or write buffers
- Print out buffer data
With the patch, messages will look as follows:
[7.335059 I2C_PTHRU xfer port=1 addr=0x16 rlen=0 flags=0x3]
out: 0x03 0x01 0xe0
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verify the messages are printed as expected
Change-Id: I144b2d1d517070b6cdb492f71baa7f20c27e29b9
Reviewed-on: https://chromium-review.googlesource.com/1604162
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767516
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, tcpc_config is declared in two places. This patch
consolidates declarations in usb_pd_tcpm.h.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I4f30d06b1eaeb6a83b664de76116d85d65a9fc97
Reviewed-on: https://chromium-review.googlesource.com/1616007
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767515
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Add a new host command that will allow you to lookup a well known device
on the EC. This is useful for FAFT tests that want to talk directly
with i2c devices but don't know the physical address for each platform.
BRANCH=octopus
BUG=b:119065537
TEST=Used this with new faft test in CL:1601300
Change-Id: I82c2d5462fcb4edbc92ea60765971190fed7ae81
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1601060
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767514
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, the battery_manufacturer_name API is implemented individually
by each chip.
This patch consolidate the definitions. It also allows a board to
return custom manufacturer names.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129599895
BRANCH=none
TEST=buildall
Change-Id: Ib0f60c9be71fea31658ab284a915d73341b9145e
Reviewed-on: https://chromium-review.googlesource.com/1590039
Commit-Ready: YH Lin <yueherngl@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767513
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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The patch in question was uploaded with numerous coding style
violations. Fixing them to avoid warnings when cherry-picking the
patch into different branches.
BRANCH=cr50, cr50-mp
BUG=none
TEST=repo upload does not complain any more.
Change-Id: I01e2786a509819ed914370b0ab276bb58e420365
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1500993
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767510
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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In command
xfer i2cwrite port addr offset value
16bit offset and 8bit offset call the wrong i2c write interfacefix it.
BRANCH=none
BUG=b:126820386
TEST=1:) Build flapjack EC and flash to DUT ,
in ec console can read/write i2c device correctly.
2:) Build kukui EC , build pass.
Change-Id: Ib3aa058ae0917fe62f38bc500a8227d6e36dbab1
Reviewed-on: https://chromium-review.googlesource.com/1496676
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Tony Zou <zoutao@huaqin.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767509
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Implements battery-cutoff SMBus write block function
BUG=b:122944526
BRANCH=None
TEST=Verify battery cuff on fleex via SMBus block write.
Change-Id: Ib52146cd3042c4a6d2dbafadd430591936230891
Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1470462
Commit-Ready: Justin TerAvest <teravest@chromium.org>
Tested-by: Justin TerAvest <teravest@chromium.org>
Tested-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767508
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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wireless receiver charger IDT P9221 I2C reg addr is 16bit.
command
i2cxfer r/r16/w/w16 port offset [value]
When offset is 4 digit (e.g. 0x00ab), it reads/writes 16 bit offset
registers. Otherwise, it reads/writes 8-bit offset registers.
BRANCH=none
BUG=b:123504007
TEST=1:) Build flapjack EC and flash to DUT ,
EC can read/write P9221 register.
2:) Build kukui EC , build pass.
TEST=buildall
Change-Id: If0df532f5ca136bf1312a1857b13e8455e897943
Reviewed-on: https://chromium-review.googlesource.com/1445133
Commit-Ready: Tony Zou <zoutao@huaqin.corp-partner.google.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767507
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Synchronize with CL:1419477 to common/led_onoff_states.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ibb5d9150f03cb7a584d7439bc47d5b59de856502
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1556859
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749581
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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We don't need to loop to figure out when to schedule the next sensor
collection event, just schedule it as soon as possible. This eliminates
a watchdog reset when we miss scheduling the sensor task and get really
far behind.
BRANCH=none
BUG=b:133190570
TEST=normal operation is fine, based on longs of failing results in bug,
this should prevent the watch reset.
Change-Id: I3001028ba393b51d1958f0136ba040eaee5e52d1
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1658521
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719568
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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This changes moves the specialized logic for timestamp spreading
away from the accelgyro_lsm6dsm and into the main motion_sense
loop. The motion_sense_fifo_add_data function was replaced by a
stage equivalent, and a commit function was added. Similarly,
internal static functions for motion_sense.c were renamed to
use the stage terminology. The idea is:
When a sensor is read, it might provide more than one measurement
though the only known timestamp is the one that caused the interrupt.
Staging this data allows us to use the same fifo queue space that the
entries would consume eventually anyway without making the entries
readable. Upon commit, the timestamp entries are spread if needed.
Note that if tight timestamps are disabled, the commit becomes a
simple tail move.
BUG=chromium:966506
BRANCH=None
TEST=Ran CTS on arcada.
Change-Id: Ib7d0a75c9c56fc4e275aed794058a5eca58ff47f
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637416
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719566
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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This change updates the queue_get_write_chunk and
queue_get_read_chunk logic to return an updated queue_chunk.
The new chunk uses a void * for the buffer and replaces length
with count. This more tightly aligns to how the rest of the
queue functions operate. Further, it adds the ability to
offset the write chunk. This is important as it allows wrapping.
For example:
With a queue of 8 units, 1 byte each. Assume H=2, T=5. Previously,
we were only able to ever get the 3 bytes at 5-7. Using the offset
of 3 though, we can now also get the 2 byte write chunk 0-1.
BUG=chromium:966506
BRANCH=None
TEST=Added unit tests
Change-Id: I40216c36aa0dc95ec4d15fc587d4b1f08a17ef73
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637415
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719564
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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BUG=b:129159505
BRANCH=arcada
TEST=I ran `make buildall` since this change isn't used yet it doesn't
affect run-time behavior.
Change-Id: I01857d679b800f9b53762c659ebd9a018cbf16db
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1612251
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719559
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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If the 360 degree hall sensor is active, then we should remain in tablet
mode even if the lid angle says we are 1 degree since an angle of 360
could wrap around to 1 degree.
Also ensure that tablet mode always gets initialized to the correct state
at startup (by setting initial value to -1)
BRANCH=R75
BUG=b:131785573,b:132178305
TEST=NB_MODE# on arcada does not flutter when the device is at 360
degrees with CL stack.
Change-Id: I962a9c23205766080a65d741c6c425452d9de608
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1597189
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719557
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Replace the runtime assertion with a compile time one, saves a bit
of space (~64 bytes on many boards), and warn users earlier of
potential issues.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I7df70b7166dd447a8b1dd8e10710c8bc7ab213e3
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1600943
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719556
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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"q->buffer_units - 1" is performed many times to wrap head and/or
tail. It should be calculated once.
BUG=None
BRANCH=cr50
TEST=None
Change-Id: I9714147d5a97afd7aaba00d31a8b10bad50d0942
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1572444
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719555
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Currently the motion sense loop bases its sleep time based on the
fastest active sensor. This method has several flaws:
1. It does not take into account any task switching overhead
2. With a mix of interrupt driven and forced sensors the sleep time gets
recalculated every time there is an interrupt causing the loop to
oversleep
3. If multiple sensors do not have rates that are in sync the timing of
the slower sensor will be off. For example if there was a sensor running
at 50 Hz and one running at 20 Hz the slower sensor would end up being
sampled at about 16 Hz instead of 20 Hz
This change calculates an ideal read time for every forced mode sensor
and calculates the sleep time based on the nearest read time. Every time
a sensor is read the next read time is calculated based on the ideal read
time not the actual read time so that reading does not drift because of
system load or other overhead.
BUG=b:129159505
TEST=Ran sensor CTS tests on arcada, without this change the
magnetometer was failing 50 Hz tests at about 38 Hz with 30% jitter
with this change in place 50 Hz was spot on with about 10% jitter
BRANCH=none
Change-Id: Ia4fccb083713b490518d45e7398eb3be3b957eae
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1574786
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719553
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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We want to ensure that the timestamp we take for last mkbp is as close
to the actual hardware interrupt from EC->AP.
BRANCH=none
BUG=b:129159505
TEST=passing CTS sensor run (except test 133 nullptr) with this change
Change-Id: I94b214f021f0b63ff2883e5fe8e32acc83ce208f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1560390
Tested-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719552
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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We need to handle the case of multiple tasks trying to set the mkbp
interrupt while the host command task is trying to clear it. The setting
of the interrupt may also take a while and we need to ensure that we
synchronize correct after a longer delay.
BRANCH=none
BUG=b:129159505
TEST=passing CTS sensor run (except test 133 nullptr) with this change
TEST=pass CTS sensor run on eSPI-based system
TEST=pass CTS sensor run on GPIO-based system
Change-Id: I056b72c1210d7525c29a8555f97e6f09d773d12f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1560229
Tested-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719550
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Use code from ash/wm/tablet_mode/tablet_mode_controller.cc, in
particular TabletModeController::HandleHingeRotation()
to calculate lid angle.
Add unit tests based on
ash/wm/tablet_mode/tablet_mode_controller_unittest.cc and the data file
accelerometer_test_data_literals.cc.
BUG=b:120346412
BRANCH=none
TEST=Check unit tests pass, check it compile on FPU based EC, EC without
FPU and no 64 bit support (ampton).
Check lid calculation is correct on eve:
- with "while true ; do ectool motionsense lid_angle ; sleep 1 ; done"
Check when hinge is almost vertical lid angle is close to constant or
marked are unrieliable.
Check when shaking device, lid angle is also unreliable
Check with evtest SW_TABLET_MODE event is trigger when lid angle is
available and cross 180 region.
Change-Id: I545f7333ed9b53accedb75f238f747f66bae1f5d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1388844
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719548
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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For non-gpio-based mkbp event delivery, we do not want to temporarily
disable interrupts as the code to send the mkbp events may use mutexes or
task scheduling to perform the more complicated mkbp event delivery.
For simple GPIO-based implementations, pausing interrupts gives the
mkbp_last_event_time marker the best chance at matching the actual time
the gpio was toggled on the EC. For other implementation, we are already
at the mercy of bus delays and timing for delivery so it wasn't as
reliable in that case to beginning with.
BRANCH=none
BUG=b:128862307
TEST=Ran AIDA64 sensor tab for a long time without seeing ISH
communication issue.
Change-Id: Id6e63a7f7b494559bd38b4659a580fa57666ecf1
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1531773
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719547
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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CONFIG_ACCEL_FIFO was being used both to control the size of the
sensor FIFO, and the notion of tight timestamps. The latter is
related to the format the EC uses to send sensor event timestamps
and not to the size of the FIFO.
Split this latter portion into its own configuration flag,
CONFIG_SENSOR_TIGHT_TIMESTAMPS.
This defaults to enabled, and should be turned on for all new
boards. It will be selectively disabled on a few boards where
the AP-side filtering this enables does not perform optimally
due to jitter issues.
BUG=b:123700100
BRANCH=rammus
TEST=observe tight_timestamps on the sensor_ring device in kernel
be enabled/disabled depending on whether CONFIG_SENSOR_TIGHT_TIMESTAMPS
is #undef'ed or not
Change-Id: I806ba6bb45a0007512afec9151c57c60d30fd604
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1524666
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719546
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Define macros to define custom events used by sensor interrupt handlers.
Remove CONFIG_ for activity events.
BUG=none
BRANCH=none
TEST=compile, sensors work on eve.
Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1272189
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719544
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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This adds a 4 byte header to the HECI messages so that host commands and
MKBP events can share the same HECI client.
BUG=b:123634700
TEST=make buildall -j, turning on the FIFO and to enable these events
is in the next cl
BRANCH=none
Change-Id: I3fe8dd4356bceba26ef3bf1fbff7906c5c4bf75e
Signed-off-by: Mathew King <mathewk@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1506414
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719542
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Now we have two MKBP delivery methods:
1. define CONFIG_MKBP_USE_HOST_EVENT to notify via host event
2. undef CONFIG_MKBP_USE_HOST_EVENT to notify via GPIO interrupt
It may become more complicated if new notification methods introduced.
e.g.: mt_scp uses IPI, rather than host event and GPIO interrupt.
This CL does:
1. add CONFIG_MKBP_USE_GPIO to explicilty declare that MKBP event are
sent via GPIO interrupt.
2. CONFIG_MKBP_USE_CUSTOM for boards which have custmized methods.
3. Remove weak attribute in mkbp_set_host_active (which can be done
with CONFIG_MKBP_USE_CUSTOM now.
4. Removes mkbp_set_host_active function in board Nocturne. It only
deliver MKBP events through GPIO interrupt now.
BRANCH=None
BUG=b:120808999
TEST=grep -rn "CONFIG_MKBP_USE_GPIO\|EC_INT_L" board/ baseboard/ and
see the result is reasonable:
1. EC_INT_L must be 1-to-1 mapped to define CONFIG_MKBP_USE_GPIO in
every board, except that meep, yorp, ampton which are defined in
baseboard octopus.
2. undef CONFIG_MKBP_USE_GPIO in bip and casta, which use host
event, but also have baseboard octopus.
Change-Id: I4af6110e4fd3c009968075c3623ef2d91cbd770b
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1490794
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719541
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Added support to LSM6DSO IMU sensor.
Features included in this driver are:
- Basic Sensor Read acc/gyro data
- ODR and FS runtime configuration
- FIFO water mark interrupt
- Shared commons function with ST MEMs devices
BUG=none
BRANCH=master
TEST=Tested on discovery target BOARD with
LSM6DSO connected to EC i2c master bus and motion
sense task running.
Commands used to test LSM6DSO device are:
- accelinit
- accelrange
- accelinfo
All basic features tested, including:
1) ODR change:
- accelrate 0 [13000:208000]
- accelrate 1 [13000:208000]
2) FS Range change:
- accelrange 0 [2:16]
- accelrange 1 [250:2000]
3) Interrupt on FIFO water mark
Signed-off-by: Mario Tesi <mario.tesi@st.com>
Change-Id: If2984f7d0d30b0ef475e0525aca2bc365aa4fe21
Signed-off-by: Mario Tesi <mario.tesi@st.com>
Reviewed-on: https://chromium-review.googlesource.com/1371364
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719540
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Wake up motion task to evacuate pending samples to the host as soon as
the sampling rate changes.
It is required for CST testSanitizedContinuousEventsUidIdle to pass,
it assumes only new samples will be present.
BUG=b:111422556,b:124085261
BRANCH=eve
TEST=cheets_CTS_P.9.0_r2.x86.CtsSensorTestCases passes on eve-arcnext.
(cherry picked from commit e18316ecc7f7f6d7226fc741570a94c5024d42e8)
Reviewed-on: https://chromium-review.googlesource.com/1217604
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: I34e51c0db42fe1a8d5abc91c6d80bcce974da099
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1470773
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719539
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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When changing ODR for one sensor, we insert a timestamp in the FIFO.
That timestamp can be misinterpreted by other sensor while in batch
mode, condensing all events in a small timezone.
Also, it can lead the motionsense stack to insert timestamp from the
past.
(cherry picked from commit f62f2ebbecb131956a5edc4bf60c094bc67972a1)
Conflicts:
common/motion_sense.c
Integrate changes on top of CL/1450288.
Now there is guarantee the ODR "flush" event is between 2 streams of
sensor data with different ODR.
BUG=b:111422556,chromium:562245,b:124085261
BRANCH=none
TEST=Check cheets_CTS_P.9.0_r2.x86.CtsSensorTestCases pass on meep.
Reviewed-on: https://chromium-review.googlesource.com/1204692
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: If76aa3abcedbe463321ccbb1c183dc16edda8693
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1470772
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719538
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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This commits enables the EC to send a motion sense event to
the AP when a sensor's ODR is changed.
This is done in a way that is backwards compatible on the AP side,
in order to enable previous kernels to continue to work
(albeit at a loss of new functionality) with up-to-date ECs.
Since clients are not required to use a FLUSH when changing ODR, it
is possible for the sensor ring to get in a state where it is spreading
based on out-of-date delay information, which we observed leading to
spreading of overly large intervals, and thus too far into the future.
This patch ameliorates that by causing an ODR change to implicitly flush
the batching history.
BUG=b:123700100
TEST=run CTS sensor tests, observe the sensor ring not
spreading too far into the future due to a period
change
BRANCH=bobba
Change-Id: I5a881e9fc5ddb1dbe6690c455d43dc20bffe889a
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1450288
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719537
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Expose dot procdut and cros product for vector operations.
BUG=b:120346412
BRANCH=none
TEST=compile, check unit tests.
Change-Id: Ief50f31aa6105dc2f0d92caf8b7473a7e141eb45
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1387923
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719535
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Currently, the pd_task will attempt to maintain both source and sink
contracts after an unlocked sysjump or unlocked EC reset. However, the
pd_task will disable Vbus to any partners it was sourcing, causing the
soft reset process to lead to a hard reset and disconnection.
Since the port partner will be without Vbus and unable to respond, treat
the contract as terminated and the port as the default state.
BUG=b:132110509
BRANCH=octopus
TEST=unlocked sysjumps with a display port dongle and hoho to ensure
they were treated as disconnected, unlocked sysjumps with charger to
ensure it was soft reset
Change-Id: Ie477f393ea828a4e880c8e8ccbe72539e8be721a
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639212
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709619
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Currently, the pd_task will call a power supply reset during init which
cuts Vbus to the port partner. However, on a sysjump we may still be
sourcing Vconn to a partner which will leave it in an inconsistent state
of having Vconn but no Vbus. Depending on the port partner's power
topology, they may even feedback some amount of voltage on Vbus, causing
them to be detected as a charger.
After disabling Vbus to the port partner, disable Vconn as well.
BUG=b:132110509
BRANCH=octopus
TEST=unlocked EC resets and sysjumps with a display port dongle and
hoho, ensuring neither was detected as a low power charger after
Change-Id: Ica9b72167bc981faeaebac18bac476ca9b7bfe7f
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639211
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709618
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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When chipset power up to S5->S3 state set PD_EVENT_POWER_STATE_CHANGE,
pd task set mux usb mode whether c-port is attached or not.
If c-port is nothing attached at the setting moment,
then mux detects nothing and goes to low power state.
Plug-in type-c usb device, after debounce pass, we set mux usb
mode and mux responds i2C NAK (due to in low power mode).
This CL changes that do not connect MUX when PD disconnected.
For example ps8751 is used for mux case. When power up(S5->S3),
we should set mux none mode whether c-port is attached or not.
Once type-c usb device plug-in, after cc debounce pass, we
will set mux usb mode in X_DEBOUNCE_DISCONNECT state.
BRANCH=None
BUG=b:133196882
TEST=After console cmd reboot and reboot hard,
type-c usb device plug-in on ampton and
get type-c port status by "ectool usbpdmuxinfo".
Change-Id: Ia538af48c450e12af1438a6aa9a6e4e426e2f616
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1609262
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709617
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Recently a sink holdoff timer was added to the PD stack which allowed
the state machine to prevent initiating any messages for 200ms after
entering the SNK_READY state. This was to give time for some chatty
sources to send messages to avoid a collision. Apparently, the same
thing can happen when we are a source (collision with chatty sink).
This commit reuses the holdoff timer for resolution as a source as well,
which starts after an explicit contract is established.
In order to prevent any potential new collisions, some jitter based off
of the system timestamp is added to the holdoff timer.
BUG=b:132202148, chromium:925618
BRANCH=firmware-atlas-11827.B
TEST=Flash atlas, plug in a fully featured C-C cable between atlas and
the LG 27UK850-W, verify that no conflict occurs and external display
always works.
TEST=Verify that no messages are initiated by the source within 200ms of
sending PS_RDY.
TEST=Flash nocturne, verify Dell U3818DW still works over C-C cable.
TEST=Flash nocturne, verify CableMatters MST DP hub still works with
charge through.
TEST=Verify with Twinkie that messages are sent at varied timestamps
between 200-300ms in the SNK/SRC_READY state.
Change-Id: I195199de271950ae09c2b26194ddc5f271b296a0
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1600510
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709615
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This patch fixes null-pointer dereference for svdm_rsp.amode. Some
boards set svdm_rsp.amode to NULL. This patch will make TCPM on those
boards return NACK instead of crash.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ifdeacbe4e164c5f1f7679ed4bb19a91053936ac6
Reviewed-on: https://chromium-review.googlesource.com/1599729
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709613
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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On reset, when pd_partner_port_reset is called, if, for any reason
pd_get_saved_port_flags fails to get the saved port status, we
would risk using unitialized flags from the stack.
The function logic was a little complicated, and can be simplified
quite a bit by returning early if no contract is in place (or if
we fail to read flags from BBRAM).
This should not be a problem on real boards, as the stored value
should be readable from BBRAM.
In any case, the first time we used the flag
if (explicit_contract_in_place && pd_comm_is_enabled(port))
only applies to unlocked RO images, so this never happens in production
(where RO images are locked).
The second case is a little tricker, and we may end up (not) applying
Rp where we should (not):
/* If we just lost power, don't apply Rp. */
if (!explicit_contract_in_place ||
system_get_reset_flags() &
(RESET_FLAG_BROWNOUT | RESET_FLAG_POWER_ON))
return;
Presumably, the worst case here is that a charger may not work after
a brownout/power on.
BRANCH=none
BUG=chromium:958510
TEST=setup_board --board=amd64-generic --profile=msan-fuzzer
cros_fuzz --board=amd64-generic reproduce --fuzzer \
chromeos_ec_usb_pd_fuzzer --testcase \
./clusterfuzz-testcase-minimized-ec_usb_pd_fuzzer-5086219896225792 \
--package chromeos-ec --build-type msan
=> No more MemorySanitizer error.
Change-Id: I40fb87b68dbe5244e8a2ae136508b431db7f96a8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1600935
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709612
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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The port shall transition to Attached.SRC when the SRC.Rd
state is detected on exactly "one of the CC1 or CC2 pins" for
at least tTryCCDebounce. See TypeC v1.4 spec 4.5.2.2.10.2
Exiting from Try.SRC State.
BRANCH=None
BUG=b:130615676
TEST=1.Ampton with apple type-c adapter
2.Ellisys USB-PD test
Change-Id: I461c53e2b8d9189f290956964754ae5b1a11a950
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1564499
Commit-Ready: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709611
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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The PD_FLAGS_TRY_SRC flag was being cleared every time we entered the
*_DISCONNECTED state. However, this would lead to a case where if the
state machine was debouncing the CC lines and decided to re-enter the
SRC_DISCONNECTED state, the Try.Src flag would be cleared and the state
machine would not transition to the TryWait.SNK state after timing out.
We shouldn't clear any flags when transitioning back to the disconnected
state from the debounce state as the two states here are really the same
states in the state diagram. This commit simply only clears the PD
flags when we're transitioning to the disconnected state but not from a
debounce state. This also keeps the Try.Src flag set if the previous
state was a debounce as it means the state machine decided it didn't
meet the condition to exit and should continue waiting before
transitioning to TryWait.SNK.
BUG=b:115452695
BRANCH=master
TEST=Flash nocturne; boot to S0, plug in Apple 87W USB-C charger with
eMarked cable, verify we form an explicit 45W contract.
Change-Id: I6d8f5d69b8bd0d25ac7af008bbbe91f2658cdfe2
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1286299
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit 1f30c7483fa5621e9d67c5977709dce73f31a66d)
Reviewed-on: https://chromium-review.googlesource.com/1591483
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709610
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Expressing logic for CC lines can get very verbose. Add helper inline
methods that logical describe the condition we are testing to clean up
call sites.
BRANCH=none
BUG=none
TEST=Builds, no functional change.
Change-Id: I48c117437bc14f3c55473df7f7c778b55af2706d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1589906
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Sam Hurst <shurst@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1709609
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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