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* snow: make pmu charge ranges inclusiveDavid Hendricks2012-09-081-2/+2
| | | | | | | | | | | | | | | | | Since we work with integral values for battery temperature, lower limits need to be inclusive when determining when to enable/disable charging. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=none TEST=none (yet...) Change-Id: Icfc52066ca469b56ebc411bad864111848eab197 Reviewed-on: https://gerrit.chromium.org/gerrit/32652 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* gaia_power: Report power on reasonSimon Glass2012-09-061-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Report the reason for a power on, to assist with debugging. BUG=chrome-os-partner:11307 BRANCH=snow TEST=manual Build and boot on snow See that power on reason is now reported > 0.003508 power on 2 [0.028674 AP running ...] ... 12.163780 ending loop 2 Shutdown complete. [batt] state discharging -> idle 17.801167 power on 4 Overriding CHARGER_INT with CHARGER_INT on EXTI4 [17.825873 AP running ...] 17.826071 XPSHOLD seen [batt] state idle -> discharg Change-Id: I2044419b330a74d19d8c4e63fa8853aa477b4df1 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32301 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* make build_info fixed-lengthDavid Hendricks2012-09-061-2/+5
| | | | | | | | | | | | | | | | | | | This makes build_info fixed-length so that it can be properly transmitted via I2C. The host buffer size will be used, which may in fact be quite a bit longer than necessary. Build info will be truncated if it's longer than the max response size. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:11608 TEST=Tested on Snow, logic analyzer confirmed NAK and STOP condition set properly after final byte transmitted via I2C (see BUG) Change-Id: Iccae0f3c2905d442c8eebff42aa19bf940e5f71f Reviewed-on: https://gerrit.chromium.org/gerrit/32290 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* stm32: Store VbNvContext in backup registersChe-Liang Chiou2012-09-051-0/+26
| | | | | | | | | | | | | | | | | | | | | | This would improve boot speed when compared to storing in eMMC because initialing eMMC is slow. So far other platforms do not have this need because CMOS is quite efficient; thus it is left unimplemented in lm4. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> BRANCH=snow BUG=chrome-os-partner:10660,13094 TEST=On Snow, see VbNvContext is preserved across power cycles (you have to patch U-Boot to test this) Change-Id: If5072c678b87bc47a3a82a1dff2afa3896304f36 Reviewed-on: https://gerrit.chromium.org/gerrit/31832 Tested-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
* Fix stack overflow in hostcmd commandRandall Spangler2012-09-041-5/+21
| | | | | | | | | | | | | | It was putting the entire parameter buffer for a host command on the stack. Now it uses shared memory. BUG=chrome-os-partner:13613 TEST='hostcmd 4' should not cause a crash several seconds later BRANCH=link (snow is also affected, but doesn't have enough shared memory to put the command buffer there either) Change-Id: I8405d88857ee92a5cee429e156df5e645d5d864d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32181 Reviewed-by: Vic Yang <victoryang@chromium.org>
* make pmu register dump more verboseDavid Hendricks2012-09-041-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a row that displays register offset and increases highest register offset to 18. The new output is 79 columns wide. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=none TEST=see below Before: pmu PMU: 0c 00 3e 00 12 20 4b bf ff ff 00 12 pmu events b00001100 ac gpio 0 After: > pmu 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 PMU: 0c 00 fe ff 12 20 4b bf ff ff 00 12 1e 1e 1e 1f 1f 1f 02 1f 1f 02 20 00 00 pmu events b00001100 ac gpio 0 Change-Id: I5058e5aee1affadaa00f20de785c1ea70eaea82e Reviewed-on: https://gerrit.chromium.org/gerrit/32082 Reviewed-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* Snow: Dont hang when trying to pmic-reset boardCharlie Mooney2012-08-311-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Old Snow board (non-MP) don't have the capability to hard-reset their pmics unless they've been manually fixed to do so. This means that if you have an old board, with a new copy of the EC on it and it tries to hard-reset the system, it will hang forever and trigger the watchdog. Since there's no way for the EC to check if the hardware fix exists on its board, this adds a timeout after trying to reset. If the board has the fix, it will reset before the timeout expires. Otherwise, it will print a warning message before returning, to prevent it hanging. Additionally, it also fixes the places board_hard_reset() is called to deal with the new possibility of it returning. BUG=chrome-os-partner:13508 TEST=On a machine with the hardware rework and one without it, go to the EC console and run "pmu reset" to try and force a reset. The one with the fix should reset immediately, and the one without should warn you that it tried (and failed) to reset. BRANCH=snow Change-Id: I493122ee4da539f363a31f624ab9dd7db8068ec8 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32043 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Save panic data across reboots, and add panicinfo commandRandall Spangler2012-08-311-5/+19
| | | | | | | | | | | | | | | | | | | | | Jump data now precedes the panic data, if any, in memory. BUG=chrome-os-partner:7466 BRANCH=all TEST=manual 1. boot system 2. sysjump rw --> display should stay on and keyboard should still work (this verifies jump data is properly read across sysjump still) 3. crash unaligned --> system should reboot 4. panicinfo --> should print the same crash dump as before, with (NEW) 5. panicinfo --> ditto, without (NEW) 6. sysjump rw 7. panicinfo --> ditto, without (NEW) Change-Id: I88285724e82a15553ab25877e3d8ec4c74a4dd5a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/32051
* Minor fix for gcc 4.7 build problem for chromeos-base/ec-utils.Han Shen2012-08-311-1/+1
| | | | | | | | | | | | | | BRANCH=snow TEST=Built using gcc 4.7. BUG=None Signed-off-by: Han Shen <shenhan@google.com> Change-Id: I425aec5a1e99bf64aab3acf7dbecdf1038195419 Reviewed-on: https://gerrit.chromium.org/gerrit/32025 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Han Shen <shenhan@chromium.org> Tested-by: Han Shen <shenhan@chromium.org>
* snow: Change charging temperature rangeRong Chang2012-08-311-2/+2
| | | | | | | | | | | | | | | | | Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:13491 TEST=manual Charging can start in temperature range 5C ~ 45C Charging stops when temperature >= 60C System can be powered on when temperature < 100C Change-Id: Ic4d66f7d1877f819892328e298b7442a763ced7a Reviewed-on: https://gerrit.chromium.org/gerrit/32019 Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
* Snow must assert ENTERING_RW GPIO when jumping between imagesRandall Spangler2012-08-301-2/+0
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:13439 BRANCH=snow TEST=manual 1. Ctrl+Refresh+Esc; should go to INSERT screen 2. Ctrl+D; should show TODEV (this confirms it's still possible to get into dev mode the right way) 3. From EC console, 'sysjump rw' 4. Ctrl+D; should NOT show TODEV (this confirms the bug is fixed) Change-Id: Ic4879cb0a7fc47527eac1a5a727f3225744ff880 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31932
* move pmu_init_registers() from pmu_init() to chipset pre-init hookDavid Hendricks2012-08-291-4/+1
| | | | | | | | | | | | | | | | | | | | This moves the PMU register initialization from pmu_init(), which gets called whenever the EC reboots/sysjumps (even when the AP is running), to a hook which will can called selectively when the AP is cold booting. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:13315 TEST=tested on snow - jumping between RO <--> RW no longer causes the screen to turn off due to resetting FET control regs. Change-Id: I5453bf86af50b84a05a259dc896f04d818b5641b Reviewed-on: https://gerrit.chromium.org/gerrit/31740 Reviewed-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* gaia: notify chipset pre-init hook before turning on APDavid Hendricks2012-08-291-5/+9
| | | | | | | | | | | | | | | | | This notifies the CHIPSET_PRE_INIT hook before turning on the AP. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:13315 TEST=tested in subsequent CL Change-Id: Ic2bc17ed2b561f640af53970d291e5d04d2f72e7 Reviewed-on: https://gerrit.chromium.org/gerrit/31739 Reviewed-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* add a new hook for pre-chipset startupDavid Hendricks2012-08-291-0/+1
| | | | | | | | | | | | | | | | | This adds a new hook that is intended to be called immediately before host chipset/AP startup to initialize components such as the PMU. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:13315 TEST=tested in subsequent patches Change-Id: I2b38208de9f0f51abc0b22c49547ee0c4c889b82 Reviewed-on: https://gerrit.chromium.org/gerrit/31738 Reviewed-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* gaia: update ap_suspended usageDavid Hendricks2012-08-291-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL updates ap_suspended usage so that it's only updated when it makes sense to do so: - Clear ap_suspended during power_off() since it can only be reliably determined when the pull-up on PA7 is enabled (when AP is on). - chipset_in_state() should not re-assign ap_suspended. That was a hack to try to get around earlier brokenness. However, that does not really work since SUSPEND_L can appear to be asserted when AP is off and could cause ap_suspended to become inconsistent with the actual AP state. - When AP is on, ap_suspended should be managed by gaia_suspend_event. When AP is off, ap_suspended should be 0 ( Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:13200 TEST=tested on Snow using "power" command at EC console 1. AP running > power on 2. after running powerd_suspend > power suspend 3. "power off" at EC console > power off Change-Id: I88dad9f02d57fe7244bf607eea2088ee0b80b75a Reviewed-on: https://gerrit.chromium.org/gerrit/31627 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* Revisit USB charge modesVic Yang2012-08-281-24/+19
| | | | | | | | | | | | | | | | | | "Auto" mode is observed to cause problems and thus is removed. This leaves only three modes: - Standard downstream port. USB 2.0 mode. 500mA. - Charging downstream port. BC1.2. 1500mA. - Dedicated charging port. BC1.2. 1500mA. BUG=chrome-os-partner:11550 TEST=Check all modes work as expected. Check no discharge between the first two modes. BRANCH=link CQ-DEPEND=31639 Change-Id: I41102a8bc3ac34ff9a1bf4e47c89cdb93a2c4eb5 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31616
* gaia: Add a warm reboot functionSameer Nanda2012-08-281-0/+27
| | | | | | | | | | | | | | | | | | | | Added a warm reboot function that reboots the AP while preserving RAM contents. This will be helpful in debugging AP/OS hard hangs since in conjunction with PSTORE_CONSOLE in the kernel, the kernel log messages from the previous boot will be preserved. BUG=chrome-os-partner:13249 TEST=1. From EC console issue the "warm_reboot" command. Upon rebooting "cat /dev/pstore/console-ramoops" and ensure that the contents are dmesg of previous boot. 2. Reboot the system using alt-volume_up-r key combination. Upon rebooting, check pstore contents in the same manner as case#1 above. BRANCH=snow Change-Id: Ic8f0415da6182f4c1bc2d35b91302ceda5c19569 Signed-off-by: Sameer Nanda <snanda@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31523 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Snow: Adding in EC ability to hard reset pmicCharlie Mooney2012-08-282-28/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By pulling line gio_A15 high, you can for a hard reset of the pmic after the stuff resistor is changed. This change adds a function that you can call from the EC and trigger this event (board_hard_reset). The user has access to this command over the EC console by running "pmu reset" and it will force the emergency reset. The board_hard_reset function is used in the pmu's reset code. Whenever it is trying to initialize or shut down the pmu, it resets many or all of its registers over i2c. If the i2c commands fail to get a response from the pmu, the EC will now force a hard reset of the system, which restores everything, allowing for a restart to fix any situation where the pmu has gotten its configuration trashed. BUG=chrome-os-partner:12913 TEST=boot the machine. From EC console check the pmic's register values, then alter them. Run "pmu reset" to force a reset, and check the values again. They should be safe values, which you can confirm by powering on the AP. Repeat this from various starting states: only the EC on, AP on as well, and setting various registers to 0x00's and 0xff's. To stress test the hard-reset ability from the EC's POV, run while true; do echo "pmu reset"; sleep 5; done | cu -l DEVICE -s 15200 BRANCH=snow Change-Id: I911fb9623a7c106d1f993ee4681258c05d4dedae Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31524 Reviewed-by: Simon Glass <sjg@chromium.org>
* Support battery cut-off mechanism for factory.Louis Yung-Chieh Lo2012-08-282-0/+39
| | | | | | | | | | | | | | | | | | | The cut-off command is manufacturer-specific. Thus the logic is implemented in gas gauge IC code. For those boards using this gas gauge, define the CONFIG_BATTERY_BQ20Z453 in board.h. BUG=chrome-os-partner:12962, BRANCH=snow Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> TEST=Tested on snow ectool batterycutoff ; expect system is off immediately ; if AC power is not connected. Change-Id: Idd290c76439f3263c1c812b236b79623878f73b2 Reviewed-on: https://gerrit.chromium.org/gerrit/31466 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Yung-Chieh Lo <yjlou@chromium.org> Tested-by: Yung-Chieh Lo <yjlou@chromium.org>
* snow: Change TPSCHROME fastcharge timeout to 6 hoursRong Chang2012-08-281-5/+58
| | | | | | | | | | | | | | | | | | When battery temperature t in range 0C to 10C, default charging current is 50%. And it will take longer than 3 hours to charge battery from 0% to full. Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:13172 TEST=manual Check pmu register 0x4. FASTCHARGE bits[4:2] should be 0b100. Change-Id: I133acee21c0886b0739b4b41766ca077bb4babbc Reviewed-on: https://gerrit.chromium.org/gerrit/31458 Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Make AC status feature optional at compile timeSimon Glass2012-08-271-2/+5
| | | | | | | | | | | | | | | | This feature is not actually used on current platforms. Avoid setting up the GPIO unless it is specifically enabled. BUG=chrome-os-partner:13064 BRANCH=snow TEST=manual build and boot on snow. See the AC power GPIO does not change when un/plugging power. Change-Id: I6731625a19f30f6dd35471b126f3083b39747203 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31304 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Add CONFIG_CONFIGURE_BOARD_LATE for late board initSimon Glass2012-08-271-0/+3
| | | | | | | | | | | | | | | | It is useful to be able to perform some board init after GPIOs are set up. When defined, configure_board_late() will be called after GPIOs are ready. BUG=chrome-os-partner:13064 BRANCH=snow,link TEST=manual build and boot on snow with later changes. See the AC power GPIO does not change when un/plugging power. Change-Id: Idc56c0acde9f7bd46b4379731b973d1fce760b3f Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31303
* Reset pmic registers to known safe values on bootCharlie Mooney2012-08-272-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | If a bug causes the pmic's internal registers to be overwritten with garbage, they won't go away and can cause long lasting problems. This change overwrites them all whenever the EC or AP turn on with known, safe values, so if that happens, a reboot will restore them instead of forcing the user to pull the battery. It also overwrites a few of them when the AP shuts down, to prevent AP bugs from leaving the pmu powering a bunch of peripherals that it doesn't need after it has turned off. BUG=chrome-os-partner:12913 TEST=from EC console run "i2c w 0x90 0x0c 0xff" to screw up one of the pmic registers. Reboot the EC, and the AP should be able to boot just fine. Once the AP is booted, run that command again. This time, just reboot the AP, it should come back on like normal. Try again with "i2c w 0x90 0x0c 0x00". Without the change, this fails to work. BRANCH=snow Change-Id: If3f0764f23e0112cc11be60b413f51e1b66e54a7 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31259 Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Puneet Kumar <puneetster@chromium.org>
* Rename EC_FLASH_PROTECT_RW_* flags to EC_FLASH_PROTECT_ALL_*.Louis Yung-Chieh Lo2012-08-251-15/+14
| | | | | | | | | | | | | | | | | | | | Current *_RW_NOW/RW_AT_BOOT is used to lock the entire flash. This could lead confusion in the future. So, rename them. Since the bit definition is unchanged, thus the callers (u-boot, flashrom) is fine if they don't change the name. BUG=chrome-os-partner:12951 BRANCH=snow,link TEST=build in chroot only:daisy,snow,link,bds Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Change-Id: I2395e93793f590e6fb8aae7006eb8e5c836002bc Reviewed-on: https://gerrit.chromium.org/gerrit/31199 Commit-Ready: Yung-Chieh Lo <yjlou@chromium.org> Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org> Tested-by: Yung-Chieh Lo <yjlou@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fix return size error in lightbar host commands.Bill Richardson2012-08-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | The response size was wrong. It should be right. BUG=none BRANCH=link TEST=none Build the lbplay tool, copy it to the DUT. cd src/platform/ec make BOARD=link scp build/link/util/lbplay root@LINKIPADDR:/tmp/ Run /tmp/lbplay on DUT. It used to print a warning message. Now it doesn't. The lightbar will glow green, then red (that's what lbplay does). Change-Id: Iee02a026f08b6f761e5f28f20b79bcb9f4704a43 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31403 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32: fix AP auto power onVincent Palatin2012-08-241-3/+3
| | | | | | | | | | | | | | | | | | | | | The logic introduced by CL 28139 was incorrect (ie it just sets to 0 the auto_power_on variable which is already 0) For software sync, we always want to power the AP. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:13126 TEST=on Snow, cold reset the EC and see the AP firmware booting. in U-Boot console, type "mbkp reboot cold" and see the AP rebooting instead of shutting down. BRANCH=snow Change-Id: Ib88f75a8b159015df708c041cdc14153fe8736a9 Reviewed-on: https://gerrit.chromium.org/gerrit/31370 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Fix poweron state machine in the ECPuneet Kumar2012-08-241-52/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing state machine does the following: - when power button is pressed it 1. powers on the AP 2. sets a timer of 1 sec and then 3. waits for power button to be released When the timer fires it checks xpshold is set by the AP and if so it clears the pwron signal (which is used by the AP to detect power button is pressed). The problem occurs when the user holds the power button for more than a second. The AP turns on xpshold, then notices that pwron is still on and subsequently powers down because it thinks the power button is pressed. When the button is finally released, since it was held down for more than a second, the timer routine notices that xpshold is not on and therefore shuts down the system. Another problem found while analysing this state machine is that loop checking for poweroff only triggers on the rising edge of xpshold. This means that if the AP powers down the EC might miss a possible power event. Here is the proposed fix: When the power button is pressed the EC will: 1. power on the AP 2. Check for xpshold to be asserted with a 1 sec timeout 3. If uboot is healthy xpshold should come on pretty quickly; the EC then waits for the power button to be released in less than 8 seconds 4. If the power button is released then the EC waits for power off events. 5. If the power button is not released it waits for upto 8 seconds before turning off the AP. The added wrinkle is how to address a borked uboot case. In the case where xpshold doesn't come on in < 1 second, the EC will allow the AP to stay on for upto 16 seconds so that USB boot can finish. The user must hold the power button down until uboot boots and sets xpshold. The assumption here is that USB boot takes < 16 seconds. BUG=chrome-os-partner:12748 TEST="follow instructions in bug report" Change-Id: I5b582a6c3ae3449238e2813e4a581bd8f92dd846 Signed-off-by: Puneet Kumar <puneetster@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31291 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Allow hashing an empty RW imageRandall Spangler2012-08-241-16/+10
| | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:13084 TEST=manual flash_erase 0x14000 0x14000 reboot hash Offset: 0x00014000 Size: 0x00000000 (0) Digest: e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 BRANCH=link,snow Change-Id: I3152c201edac5ef6ad8e28c4e55cd6245b61e786 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31277 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* flash: Only erase flash block that contain dataSimon Glass2012-08-231-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It wastes time to erase blocks that are already erased and it is faster on stm32 to check first. Add a check in flash_physical_erase() on all chips, using a common flash_is_erased() function. BUG=none BRANCH=snow,link TEST=manual Do software sync in U-Boot and see that it succeeds. This tests that we can still erase and then boot a written image. It typically saves a second on a full sync over i2c. SMDK5250 # cros_test swsync -f SF: Detected W25Q32 with page size 4 KiB, total 4 MiB Flashing RW EC image: erasing, writing, done Flashing RO EC image: erasing, writing, done Full software sync completed in 22.949s SMDK5250 # Also see that second erase is faster: SMDK5250 # time mkbp erase rw time: 0.952 seconds, 952 ticks SMDK5250 # time mkbp erase rw time: 0.054 seconds, 54 ticks SMDK5250 # Change-Id: I3699577217fdbb2f212d20d150d3ca15fdff03eb Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30851 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Blink charger LED on charging errorRong Chang2012-08-232-7/+136
| | | | | | | | | | | | | | | | | | | | Charger LED is controlled by TPSCHROME chip. And it blinks only when hardware detected charging error. On other charging error conditions not detected by TPSCHROME, we set the temperature thresholds to make charger generate the error blink. Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:12224 TEST=manual Plug AC power, heat up battery to 65 C. The charging LED should start blinking instead of green. Change-Id: Ib1c38a88c026471a52fbbb4f803e3b2aba93ab40 Reviewed-on: https://gerrit.chromium.org/gerrit/31139 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org>
* Check TPSCHROME VACG when power button is pressedRong Chang2012-08-221-5/+20
| | | | | | | | | | | | | | | | | | | | | | | The AC status GPIO also indicates power button. When power button is pressed, EC should return VACG in pmu_get_ac() funtion. If this function is called in interrupt context with power button pressed, return 1. Charging task will play nicely in charging mode without real AC. But in discharging mode, it will shutdown application processor if battery remaining capacity is too low. Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:12738 TEST=manual With AC plugged, press and hold power button. Run uart console command "pmu" and check output, "ac gpio" should be 1. Change-Id: I26d1a5a7a4ed2ff26a35e965a3ca2307a9c231e9 Reviewed-on: https://gerrit.chromium.org/gerrit/31112 Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Ready: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* gaia: Assert PMIC_PWRON_L only if XPSHOLD is lowDavid Hendricks2012-08-221-2/+7
| | | | | | | | | | | | | | | | | | | This is intended to prevent accidental AP reboot when soft rebooting the EC, e.g. via sysjump during firmware updates. For our platforms, the PMIC_PWRON_L causes the AP to see a keyboard power button press. Signed-off-by: David Hendricks <dhendrix@chromium.org> BRANCH=snow BUG=chrome-os-partner:12650 TEST=sysjump via "ectool reboot_ec RW" or firmware update no longer causes AP to reboot, Change-Id: Ife227285499d5cd52d6a0cb0ebe5df2f51d706d4 Reviewed-on: https://gerrit.chromium.org/gerrit/30291 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org>
* Add "lightbar demo" mode for executive bikesheddingBill Richardson2012-08-202-21/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I keep getting asked to build an EC image to manually control the lightbar patterns so that the Powers That Be can look at it. This change just makes it possible to turn that mode on and off for yourself. You'll need a root shell or the EC console to do it, though. BUG=chrome-os-partner:8039 BRANCH=link TEST=manual From the EC console, type lightbar demo 1 OR from the root shell run ectool lightbar demo 1 After that, these keys should change the lightbar appearance (transitions may be slow and subtle - that's intended): UP = battery is more fully charged DOWN = battery is less fully charged RIGHT = battery is charging LEFT = battery is discharging BRIGHT = increase lightbar brightness DIM = decrase lightbar brightness Note that this does not interfere with the normal function of any keys. It only adds some additional EC behavior. Change-Id: Ia1a9855188244d74b670f9dbfdf60e3ac0343460 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30899
* Fix a bug that battery info is not updated when AC not connectedVic Yang2012-08-181-3/+3
| | | | | | | | | | | | | | | | When AC power is not connected, EC doesn't update battery information in mapped memory. This makes battery information unavailable is AC is not present when EC boots. BUG=chrome-os-partner:12858 TEST=Unplug AC and reset EC. Run ectool and check we can see battery info. BRANCH=link Change-Id: I23339962a6aa1bbbf6806c1184b96e949466208f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30820 Reviewed-by: Rong Chang <rongchang@chromium.org>
* flash: Indicate that erase operation is in progressSimon Glass2012-08-171-0/+5
| | | | | | | | | | | | | | | Erasing the flash can take a while, by which time the host may have timed out. So pass an in-progress message back to the host before starting, and when done, stash the result for later collection. BUG=chrome-os-partner:12685 BRANCH=snow,link TEST=manual build and boot to kernel on snow Change-Id: I5566a5519a1c8b320573b20e1ea7660217b32a5e Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30471
* Snow: WP_RO should be 0x10000 (including pstate).Louis Yung-Chieh Lo2012-08-172-5/+5
| | | | | | | | | | | | | | | To reflect the CL 00799d5 that moves the pstate to 0xf000. BUG=chrome-os-partner:12799 TEST=Build in chroot. snow: WP_RO is changed from 0:0xf000 --> 0:0x10000. daisy: WP_RO is unchanged. link: WP_RO is unchanged. Change-Id: I572bae3f624744e60d13a762875211beffc6c516 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30670 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Display debug message before shutting down to protect the battery.Bill Richardson2012-08-161-0/+1
| | | | | | | | | | | | | | The serial console was showing that the CPU was being forcefully shut down, but I couldn't figure out why. Add a debug message so I'll know next time. BUG=none TEST=none BRANCH=none Change-Id: I6216711d03fd5e08190b9f0528a4bd8948b74dd8 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30606 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32: don't go to stop mode in suspendVincent Palatin2012-08-161-2/+0
| | | | | | | | | | | | | | | | | | | | When the AP is suspended, we are using the timer TMR2 to do the power led "breathing", so we cannot cut the clocks as they are used for this PWM. The EC will be in idle mode instead of stop mode during S3. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=on Snow, suspend the AP and see you can still type in the EC console and the power led is "breathing". Change-Id: Ib4cce36c5a9bf649996bf627baeb30ef2a3221a8 Reviewed-on: https://gerrit.chromium.org/gerrit/30057 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org> Commit-Ready: <arscott@google.com>
* host_command: Add host_send_response() to send responsesSimon Glass2012-08-162-3/+8
| | | | | | | | | | | | | | | | | | Rather than have the send_response() handler called willy nilly from around the EC code, provide an official function for doing this step. BUG=chrome-os-partner:12685 BRANCH=snow,link TEST=manual build and boot to kernel on snow Tried 'mkbp reset' command on snow but it did not seem to work properly Unable to test on link at present Change-Id: I8d9146639efb2af482d80563b403771cee961942 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30468 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* daisy: Modify charging flow to comply charging specificationRong Chang2012-08-163-79/+173
| | | | | | | | | | | | | | | | | | | | | | | | | This change corrects charger interrupt event handling, charger enable gpio, battery full condition, EC deep sleep mode support when AC unplugged, and lid controlled power off. Signed-off-by: Rong Chang <rongchang@chromium.org> BRANCH=snow BUG=chrome-os-partner:12573,12574,12575 TEST=manual - ec console command 'gpioget': - SPI1_MISO should be 0 when AP off - CHARGER_EN should be 0 after AC unplugged - charging led should be off after AC unplugged - when battery remaining charge < 3%, system should be powered off without AC. - ec console command 'sleepmask 0', turn off AP: - deep sleep only when AC unplugged Change-Id: I0f63835dae67d90de7a8c8c6c3537ca9a16faed4 Reviewed-on: https://gerrit.chromium.org/gerrit/30316 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Include 0xea byte as the last byte in RO/RW imagesRandall Spangler2012-08-141-6/+6
| | | | | | | | | | | | | | | | | | | | | | | This is better than having the 0xea byte only appended in ec.bin, since now the byte is present in ec.RW.flat and ec.RO.flat. Needed for EC software sync. BUG=chrome-os-partner:12412 BRANCH=link,snow CQ-DEPEND=30305 TEST=manual 1. xxd ec.RW.bin | tail; should end with 0xea 2. xxd -g4 build/link/ec.bin | grep -C3 454e44ea That word should be the last one before a bunch of 0xfffffff bytes. There should be 2 matches (since there's RO and RW firmware) Change-Id: I0de5cc78083f1a9b49202fbe2305a3101f401db3 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30303 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Handle IRQ from TPS65090, pass AC status to APSimon Que2012-08-143-46/+57
| | | | | | | | | | | | | | | | | | | Changes made by this patch: 1. Create IRQ handler for the TPS65090 IRQ. IRQ wakes up charger task. 2. Charger task sets the AC_STATUS GPIO based on the AC status. 3. Initialize PMU at power-on. BRANCH=snow BUG=chrome-os-partner:11739 TEST=Power on the system, with servo v2 connected to EC console. Plug and unplug AC. The IRQ handler should be triggered. Change-Id: Ice23411c275111fdb56d2c47ba28c3c44dee4d71 Signed-off-by: Simon Que <sque@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29914 Commit-Ready: Rong Chang <rongchang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Initialize temperature reading buffer to sane valuesVic Yang2012-08-132-5/+43
| | | | | | | | | | | | | | This is to prevent temperature value being read before the first time we poll sensors causes unexpected error. BUG=chrome-os-partner:12614 TEST="sysjump RW" and then "temps" immediately. Check all temperature readings are near 300 K. Change-Id: I5c84d9696b4876fdfcf14c3a416cbc09c040d4ee Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30138 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* port80: Track and export last post code in previous bootDuncan Laurie2012-08-131-2/+31
| | | | | | | | | | | | | | | | | | | | | | | - Add a special port80 event for LPC reset assertion and use that event to store the previous post code. - Add a new command to retrive the last saved post code so I can easily query it at boot/resume and log unusual codes. BUG=none TEST=manual (with additional coreboot/mosys changes) - interrupt boot process by issuing x86reset on EC console or by using warm reset button on servo - read event log with mosys on next boot 78 | 2012-08-13 09:24:04 | System boot | 262 79 | 2012-08-13 09:24:04 | Last post code in previous boot | 0x9e 80 | 2012-08-13 09:24:04 | System Reset Change-Id: I7b9f10442b9c468d89fde4e75adb94b0c07c2c8d Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29995 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Clean up EC hibernate logicRandall Spangler2012-08-132-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | system_hibernate(0, 0) now hibernates until a wake pin assert, with no RTC wake. BUG=none TEST=manual command -> expected reset flags from 'sysinfo' 1. reboot -> soft 2. reboot hard -> power-on hard 3. hibernate (and press power button) -> power-on wake-pin 4. hibernate 3 (and wait for timeout) -> power-on rtc-alarm 5. hibernate 10 (and press power button before 10 sec) -> power-on wake-pin hibdelay 10 then shut system down and run on battery 10 sec later, system should hibernate. Change-Id: I399413d265f6fcf808adf9ed1db7b812a1b12fc2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29923 Reviewed-by: Vic Yang <victoryang@chromium.org>
* link: update IR3570A settingsVincent Palatin2012-08-091-5/+5
| | | | | | | | | | | | | | | | | | | update settings according to IR3570Axxxx_REV5_DRC_7-27-12. This should fix the spurious UVLO during reboot, so it re-activates the fault. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:11947 TEST=on Link EVT reworked with IR3570A, run software and check we can reboot normally and we have no GPU warning. Change-Id: I5882f1d25a65c81fdaa4326ead913bc080b71ee9 Reviewed-on: https://gerrit.chromium.org/gerrit/28650 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add ectool command to read snapshot of EC's console outputRandall Spangler2012-08-091-1/+85
| | | | | | | | | | | | | | BUG=chrome-os-partner:12483 TEST=from root shell, 'ectool console', then on the ec console, type 'help list' a few times to generate lots of debug output, then repeat 'ectool console'. Then on EC console, 'syslock', and then 'ectool console' should fail. Change-Id: Ie1c74c7e35d6b8228615d20192fd90093977de64 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29825 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Tidy shared memory moduleRandall Spangler2012-08-093-18/+34
| | | | | | | | | | | | | | | | Adds shmem command to print amount of shared memory. This is also a useful indicator of how much IRAM is left, since shared memory will expand to fill all unused IRAM. Removes never-implemented wait param to shared_mem_acquire(). BUG=none TEST=shmem Change-Id: I798ff644d701dcba52219b70bec99c06a23d03ec Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29809 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Enable PLL only briefly during ADC initRandall Spangler2012-08-091-5/+1
| | | | | | | | | | | | | | | | | | It was previously only enabled for 1500us during boot, but in a way that triggered a needless round of notifications to other modules. This is cleaner. This also fixes adc_init() not initializing the task IDs to wake when interrupts come in, and removes some unneeded code from other init functions. BUG=chrome-os-partner:12472 TEST=boot system and run adc command. Should still provide reasonable data. Change-Id: I9ae5857d988c727caf5d53f551a2f12b30974c0f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29806 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32f100: implement low power modeVincent Palatin2012-08-091-0/+5
| | | | | | | | | | | | | | | | | | | | | When the AP is not running and we have enough time go to STOP mode instead of simple idle. The EC consumption should drop from 12mW to a few mW. This is currently not activated by default, you need to type "sleepmask 0" in the EC console to activate it. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:8866 TEST=on Snow, check the software is still working properly when STOP mode is activated and measure power consumption on 3v_alw rail. Change-Id: I231d76fe6494c07b198c41694755b82d87c00e75 Reviewed-on: https://gerrit.chromium.org/gerrit/29315 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
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