summaryrefslogtreecommitdiff
path: root/chip/lm4/gpio.c
Commit message (Collapse)AuthorAgeFilesLines
* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-051-385/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* COIL: chip/lm4: Update terminologyCaveh Jalali2021-08-041-1/+1
| | | | | | | | | | | BRANCH=none BUG=b:163885307 TEST=compare_build.sh matches Change-Id: Ifdf9d33f9315e11c0c31a62b08864790b2fcaa5a Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069988 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Cleanup: Correct GPIO alternate function parameterVijay Hiremath2019-11-011-3/+5
| | | | | | | | | | | | | | | Added code to correct the GPIO alternate function parameter at Chipset level. Optionally board level functions can cleanup the code in additional change lists. BUG=b:139427854 BRANCH=none TEST=make buildall -j Change-Id: I1171ca36a703291070fc89f972f84414adcf04fc Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880974 Reviewed-by: Keith Short <keithshort@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-2/+2
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* gpio: Add function to clear pending interruptDuncan Laurie2017-03-011-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently if an interrupt is pending before it is enabled the interrupt will fire immediately. In most cases this is fine, but if we want to use the interrupt to trigger something like waking the AP it should be sure that it won't immediately fire once enabled. For example: on the Eve board we have the trackpad interrupt run to the AP and the EC in order to support wake from Deep S3 (magic AP state that only the EC can wake it from). This interrupt is used in S0 by the AP while ignored by the EC, and then enabled on the transition to S3 in order to be able to wake. Since it has been active the interrupt may be pending in the EC (depending on the chip), which can result in the interrupt firing immediately and waking the AP. BUG=chrome-os-partner:62224 BRANCH=none TEST=This has been functionally tested on npcx only as that is what I have a use case and system for, the others compile and look right but have not been directly tested. Change-Id: I9e0877d99e7f09f4c30bf9861fbad81c12c059ad Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/446962 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fix various misspellings in commentsMartin Roth2016-11-151-1/+1
| | | | | | | | | | | | | No functional changes. BUG=none BRANCH=none TEST=make buildall passes Change-Id: Ie852feb8e3951975d99dce5a49c17f5f0e8bc791 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403417 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* gpio: Refactor IRQ handler pointer out of gpio_listAseda Aboagye2015-04-101-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the gpio_info struct, we had a irq_handler pointer defined even though a majority of the GPIOs did not have irq handlers associated. By removing the irq_handler pointer out of the struct, we can save some space with some targets saving more than others. (For example, ~260 bytes for samus_pd). This change also brings about a new define: GPIO_INT(name, port, pin, flags, signal) And the existing GPIO macro has had the signal parameter removed since they were just NULL. GPIO(name, port, pin, flags) In each of the gpio.inc files, all the GPIOs with irq handlers must be defined at the top of the file. This is because their enum values from gpio_signal are used as the index to the gpio_irq_handlers table. BUG=chromium:471331 BRANCH=none TEST=Flashed ec to samus and samus_pd, verified lightbar tap, lid, power button, keyboard, charging, all still working. TEST=Moved a GPIO_INT declaration after a GPIO declaration and watched the build fail. TEST=make -j BOARD=peppy tests TEST=make -j BOARD=auron tests TEST=make -j BOARD=link tests Change-Id: Id6e261b0a3cd63223ca92f2e96a80c95e85cdefb Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/263973 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* force the compiler to use a valid register allocation for irq handlersVincent Palatin2014-03-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we are calling the re-scheduling routine at the end of an irq handling routine, we need to ensure that the high registers are not currently saved on the system stack. On Cortex-M3/M4, the compiler is normally doing tail-call optimization there and behaving properly, but this fixes the fact that insanely large interrupt handling routines where sometimes not compile and not running properly (aka issue 24515). This also prepares for one more core-specific DECLARE_IRQ routine on Cortex-M0. Note: now on, the IRQ handling routines should no longer be "static". Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:24515 TEST=make -j buildall revert the workaround for 24515, see the issue happening only without this CL. Change-Id: Ic419369231925568df05815fd079ed191a5446db Reviewed-on: https://chromium-review.googlesource.com/189153 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* gpio: Make GPIO_INT_BOTH explicitly RISING|FALLINGRandall Spangler2013-11-231-1/+3
| | | | | | | | | | | | | | | | | | | | | | | For historical reasons on LM4, we defined GPIO_INT_F_BOTH separately from GPIO_INT_F_RISING and GPIO_INT_F_FALLING. This means that the code has weird checks like BOTH || (RISING && FALLING), which have propagated in error-prone ways across the other chips. Instead, explcitly define BOTH to be RISING|FALLING. Ideally, we would have called it GPIO_INT_EDGE to match GPIO_INT_LEVEL, but changing that now would be a big find-replace. Which might still be a good idea, but that is best done in its own CL. BUG=chrome-os-partner:24204 BRANCH=none TEST=build and boot pit, spring, and link; that covers STM32F, STM32L, and LM4. Change-Id: I23ba05a3f41bb14b09af61dc52a178f710f5c1bb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/177643 Reviewed-by: Jeremy Thorpe <jeremyt@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* cleanup: Assorted TODO commentsRandall Spangler2013-10-311-1/+2
| | | | | | | | | | | | | | | Remove comments if no longer applicable, or assign bug numbers if they still are. Tidy some debug output. No code changes other than the debug output. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms, pass unit tests Change-Id: I2277e73fbf8cc93f3b1b35ee115e0f2f52eb8cf9 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175215 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* lm4: Use low speed clock in deep sleep.Alec Berg2013-10-211-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Changed the low power idle task to use the low speed clock in deep sleep. The low power idle task is currently only enabled for Peppy, Slippy, and Falco. This change decreases power consumption when the AP is not running. Note that the low speed clock is slow enough that the JTAG cannot be used and the EC console UART cannot be used. To work around that, this commit detects when the JTAG is in use and when the EC console is in use, and will not use the low speed clock if either is in use. The JTAG in use never clears after being set and the console in use clears after a fixed timeout period. BUG=None BRANCH=None TEST=Passes all unit tests. Tested that the EC console works when in deep sleep. Tested that it is possible to run flash_ec when in deep sleep and using the low speed clock. Change-Id: Ia65997eb8e607a5df9b2c7d68e4826bfb1e0194c Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173326 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* lm4: GPIO interrupt handler scans through fewer GPIOsRandall Spangler2013-10-151-2/+4
| | | | | | | | | | | | | | | | | | | | | Rather than scan the entire GPIO table, stop as soon as all interrupt bits have been handled. We hand-order the table so GPIOs with interrupts are first, so this should reduce interrupt overhead. BUG=chrome-os-partner:23296 BRANCH=none TEST=boot rambi x86indebug -1 apshutdown powerbtn ...That should print lots of 'x86 in' debug messages as pins change state, showing that the interrupt handlers are still responding. Change-Id: I7942cd51870ad51de068d90d68cf6634ff2fb1a0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173031 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* lm4: Modified clock gating to allow easy expansion to low power.Alec Berg2013-10-101-9/+41
| | | | | | | | | | | | | | | | | | | | | Created a new function to enable or disable clocks to various peripherals. This new function makes it easy to specify if you want the clock enabled in run mode, sleep mode, and/or deep sleep mode. Added infrastructure to specify which GPIOs should interrupt the EC from deep sleep. BUG=none BRANCH=none TEST=Passes all unit tests. Ran on a peppy and verified that the clock gate control registers in run mode (LM4_RCGC regs) were the same before and after this change. Change-Id: Ia5009ac8c837f61dca52fe86ebdeede2e1a7fe4d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172454 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Support multi-bit mask in STM32L's GPIO functionsVic Yang2013-09-111-1/+1
| | | | | | | | | | | | | | | | | | The definition of GPIO interface allows passing in multi-bit mask, and this is what's done by gpio_config_module(). Fix STM32L's function so that it doesn't accidentally set incorrect GPIO register values. BUG=chrome-os-partner:22605 TEST=On Kirby, do 'led r 0' and check the value of 0x40020800 is 0x01540000. BRANCH=None Change-Id: I9a1c8074aab7345485a590ecf138bf99d0742997 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168739 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org>
* Fix a bug that GPIO cannot be set as input on stm32lVic Yang2013-09-041-3/+3
| | | | | | | | | | | | | | | | | GPIO_INPUT is defined as 0, and any GPIO flag cannot be examined against GPIO_INPUT. Change GPIO_INPUT to non-zero value to avoid this. BUG=chrome-os-partner:22275 TEST=On Kirby, set a GPIO to output and pull it low, and then set it back to input. Check it can be pull high externally. TEST=Build all boards. TEST=Boot link and spring. BRANCH=None (unless this bug hits some other boards.) Change-Id: I84b9936c24af538ac59c36129fda27ca879bf9d1 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167190 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Clean up configuring GPIO alternate functionsRandall Spangler2013-08-071-40/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO alternate functions used to be configured throughout the code, which made it hard to tell which ones you needed to configure yourself in board.c. It also sometimes (chip/lm4/i2c.c) led to GPIOs being configured as alternate functions even if they weren't used on a given board. With this change, every board has a table in board.c which lists ALL GPIOs which have alternate functions. This is now the only place where alternate functions are configured. Each module then calls gpio_init_module() to set up its GPIOs. This also fixes a bug where gpio_set_flags() ignored most of the flags passed to it (only direction and level were actually used). On stm32f, gpio_set_alternate() does not exist, and pins are configured via direct register writes from board.c. Rather than attempt to change that in the same CL, I've stubbed out gpio_set_alternate() for stm32f, and will fix the register writes in a follow-up CL. BUG=chrome-os-partner:21618 BRANCH=peppy (fixes I2C1 being initialized even though those pins are used for other things) TEST=boot link, falco, pit, spring Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/64400
* Add some ifdefs to distinguish between Link and SlippyBill Richardson2013-05-021-3/+12
| | | | | | | | | | | | | | | I'll still need to decide what to do differently for Slippy, but for now let's just identify the places where there will likely be a difference. BUG=chrome-os-partner:18825 BRANCH=slippy TEST=manual Link still works. Change-Id: I950f0e5356ccf9838f2140d853122235f884e34f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/49931
* Add flash write protect testVic Yang2013-04-171-1/+1
| | | | | | | | | | | BUG=chrome-os-partner:18598 TEST=Run on Spring BRANCH=None Change-Id: I6488ace5d6b758410c76d7625787413eba37cbe9 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48208 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Refactor gpio_set_level() and gpio_pre_init()Randall Spangler2013-04-151-23/+29
| | | | | | | | | | | | | | | | | | | | | | | | | gpio_set_level() now allows setting the pin level if GPIO_LOW or GPIO_HIGH is specified. Previously, stm32 platforms did this even though the definition of gpio_set_level() said it wouldn't work. Fixed gpio_set_level() not setting level after warm reboot on stm32 because it was checking the GPIO_DEFAULT flag in the wrong place. Fixed LM4 still mucking with alternate function settings and levels even if GPIO_DEFAULT was specified. And checked gpio_list[] and all of the calls to gpio_set_flags() to make sure everything still behaves the same way it did before (or better, in the case of actual bugs). BUG=chrome-os-partner:18718 BRANCH=none TEST=build all platforms; boot spring and link Change-Id: I4b84815f76060252df235ff9a37da52c54a8eac5 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48058 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Allow GPIO alternate function 0Randall Spangler2013-04-111-2/+2
| | | | | | | | | | | | | | | | | gpio_set_alternate_function() used 0 to mean "normal GPIO function". But on chips like STM32L, alternate function 0 is actually a function on some pins. So change "normal GPIO function" to -1. Also add support for this on STM32L. BUG=chrome-os-partner:18343 BRANCH=none TEST=build and boot link and daisy Change-Id: I9cdd9ad91a315b616e373a0dc9a50545cf9d20fa Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47903 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Move gpio_get_name() to gpio_common.cRandall Spangler2013-04-111-5/+0
| | | | | | | | | | | | | | | Its implementation is the same on all platforms. No functional changes, just renaming/moving. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms Change-Id: I78741c6587ea61e7ac8edae5a509502b7ab5078b Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47898 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Rename power_button module to switchRandall Spangler2012-10-301-1/+1
| | | | | | | | | | | | | | | Since it handles not just power button, but also lid switch, AC detect, and other switches. No functional changes; just renaming. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system, power on/off with power button Change-Id: I51628a52293f7207715f5f6bf368a08fe6c3dbce Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36821
* Clean up GPIO module.Randall Spangler2012-10-301-73/+82
| | | | | | | | | | | | No functional changes, just code cleanup. BUG=chrome-os-partner:15579 BRANCH=none TEST=gpioget returns reasonable values Change-Id: I4301ccc68ade775f78f4ccd84710d2cd4bc25252 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36800
* Clean up GPIO moduleRandall Spangler2012-10-251-35/+36
| | | | | | | | | | | | | Just code cleanup; no functional changes BUG=chrome-os-partner:15579 BRANCH=none TEST=build code; boot link; gpioget still works Change-Id: If0770c1a5ce0d5c51ba528fbe2944a73fafa949b Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36556 Reviewed-by: Simon Glass <sjg@chromium.org>
* Hook functions no longer return valuesRandall Spangler2012-10-231-5/+1
| | | | | | | | | | | | | | | Previously, all hook functions returned EC_SUCCESS, which was meaningless because nothing ever looked at the return value. Changing the return value to void saves ~100 bytes of code size and an equal amount of source code size. BUG=none BRANCH=none TEST=code still builds; link still boots Change-Id: I2a636339894e5a804831244967a9c9d134df7d13 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36372
* Allow GPIOs to be set up laterSimon Glass2012-08-271-0/+2
| | | | | | | | | | | | | | | | | | | | At present GPIOs must be staticly defined in a table. This is efficient but inflexible, and requires error-prone and correponding #ifdefs both in the board's gpio.h and gpio.c files. Create a GPIO_UNSET option for GPIOs. This allows them to be assigned an enum value, but have the actual use under program control. BUG=chrome-os-partner:13064 BRANCH=snow,link TEST=manual build and boot on snow with later changes. See the AC power GPIO does not change when un/plugging power. Change-Id: Iab58275923d7d6cfce62c890b5db9b6758279a4c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/31302 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Disable unused BDS functionalityRandall Spangler2012-05-171-9/+3
| | | | | | | | | | | | | This was used on the hybrid Badger-Lumpy systems for one-off testing. It wouldn't necessarily work on a bare Badger board, and maintaining it resulted in frequent build breaks. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=build link, bds, daisy; boot link and bds Change-Id: Ib64ccad9f38d76832ab57f7254dbf32f3d5e4a5e
* Use open drain reset signals, and clean up signals to 5VALW-powered devicesRandall Spangler2012-05-101-2/+6
| | | | | | | | | | | | | | | | | | | | | | Open drain cleanup minimizes leakage and signal glitching on shared reset/signal lines, and is tidier than explicitly switching the signals between inputs/outputs. Touchscreen and lightbar are powered by +5VALW so their signals need to be dropped when +5VALW is off to avoid leakage, and so they see a clean reset signal when they're powered up. Moved +5VALW power-on to S5-S3 transition, to minimize power draw in S5. This also ensures that 5VALW-powered devices get reset when the device bounces through S5. (No effect on proto1, where 5VALW is not under EC control.) Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9172 TEST=boot and shutdown system; still works. Change-Id: Ia4bf0703292a189c324ce283d1e79a33776ee40f
* Add gpio_set_flags() and system_get_board_version()Randall Spangler2012-05-081-29/+53
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:9117 TEST=version; board version should be 0 on proto1 and 1 on EVT Change-Id: Ic64ad0d009151fbda09f5c1605ef50ae708cb6ae
* Move gpio list into gpio.h header fileSimon Glass2012-05-081-4/+0
| | | | | | | | | | | | This is referenced by various files, so should be in the gpio.h header. BUG=none TEST=manual: build and boot on daisy, see that USB download still works build on all platforms Change-Id: If579c975ef6c82988b9e411eeaa97c950d9efce4 Signed-off-by: Simon Glass <sjg@chromium.org>
* Add gpio_get_name() to return the name of a signalSimon Glass2012-05-031-0/+6
| | | | | | | | | | | | Add this to the GPIO API. It seems that the implementation is copied in LM4 and STM32 so I have reluctantly done the same with this new function. BUG=chrome-os-partner:9424 TEST=build and boot on Daisy Change-Id: Ifddc52e69b2b33af2645384c0171dd264e588fcd Signed-off-by: Simon Glass <sjg@chromium.org>
* Remove unused uart.h includesRandall Spangler2012-04-251-1/+0
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=none Change-Id: I8f9c6e67427a5c7f2c42754b421db44504f9c10d
* Added HOOK_INIT for driver module initsRandall Spangler2012-04-191-1/+3
| | | | | | | | | | | | This covers modules which need to initialize before task_start(), but don't particularly care in what order they're initialized. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=if it boots, it works Change-Id: I69829aac8d1c3c14ee04916a794b84bbf03a09eb
* Support warm reboot from one EC image to another.Randall Spangler2012-03-191-6/+20
| | | | | | | | | | | | | | | | | | | | | This is necessary at init-time for verified boot to jump from RO to one of the RW images. It's also used by factory EC update to update one image and then jump to the updated image to finish the update. In this case, the x86 does NOT reboot. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8449 TEST=manual 1) power on x86 and log in 2) sysjump a --> system is in a; x86 has not rebooted 3) sysjump ro --> system is back in RO; x86 has not rebooted 4) reboot -> system is in RO; x86 HAS rebooted Change-Id: I9dbadcf9775e146a0718abfd4ee0758b65350a87
* More cleanup of board/chip configs and initializationRandall Spangler2012-03-191-0/+6
| | | | | | | | | | | | | | | | | More modules can be disabled individually through CONFIG_ defines. Reordered early module pre-init and init, and added comments to explain why things are ordered in main() the way they are. Fixed a few assorted init-related bugs along the way, like st32m keyboard scan double-initializing. BUG=none TEST=build link, bds, daisy Signed-off-by: Randall Spangler <rspangler@chromium.org> Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
* Split out GPIO console commandsVincent Palatin2012-02-031-116/+0
| | | | | | | | | | | | | The GPIO console commands are common to all platform, let's push them in the common code. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make BOARD=link && make BOARD=bds && make BOARD=discovery on BDS console, try gpioget command. Change-Id: I26e6d26b8d661e78b80d5d5f665e81f4daef0c11
* Fix setting GPIO outputs and keyboard scanningRandall Spangler2012-01-271-1/+3
| | | | | | | | | | | | | | Keyboard scanning was not properly configuring GPIOs on link. Among the problems, it was setting GPIO level then direction, when it needs to set direction first. Also fixed this in gpio pre-init. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7761 TEST=1) press keys on keyboard; see keyboard state change on console 2) 'gpioget PCH_PWRBTNn' should report 1 after boot, not 0 Change-Id: I54010aa6eef1de4822574f964de369b459ee6d0f
* Fix missing GPIO interruptsRandall Spangler2012-01-261-3/+3
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=push and release power button; should see debug messages Change-Id: I4a08b56247baa85555514623db7a04ab4638ca0e
* Indicate which signals in GPIOGET have changed since the last callRandall Spangler2012-01-251-4/+29
| | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=at EC console, gpioget twice, then toggle an output using gpioset, then gpioget again May see *'s the first time. Second time, should see no *'s. Third time, should see a * only the toggled output (and any input signals which respond to it). Change-Id: Ibc1870839201008592b7982049cc352c1779a0e3
* register console commands at compile-timeVincent Palatin2012-01-241-18/+2
| | | | | | | | | | | | | | | Instead of using a runtime callback to register the console commands, put them in a special linker section. So we can do a macro to "register" them during the build. It saves 684 bytes and a few microseconds at startup. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=run a few commands from the BDS command line. Change-Id: Id33ea210b9035bf76ed720373c74c5dd24ccd1b1
* Handle all GPIO IRQs. Interrupts no longer enabled by default.Randall Spangler2012-01-171-15/+70
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7456 TEST=if it runs, it works Change-Id: Ib82afab7d53203af31eefc9887feb98679266ac1
* GPIO interrupts are disabled by defaultRandall Spangler2012-01-131-5/+26
| | | | | | | | | | | | | Added gpio_enable_interrupt() to enable them. This ensures that a module which handles GPIO interrupts doesn't get them until it's ready. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7456 TEST=toggle power button while rebooting; without this fix it triggers a hard fault. Change-Id: I35d926053963a70dd9246ce46a4913603b2b2489
* Move board-specific GPIO lists to board-specific filesRandall Spangler2012-01-121-182/+23
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I47fd5d709a9575e41fdcdf21a7440ebbb762cef5
* Configure all GPIOsRandall Spangler2012-01-121-65/+165
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I0a9be4c689fb72507edcf202073b23c58902d7de
* Tidy GPIO configuration and board-specific configs for modules.Randall Spangler2012-01-121-0/+60
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: Ia06707db78ea9a9313b49a93e8732a7fc9fcc191
* Add constants for all GPIOs.Randall Spangler2012-01-111-17/+70
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I3b77cbbb7f0cc12a4daae7ababd603b5d7af32d1
* Add JTAG moduleRandall Spangler2012-01-111-1/+7
| | | | | | | | | | | This just ensures the JTAG pins are reset to JTAG function on warm reboot. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7448 TEST=none Change-Id: I0cccdbe7a68c228db7f354898ed30598e9fabff0
* Add GPIO get/set commandsRandall Spangler2012-01-111-5/+91
| | | | | | | | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=from debug console, gpioget --> prints current level. Run a few times to see DEBUG_LED value toggle. gpioset debug_led 1 --> turns debug LED on. Run repeatedly to override the idle task toggling it off. Change-Id: I7c64044228697e052a9c20eb052d37a1f640f6e7
* Split power button code into its own fileRandall Spangler2012-01-101-204/+30
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7499 TEST=press and release power button; should see debug messages Change-Id: I8909ae4643afc98753edb690771618ad43135e3e
View Lorry Controller Status