| Commit message (Collapse) | Author | Age | Files | Lines |
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No functional changes.
BUG=none
BRANCH=none
TEST=make buildall passes
Change-Id: I0c4fcc900ec0326d6904aa14f298206e62be0fda
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/403418
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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The USB stream should check that there are bytes in the rx fifo to read
before trying to read them. This should have been in here already.
Checking if rx is valid in usb-stream makes the rx_valid call in usb_spi
unnecessary so that is removed.
BUG=none
BRANCH=none
TEST=manual
Test CCD functionality still works on gru and reef
AP/EC consoles
sudo flashrom -p raiden_debug_spi:[AP|EC] -r img.bin
usb updater
Change-Id: Ieb77e35cc471b1f97d540ea4560591f0f40dd600
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/397858
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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We need to ignore sys_rst_l right now when we use the usb spi endpoint
to update the AP or EC. We hold the EC and AP in reset and this causes
sys_rst_l to be asserted at the start of updating the AP and when the EC
comes out of reset.
Using the USB SPI endpoint may require doing a bunch of transactions
back to back. Cr50 should not reset itself between each one.
This change postpones the reset until we're done using the usb spi
endpoint. Once sys_rst_l just resets the TPM we can remove all of this.
BUG=chrome-os-partner:52366
BUG=chrome-os-partner:54982
BRANCH=none
TEST=manual
verify 'util/flash_ec --board=kevin --raiden' updates the EC
'sudo flashrom -p raiden_debug_spi:target=AP -w $IMG' updates
the AP
The AP and cr50 reset after usb_spi is disabled.
Change-Id: I68a76012bc7bf6d3abd073a70f0b90e440d72c49
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/364051
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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This patch replaces a long standing stub. When the EC asserts this
signal, the CR50 must reset.
But this signal could be driven by CR50 itself as well, and in that
case the signal's assertion should not be causing the CR50 reset.
Ideally it should be possible to tell if the pin is configured as
output and ignore its assertion in that case. But there is no API for
checking the pin configuration settings at this time. An API function
is added to check if the AP Flash is being programmed, the GPIO
configuration access API is left for future enhancements.
BRANCH=none
BUG=chrome-os-partner:52366, chrome-os-partner:54982
TEST=issue 'reboot' command from the bash command line.
- verify on the cr50 console that it reboots along with the rest of
the device
- observe that reading of the NVRam spaces is still fully
functional, and Kevin can boot all the way up to the login
screen.
- try flashing AP firmware through CR50, verify that it succeed.
Change-Id: Ie4506238dc8b158b32121719a2db7fd232fd7d6c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/357967
Reviewed-by: Shawn N <shawnn@chromium.org>
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While in CCD, cr50 can be used to flash the AP and EC through USB. This
change adds an endpoint that can be used to read, erase, and write to
the AP and EC spi rom.
Currently CCD is not enabled on cr50, so usb_spi access has to be
enabled manually through the cr50 console.
BUG=chrome-os-partner:50701
BRANCH=none
TEST=manual
On EC console run 'flash_tristate true'
On cr50 console run 'usb_spi enable'
Use 'flashrom -p raiden_debug_spi:target=EC' and
'flashrom -p raiden_debug_spi:target=AP' to interact with
the AP and EC flash
CQ-DEPEND=CL:342144
Change-Id: I9c31dab252a8bfbc498eaf64ac5c2f53ec9dde30
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/342511
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