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* asurada: enable PPC syv682x on C0/C1stabilize-quickfix-13099.93.B-masterstabilize-13099.94.B-masterstabilize-13099.90.B-masterstabilize-13099.85.B-masterstabilize-13099.73.B-masterstabilize-13099.70.B-masterstabilize-13099.118.B-masterstabilize-13099.110.B-masterstabilize-13099.101.B-masterrelease-R84-13099.B-masterEric Yilun Lin2020-05-154-14/+188
| | | | | | | | | | | | | | | | Enable PPC on C0 and C1, where C1 port is optional and dependent to the daughter board connected. BUG=b:152562604 TEST=ensure C0/C1 can sink and source power. BRANCH=master Signed-off-by: Ting Shen <phoenixshen@google.com> Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Change-Id: I2fabe59562ffbe63e91b60f36b726d63fefdc83b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195721 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* Ezkinil: update LED behaviorSue2020-05-151-17/+17
| | | | | | | | | | | | | | | | | | | Power LED behavior Charge Amber on (S0/S3/S5) Full charge Blue on (S0/S3/S5) Discharge in S3 Amber on 1sec off 3sec Discharge in S5 Off Error Amber on 1sec off 1sec Discharge in S0 Blue on BUG=b:156553303 BRANCH=none TEST=check the led behavior meeting the spec. Change-Id: I524734fa30cbe0df785654a80118a534fbeeaf5d Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200836 Reviewed-by: Edward Hill <ecgh@chromium.org>
* usb_pd: Rename CONFIG_CMD_PD_CONTROL to CONFIG_HOSTCMD_PD_CONTROLVijay Hiremath2020-05-1515-15/+15
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946 Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* test: Add rollback entropy on-device unit testTom Hughes2020-05-144-0/+4
| | | | | | | | | | | | | | | | | | This unit test validates the behavior of adding entropy to rollback. BRANCH=none BUG=b:151105339 TEST=make BOARD=bloonchipper test-rollback_entropy -j && ./util/flash_jlink.py --board bloonchipper --image ./build/bloonchipper/rollback_entropy/rollback_entropy.bin Dragonclaw console: > reboot ro > runtest Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I0532104d483e3a8c16c2c3b9fd7fef8554eaadad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2197620
* Waddledee: Use cached Vbus presenceDiana Z2020-05-141-5/+1
| | | | | | | | | | | | | | | Convert pd_snk_is_vbus_provided() to return the cached Vbus presence from the charger driver. BRANCH=None BUG=None TEST=on waddledee, confirm charger and powered dongle can connect to both ports Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If45956072f41f8a20e5880825e687230ef239a1a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191375 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: Remove CONFIG_FPUDiana Z2020-05-141-1/+0
| | | | | | | | | | | | | | FPU no longer needed with charger using integer math to convert Vbus into a voltage. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I77fd210ad60c051f2632083215d4f10dc074c4c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191373 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* kakadu: modify charger and gauge parameter to reduce charging timeScott Chao2020-05-141-2/+2
| | | | | | | | | | | | | | | After power team experiment, change those parameter can reduce charging time. BUG=b:156398259 BRANCH=kukui TEST=make -j BOARD=kakadu TEST=make buildall Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Change-Id: I636ac4608e7af4afcc8d1adbadeead75d3e6c3b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2198815 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* asurada: enable C0/C1 USBPDEric Yilun Lin2020-05-145-8/+135
| | | | | | | | | | | | | | | | | | This CL enable it81202 on-chip TCPC at C0 and C1 port. The functionality is not completed yet (TODO: PPC). C0: on the main board. C1: on the subboard. BRANCH=master BUG=b:152562604 TEST=ensure C0 and C1 can do PD-comm (SNK and SRC) Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Change-Id: Ia8a2e557fd376a05f422bc1139abfd78be0c2b58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192466 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ayo Wu <ayowu@google.com>
* puff: Determine BJ power based on fw config.Sam McNally2020-05-142-13/+34
| | | | | | | | | | | BUG=b:154657629 TEST=make buildall -j; chgsup reports current according to fw config BRANCH=none Change-Id: Ieea86484ee49e056c368a6e764a217958bae3835 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2198816 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* volteer: Enable EFS2Daisuke Nojiri2020-05-141-0/+2
| | | | | | | | | | | | | | This patch enables EFS2 for volteer. BUG=b:152998236 BRANCH=none TEST=Verify system boots and software sync works. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I7af9f0c5abbda4fea613d39c1981f5995acf76b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196955 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* endeavour: add pse initJeff Chase2020-05-144-2/+184
| | | | | | | | | | | | | | | | Endeavour has an onboard PoE PSE controller. This change initializes the controller and sets per port maximum power. BRANCH=none BUG=b:155863756 TEST=build + boot, various pse commands Change-Id: I1505917f6fac8a569f40102162b0d036e8079a36 Signed-off-by: Jeff Chase <jnchase@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189562 Reviewed-by: Joe Tessler <jrt@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* test: Add rollback unit testTom Hughes2020-05-134-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This test only runs on device and requires manual verification that a memory access violation occurred. Note that bloonchipper region 1 on dragonclaw fails as indicated in tests below. BRANCH=none BUG=b:155229277, b:151105339 TEST=Compile and flash bloonchipper on dragonclaw with region 0 "runtest" on console => Reboots with "Data access violation, mfar = 8020000" => PASS TEST=Compile and flash bloonchipper on dragonclaw with region 1 "runtest" on console => Memory is successfully read => FAIL TEST=Compile and flash dartmonkey on dragontalon with region 0 "runtest" on console => Reboots with "Data access violation, mfar = 80c0000" => PASS TEST=Compile and flash dartmonkey on dragontalon with region 1 "runtest" on console => Reboots with "Data access violation, mfar = 80e0000" => PASS Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I3e9cc568a0b16c6091d96c4373798fe4de4ab65b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190829 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
* Zork: Use FW_CONFIG for IOEX_HDMI_CONN_HPD_3V3_DB.Edward Hill2020-05-128-0/+48
| | | | | | | | | | | | | | | | Use FW_CONFIG to only enable IOEX_HDMI_CONN_HPD_3V3_DB interrupt when appropriate. BUG=b:156046102 BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ib12943e6ebbbd9af9c46ac548921aea5eb96f504 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195187 Reviewed-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Zork: Use FW_CONFIG for IOEX_MST_HPD_OUT.Edward Hill2020-05-127-1/+129
| | | | | | | | | | | | | | | | | Move mst_hpd_interrupt() out of variant_trembyle.c into individual boards. Use FW_CONFIG to only enable IOEX_MST_HPD_OUT interrupt when appropriate. BUG=b:156046102 BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I3f188088254208f01aea2094b7f2b57590b0d91b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195186 Reviewed-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* asurada: keep vbat voltage when not chargingTing Shen2020-05-121-1/+2
| | | | | | | | | | | | | | | | | | On asurada, Vbat is also used to supply power to the system. This CL keeps Vbat outputs 6V even if battery not present. Otherwise, Vbat will drop to VOLTAGE_MIN(~=2V) and causes system down. BUG=b:154303178 TEST=able to boot without battery BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I5daa7b6c377ab696b2cf2c84a07b7535d2c44dca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2179143 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* asurada: enable battery cut-offTing Shen2020-05-122-2/+3
| | | | | | | | | | | | | | | add CONFIG_BATTERY_CUT_OFF and set correct cut-off command BUG=b:150341271 TEST=`cutoff` command in ec-console works BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I757990df5b0c71e4d522c9bbf53ca900590b4fe9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164467 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* asurada: set uart_rx gpio to hi-zTing Shen2020-05-121-2/+2
| | | | | | | | | | | | | | | remove pull-down to save power BUG=b:154279402 TEST=flash ec over ccd BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I876e4b967bd15b4129dc6777c440ecb82dcb8119 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164466 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* strago: Disable Vivaldi keyboardAbe Levkoy2020-05-121-0/+1
| | | | | | | | | | | | | | | BUG=none TEST=make buildall BRANCH=none Strago predates Vivaldi and does not need custom top-row keys. This is just keep strago building at ToT; do not pick this onto a release branch. Change-Id: Ic1b769cee89150c5f13049c995754cc77f7e7651 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189961
* hatch: Remove the board keyscan_config definition and use the defaultWai-Hong Tam2020-05-1112-12/+0
| | | | | | | | | | | | | | | | | | | The keyscan_config is the same as the default. Don't define the board custom keyscan_config. For the board.h, most of them have duplicated definitions from the baseboard.h. Remove them by the script: $ grep -rl 'BASEBOARD:=hatch' * | cut -f1 -d/ | xargs -IX sed -i \ '/#define CONFIG_KEYBOARD_BOARD_CONFIG/d' X/board.h BRANCH=hatch BUG=b:156007029 TEST=Build all the hatches boards, no error. Change-Id: Ib02550708d533ced77f5fad05b074291b66dd4fc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194160 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* asurada: detect subboard typeEric Yilun Lin2020-05-113-3/+60
| | | | | | | | | | | | | | | | | There are two different subboard configurations on Asurada: 1. Type-C 2. HDMI and they can be distinguished by EC_X_GPIO3. BRANCH=master BUG=b:154565980 TEST=ensure Type-C subboard is detected. Change-Id: Ic7dfeaee8b0f6e84e1f2e598dc93deb773bee059 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2167124 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* asurada: configure hibernate wake source.Eric Yilun Lin2020-05-112-7/+9
| | | | | | | | | | | | | | We have three wake sources: power button, lid open, and ACOK. it81202 doesn't need EC_RST_ODL as a wake source. BRANCH=master BUG=b:150341271 TEST=test power button, lid open event can wake the system up. Change-Id: I4f919de661e9b2ee6caaf172f008cb608ea02b64 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2178693 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* damu: fix battery cutoffScott Chao2020-05-111-1/+1
| | | | | | | | | | | | | BUG=b:156209241 BRANCH=kukui TEST=make -j BOARD=damu TEST=make buildall TEST=ectool batterycutoff Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Change-Id: Ie2555d7f3254c193d9d76289f53b4833708c6c0f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2193252 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* casta: Configure number of PD ports basing on SKU IDPatryk Duda2020-05-111-0/+21
| | | | | | | | | | | | | | | | | | | | | Bluebird board contains only one Type-C port. This patch implements limiting number of available Type-C ports basing on SKU ID. Also obtaining SKU ID was implemented by fetching it from EEPROM, similarly to garg board. BUG=b:154602760 BRANCH=none TEST=Flash on bluebird, open EC console. Issue command 'typec 1 usb'. Command should fail with information that parameter 1 is invalid. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I20c8799b2ee687956d5fbfd4029aacfaa768fe07 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2187212 Reviewed-by: Jett Rink <jettrink@chromium.org>
* damu: modify lid accel to LIS2DWLScott Chao2020-05-112-9/+9
| | | | | | | | | | | | BUG=b:147689571 BRANCH=kukui TEST=make -j BOARD=damu TEST=make buildall Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Change-Id: I2e05202e062a16c9f746a13608c3d31d90148481 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190099 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* cometlake-discrete: create a S0->S3 fast pathPeter Marheine2020-05-112-12/+26
| | | | | | | | | | | | | | | | | Latency for powering off VCCIO needs to be lower than we can reliably achieve using the regular state machine. Add a fast path via a specialized interrupt to do the S0->S3 transition that should have lower latency (low enough to satisfy the relevant timing requirements). BRANCH=None BUG=b:155672968 TEST=Verified shutdown_s0_rails() runs on S3 interrupt with low latency, measured timing is now in spec. Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I2753d3490bbefc8f6fccba6cc90e808c969e53b1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182109 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* volteer: set H1 packet mode GPIO lowKeith Short2020-05-094-11/+9
| | | | | | | | | | | | | | | | | | GPIO75 on board version 1 is used for H1 packet mode and must be initialized low. This change disables the VOLUME_UP button on board version 0. BUG=b:156117916 BRANCH=none TEST=make buildall TEST=verify EC console is not read only. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I58d70e833027a9bdb8d4f2463567820c2de1b590 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191295 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: rename kpbs to kbps for i2cJett Rink2020-05-091-1/+1
| | | | | | | | | | | | | | | This changes follows the hdctool change for c2d2 that ensures either kpbs or kbps on the console output will work (CL:2161642) BRANCH=servo BUG=none TEST=builds Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I57e1638a4e8c9a61d58705c70d4d24c7b65e48bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191132 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* mt8192: add MediaTek MT8192 power sequencing supportEric Yilun Lin2020-05-084-15/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add power sequencing for asurada rev0 board. Craft mt8192 PS from mt8183. Mostly are the same, except that MT8192 doesn't use EC reset as AP reset. BRANCH=none BUG=b:150341779 TEST=TEST=Tried the following cases: * Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control pwr_button:press sleep:0.2 pwr_button:release Result: G3 -> S0 * Console command: apreset Result: S0, AP reboots * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 Change-Id: Ib8ac1ed700fc0a46fe8a1e6e40e1fefa3401d3c0 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2120114 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Rename CONFIG_ macros to CONF_*Daisuke Nojiri2020-05-081-22/+22
| | | | | | | | | | | | | | | | | CONFIG_ name space is reserved for configuration macros, which all live in config.h. This patch renames the regular macros, which happened to be prefixed with CONFIG_, to avoid the presubmit errors. BUG=b/155996358 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ic87a23a34c7d36d65f210dd51fed109443ef71ce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189174 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Remove unused CONFIG macrosDaisuke Nojiri2020-05-081-1/+0
| | | | | | | | | | | | | | CONFIG_GPU, CONFIG_USB_SM_FRAMEWORK, CONFIG_BOARD_HAS_AFTER_RSMRST are no longer used. This patch removes them. BUG=b/155996358 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ia407850398c07b7cdb01cddb0288ae977b9dca82 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189171 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* servo_v4: Add console commands to override the HPD pass-throughWai-Hong Tam2020-05-084-13/+68
| | | | | | | | | | | | | | | | | New console commands, like: > usbc_action dp hpd ext # use the external HPD, no overridden > usbc_action dp hpd h # override HPD to high, IRQ pass-through > usbc_action dp hpd l # override HPD to low, no IRQ pass-through > usbc_action dp hpd irq # send HPD IRQ BRANCH=servo BUG=b:153647984 TEST=Tried the new console commands. Change-Id: I197efd1d03d906b99d7b82ad151865da44e321ea Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2143937 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* servo_v4: Introduce console commands to config DP alt-modeWai-Hong Tam2020-05-082-40/+144
| | | | | | | | | | | | | | | | | | | | | New console commands, like: > usbc_action dp disable # disable DP alt-mode > usbc_action dp enable # enable DP alt-mode > usbc_action dp pins cde # support pin assignments C, D, and E > usbc_action dp pins cd # support pin assignments C and D > usbc_action dp pins d # support pin assignment D > usbc_action dp mf 1 # enable multi-function preference > usbc_action dp plug 1 # it is a plug > usbc_action dp plug 0 # it is a receptacle BRANCH=servo BUG=b:153647984 TEST=Tried the new console commands. Change-Id: I36744e772999f67f10189bc80dcec9f2b37123c2 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2143936 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Mushu : correct battery parameter config.loganliao2020-05-082-20/+19
| | | | | | | | | | | | | | | | This patch modify the battery parameter to meet the battery function. BUG=b:154198760 BRANCH=none TEST=ship mode function works fine. Change-Id: Ibb4aa278c80e4bf61756f0af3cf1ca985d6dd88e Signed-off-by: loganliao <Logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2154312 Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: Bob Moragues <moragues@chromium.org> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Commit-Queue: Bob Moragues <moragues@chromium.org>
* Trembyle: Add EN_PWR_TOUCHPAD_PS2 GPIOEdward Hill2020-05-081-0/+1
| | | | | | | | | | | | | Allow reading EN_PWR_TOUCHPAD_PS2 for debugging. BUG=b:154676993 BRANCH=none TEST=gpioget EN_PWR_TOUCHPAD_PS2 Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ifbde03181879289bc0433dc81d0282a3b109ee2f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2188115 Reviewed-by: Martin Roth <martinroth@google.com>
* rt946x: remove usb_charger_set_switches from board.hTing Shen2020-05-075-26/+0
| | | | | | | | | | | | | | | | | | | Since all rt946x users do not customize usb_charger_set_switches(), move this function into rt946x.c for the upcoming bc12 driver refactor. A board can customize this function using the new bc12_drv if needed. BUG=b:155611686 TEST=make buildall BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I8724af15c3508b54dc131a7c99004f3f4b2f893f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2187079 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@chromium.org>
* damu: update LED GPIO pinsScott Chao2020-05-071-1/+1
| | | | | | | | | | | | | BUG=b:147163799 BRANCH=kukui TEST=make -j BOARD=damu TEST=make buildall TEST=LED on damu work as expected. Change-Id: Ie0d6a4b968cf6d186f420cda19ebe2ac9456c47c Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182112 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* Mushu: Enable TCPMv2Shelley Chen2020-05-071-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Transitioning Mushu to TCPMv2. Mushu needs some features that are only going to be available on the new stack. We need to still use PD 2.0 because we have a parade TCPC however, which is not compatible with the PD 3.0 spec. BUG=b:155118660 BRANCH=None TEST=flash onto mushu board Plug in charger. See the following output, which verified that we are using the new stack: 2020-05-05 14:59:06 [269.461931 C1: Attached.SNK] 2020-05-05 14:59:06 [269.471130 C1: PE_SNK_Startup] 2020-05-05 14:59:06 [269.473331 VBUS p1 1] 2020-05-05 14:59:06 [269.474353 C1: PE_SNK_Discovery] 2020-05-05 14:59:06 [269.476796 New charge port: C1] 2020-05-05 14:59:06 [269.482324 C1: PE_SNK_Wait_for_Capabilities] 2020-05-05 14:59:06 bq25710: no battery, skip ICO enable 2020-05-05 14:59:06 [269.486195 CL: p1 s1 i3000 v5000] 2020-05-05 14:59:06 [269.556396 AC on] 2020-05-05 14:59:06 [269.577137 C1: PE_SNK_Evaluate_Capability] 2020-05-05 14:59:06 [269.577801 C1: PE_SNK_Select_Capability] 2020-05-05 14:59:06 C1 Req [4] 15000mV 3000mA Signed-off-by: Shelley Chen <shchen@google.com> Change-Id: I796c8de9a7f7f4d9f5c139fbe0fd09cd64f933dc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182043 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Commit-Queue: Shelley Chen <shchen@chromium.org> Tested-by: Shelley Chen <shchen@chromium.org>
* Zork: Enable EFS2Daisuke Nojiri2020-05-065-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EFS v.1 allowed Chromeboxes to verify RW without AP. EFS v.2 will bring the benefits to Chromebooks, which are: - Immediate boot on deeply discharged battery. - Faster charge in S5/G3. - Reduce RO dependency. Allow more code to be updated by AU. - Remove jumptag and workarounds needed for late sysjump. - Can support recovery mode regardless of battery condition. Major improvements over v.1 are: - No A/B slot required. - No signature in RW or public key in RO. - Rollback-attack protection. - Verifies only used part of RW (instead of whole RW section) EC-Cr50 communication is based on the shared UART (go/ec-cr50-comm). EFS2 is documented in go/ec-efs2. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/146393197 BRANCH=none TEST=Verify Trembyle boots and sync EC RW. AP FW: 13066.0.0 Cr50 FW: 0.6.1 Change-Id: Ib3c5b23817938ccd3a90c90cede8aeea26b37e45 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171575 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* malefor: enable lid anglexiong.huang2020-05-062-8/+33
| | | | | | | | | | | | | | | | Enable lid angle function to make peripherals get correct state on convertible SKUs. BUG=b:152434719 BRANCH=none TEST=boot malefor, test keyboard function when hinge is at 135, 180, 270, 360 degree when set bit #4 of CBI fw_config. No sensor data when clear bit #4 of CBI fw_config. Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: I83797a4d4a16b2c2903ac7c6d9cc5597a9855ac0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2156685 Reviewed-by: Keith Short <keithshort@chromium.org>
* Bloonchipper: Change console from uart1 to uart2Bhanu Prakash Maiya2020-05-062-8/+8
| | | | | | | | | | | | | | | | | | Bloonchipper uses both uart ports on STM32. Debug console should now work on uart2 which is connected to servo connector. BRANCH=none BUG=b:147849609 TEST=Access console on uart2. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Change-Id: I26b7989051404224f9bf608ce02d35af2bb566f1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2133589 Reviewed-by: Craig Hesling <hesling@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Tested-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Commit-Queue: Tom Hughes <tomhughes@chromium.org>
* Jinlon: Choose a keyboard layout even for bad SKU IDRajat Jain2020-05-061-2/+3
| | | | | | | | | | | | | | | If SKU ID is not programmed, lets still choose a default keyboard layout so that most of the keys continue to work. BUG=b:146501925 TEST=Build BRANCH=firmware-hatch-12672.B Signed-off-by: Rajat Jain <rajatja@google.com> Change-Id: I1164699f5ef11700130a8f05255030f8417ab718 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182037 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* nocturne: Enable TCPMv2Patryk Duda2020-05-051-2/+10
| | | | | | | | | | | | | | This patch enables support for TCPMv2 for nocturne board. CONFIG_USB_PID value was added too. All PD related defines were sorted alphabetically. BUG=none BRANCH=none TEST=Deploy on nocturne. Check if TCPMv2/PD3.0 works properly Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ic108cffd89fd73de1e36c7b853c6ec1e0252f140 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160877 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* nocturne: Set ps8xxx as TCPC driver instead of generic tcpciPatryk Duda2020-05-051-2/+2
| | | | | | | | | | | | | | | | Generic tcpci driver doesn't obtain firmware version properly, because it is device specific. PS8xxx driver also performs additional operations that is necessary for chip to operate correctly. BUG=none BRANCH=none TEST=Deploy on nocturne. Check if charging works. Attach some device and check if it works. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I9dd87131e324c29553f8c1624974d9dd5cd9b61d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160876 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* CHERRY-PICK: nocturne: MKBP_WAKE_MASK: Set switch event as wake mask.Ravi Chandra Sadineni2020-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | GOOG000B(hid-google-whiskers.c() enumerates the input device. It depends on MKBP events to identify tablet mode switch. Not setting EC_MKBP_EVENT_SWITCH as part of MKBP wake mask means mkbp_event.c will drop switch events that happen during suspend (even when they are the reason for wake). Thus let us set EC_MKBP_EVENT_SWITCH as part of MKBP_WAKE_MASK. BUG=b:140292867 Test=Deploy on nocturne and make sure base attach and detach trigger full resume. Signed-off-by: Ravi Chandra Sadineni <ravisadineni@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1797065 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Change-Id: I5c92093263182b8bebaf1dc49bee3dc39f4b054a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160875 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* CHERRY-PICK: nocturne: Use avg pin value for disconnection.Aseda Aboagye2020-05-051-12/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, the base detection state machine would monitor the detach pins for determining when the base appeared to be detached. However, sometimes the voltage sensed on that pin would be lower than the detach threshold for 1-2 readings after debouncing. This would lead to a brief detach and reattach event. This commit changes the debouncing logic to the following: * Assume the base is attached. * If a reading is sensed where the detach pin is less than the set threshold, start debouncing and collect samples at a much more rapid rate. * Set a deadline in the future when we'll make our decision. * Once the deadline has expired, take an average of the last 5 samples and see if it's beneath our threshold or not. If it's beneath the threshold, we assume the base to be disconnected, otherwise it's still connected. BUG=b:118213312 BRANCH=firmware-nocturne-10984.B TEST=Flash nocturne; attach whiskers, verify that whiskers doesn't appear to briefly detach. TEST=Apply base power with whiskers disconnected. Wait until nocturne enters base attach state, verify that it transitions to the detach state very quickly. TEST=Attach and detach whiskers; verify that the detach is recognized quickly. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1300614 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Change-Id: Ibd2aa911c95d8701962867ed8988d9aa1d70f9fa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160872 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* CHERRY-PICK: Nocturne: Remove VR decay for V1.00A power railRoy Mingi Park2020-05-051-18/+0
| | | | | | | | | | | | | | | | | | | | | | | This patches removes the VR decay for V1.00A power rail when system enters low power mode. According to PAG #543977, V1.00A power has tolerance from -6.7% to 5% but it doesn't support LPM like VccPRIM_CORE which could down to 0.75v in low power mode. BUG=b:116180071 BRANCH=Nocturne TEST=Measure V1.00A power rail when system is in S0iX and ensure it keeps at 1.0v Signed-off-by: Roy Mingi Park <roy.mingi.park@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/1291950 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Puthikorn Voravootivat <puthik@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Change-Id: Iefbf86c8d71794277ee6e7ae4bdca81617cd03fc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160871 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* CHERRY-PICK: nocturne: Add internal pull-ups to unused strap pinsDivya Sasidharan2020-05-051-0/+4
| | | | | | | | | | | | | | | | | | | | This change prevents leakage current on strap pins and saves around 1mW on nocturne. BUG=b:117139495 BRANCH=firmware-nocturne-10984.B TEST=On Nocturne, saved EC power by 1mW Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/1275136 Reviewed-by: Roy Mingi Park <roy.mingi.park@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Roy Mingi Park <roy.mingi.park@intel.com> Tested-by: Roy Mingi Park <roy.mingi.park@intel.com> Change-Id: I419402fa67e2497c25dad974b9e3d5a5984681bb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160870 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* CHERRY-PICK: nocturne : Add logging for base detect voltages.Aseda Aboagye2020-05-051-0/+4
| | | | | | | | | | | | | | | | | | | | | It's kind of handy to know what the voltage was when we decided to change major states. BUG=None BRANCH=firmware-nocturne-10984.B TEST=Flash nocturne; attach and detach base and verify voltages are printed when the state changes. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1295297 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Change-Id: I27ed42f46344c712171d05c11f36ae2f949040f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160868 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* CHERRY-PICK: nocturne: Add internal pull-downs to unused NVME pinsRoy Mingi Park2020-05-052-11/+3
| | | | | | | | | | | | | | | | | | | This change prevents leakage current on NVME pins and saves around ~0.33mW on nocturne. BRANCH=nocturne BUG=b:117139495 TEST=Check npcx EC power to see power improvement Signed-off-by: Roy Mingi Park <roy.mingi.park@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/1275126 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Change-Id: I546dd7100698181ea1549752565fb2f01cff0289 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160867 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* CHERRY-PICK: nocturne: Set I2C5 to 1.8V if possible.Puthikorn Voravootivat2020-05-051-3/+3
| | | | | | | | | | | | | | | | | We shouldn't make GPIO pins stay at 3.3V mode when we can use 1.8V mode to lower power consumption. BUG=b:117139495, b:112037915 TEST=Lower power in S0ix. ALS works fine. Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/1257660 Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Change-Id: I87d07c8b0d6d8714c0d257b5ba234518b41ffd9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2160865 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
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