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* kukui: Enable TCPC low power mode.Yilun Lin2018-11-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | BUG=b:113641776 BRANCH=None TEST=make BOARD=kukui -j TEST=Test plug/unplug pd charger that can do pd negiotiate. TEST=Test plug/unplug peripheral that can sink power. TEST=apshutdown; sleep 10 && dut-control -t 3 ppvar_batt_ma ppvar_sys_ma @@ NAME COUNT AVERAGE STDDEV MAX MIN @@ sample_msecs 1030 2.90 0.13 4.57 2.55 @@ ppvar_batt_ma 1030 14.05 0.52 22.00 14.00 @@ ppvar_sys_ma 1030 14.00 0.22 18.00 12.00 Check the difference of ppvar_batt_ma and ppvar_sys_ma is within 0.1 ma. That is, battery does not provide more power than the system required. Change-Id: I425fbb02f5698ea48c2f0160552026cdd1a0fab4 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1297097 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Tony Lin <tonycwlin@google.com> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Apel: add battery configurationJames_Chao2018-11-072-0/+28
| | | | | | | | | | | | | | | | BUG=b:115502621 BRANCH=master TEST=Build success now. Check the battery is working after we got proto board and battery. Change-Id: Id207d807439b16474ebcf9567bcaa1e9ccd83c20 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1312516 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* bobba: enable sensors sync via dedicated IRQ pinEnrico Granata2018-11-072-3/+2
| | | | | | | | | | | | | | | | | | | | This commit sets up the EC on bobba to send AP sync for sensor events via a dedicated GPIO pin (EC_INT_L) instead of the ACPI notifier chain. This is done in the interest of optimizing the performance of the sensor ring running on the AP. BRANCH=none BUG=b:118443377, crbug:896347 TEST=observe sensor events come in on Linux, and watch /proc/interrupts to see chromeos-ec IRQ count go up CQ-DEPEND=CL:1318068 Change-Id: I4d8cd089691f39f8617b1613d618e6f273d5f1fc Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1298699 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: enable ITE CCD programmingVadim Bendebury2018-11-053-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | This patch enables support of ITE EC programming by Cr50. ITE EC sync sequence generator implementation is being added to the image, I2C RX and TX queue sizes are increased to be able to accommodate messages sent during programming session. Board level callback function is provided to request ITE SYNC sequence generation on the next boot, and to reset the H1 with a 10 ms delay, necessary for CCD host USB communications to quiesce. Board startup code is modified to when requested invoke function generating ITE SYNC sequence early in the boot before jitter configuration is locked. BRANCH=cr50, cr50-mp BUG=b:75976718 TEST=with the rest of the patches applied verified that it is possible to disable and re-enable clock jitter at run time. Change-Id: I88367b200ceb5b62613f96061d565faa56f4d75a Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1263898 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* cheza: Correct the PSYS ADC multiplierWai-Hong Tam2018-11-021-3/+3
| | | | | | | | | | | | | | | | | | | The resistor on the PSYS output is actually 5.6K Ohm, instead of 12.4K Ohm. Correct the ADC multiplier to reflect the impedance value. The worst-case anaylsis: ADC multipler: 2816 * 124000 * 2 / (1023 + 1) = 682000 max ADC register value: 1023 (10-bit) upper bound: 1023 * 682000 < 2^30 BRANCH=none BUG=b:118343126 TEST=Checked the "adc" console command. Change-Id: I6c96c60f08c6f50b53fd69d3aa0ee8f86c069545 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1309049 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Kalista: Modify gpio settingsTino Liu2018-11-021-8/+13
| | | | | | | | | | | | | | | | | | | | | | | GPIO67: PP3300_USB_PD_EN should be output high initially. GPIOC2: BOARD_VERSION2 -> SPKR5 (no function) GPIOB1: USB5_ENABLE -> TP48 GPIOC3: AC_JACK_CHARGE -> TP52 GPIO44: TYPE_C_87W -> TP120 GPIO33: TYPE_C_60W -> TP121 GPIOC5: ADP_IN -> TP123 GPIO66: TP249 -> TP127 GPIOC4: BOARD_VERSION1 -> TP128 GPIO01: BOARD_VERSION3 -> TP129 BUG=b:111571989 BRANCH=none TEST=make buildall pass, Kalista can boot Change-Id: I0661eecfc24061462e86e1b7e5b379ec10b1e472 Signed-off-by: Tino Liu <tino.liu@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1309559 Commit-Ready: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cr50: Rename tpm_nvmem_read to tpm_nvmem_opsLouis Collard2018-11-024-6/+6
| | | | | | | | | | | | | A future CL will add non-read operations. TEST=build BRANCH=none BUG=b:112604850 Change-Id: Ie024e30b81dff888dcb42adcd4e3b2daded2f4f7 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1312517 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* kukui: Enable gauge_interrupt.Yilun Lin2018-11-013-4/+31
| | | | | | | | | | | | | | | | | | | Kukui has a pin out from battery pack to MAX17055 to sense battery temperature. If the temp is over the limit, MAX17055 sends alert to trigger charger task in time to prevent a damaged battery. TEST=manually set temperature upper limit to 30 Celcius degree, and see that when the battery temperature reaches 30 C, GAUGE_INT_ODL is asserted, and charger_task is woken up. BUG=b:111378620 BRANCH=None Change-Id: Id0718e210c8082bb280c62545a5ec75b3db8c6c2 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1270403 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Bobba: Modify base accel/gyro rotation for SKU with AR Cam.Tino Liu2018-11-011-0/+28
| | | | | | | | | | | | | | | | | Sparky360 with SKU ID 26 has AR Cam, and move base accel/gryo to AR Cam board. AR Cam board has about -16 bias with motherboard through Y axis. Modify base accel/gyro rotation reference for SKU with AR Cam. BUG=b:118646061 BRANCH=none TEST=compile pass, `ectool motionsense lid_angle` shows correct, factory testing ScreenRotation & TabletRotationBaseAccel test passed Change-Id: Ie2c2d2faa9cd562f5807eb31b1fc92f3fc792e74 Signed-off-by: Tino Liu <tino.liu@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1304156 Reviewed-by: Diana Z <dzigterman@chromium.org>
* rammus: Correct accel sensor BMI160 base reference dependent on sensor location.michael_chen2018-10-311-2/+2
| | | | | | | | | | | | | | | | | | | | Base on BMI160 location, the x axis is positive correlation and the y, z axis negative correlation. Correct the MB base reference direction. BUG=b:118362153 BRANCH=ToT TEST=Manual 1. Using EC console command "accelinfo on" the check the Base Accel x, y, z value. 2. Run factory tool to verify. Change-Id: I5c7968e9294b2fca511808d30aad3a99d524643f Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/1307273 Commit-Ready: michael chen <michael5_chen@pegatroncorp.com> Tested-by: michael chen <michael5_chen@pegatroncorp.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* meep: fix sensor data and accel orientationDevin Lu2018-10-311-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix the lid and base accel orientation for EVT and change range value to 2g. BUG=none BRANCH=none TEST=When device is laying on a table, lid angle at 180, both sensors report gravity along Z axis: ectool motionsense Motion sensing active Sensor 0: 507 606 16748 Sensor 1: 17 -334 16442 Sensor 2: 0 0 0 Sensor 3: 0 0 0 When on the base bottom edge, report gravity along Y axis: ectool motionsense Motion sensing active Sensor 0: 403 16491 655 Sensor 1: 19 16163 1540 Sensor 2: 0 0 0 Sensor 3: 0 0 0 When on its left side, report gravity along X axis: ectool motionsense Motion sensing active Sensor 0: 16172 -374 1738 Sensor 1: 16315 -184 1280 Sensor 2: 0 0 0 Sensor 3: 0 0 0 and check the screen rotation was normally. Change-Id: Ic594c12fa4b03b594151eed4ffb0f0e5b42cad3d Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1307282 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* meep: enable keyboard factory scanningDevin Lu2018-10-312-0/+25
| | | | | | | | | | | | | This patch add for factory keyboard connector test. BUG=none BRANCH=none TEST=Short keyboard pins and make sure "ectool kbfactorytest" works. Change-Id: Ic343b99343f5f6d7a8967bf1c4bec642638d8568 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1309572 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Ampton: add initial motion sensor codeDiana Z2018-10-313-3/+183
| | | | | | | | | | | | | | | | Adds initial motion sensor code for ampton and apel, based on the code for similar boards. Sensors will only be present on ampton SKUs (currently numbered 1 and 2). BRANCH=None BUG=b:115501243 TEST=builds Change-Id: I61de2ec824df27b2944dd291c0e3bdbdae13a04b Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1310094 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Nami: Add keymasks for page-up/down, home, end, deleteDaisuke Nojiri2018-10-311-21/+24
| | | | | | | | | | | | | | Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:117126568 BRANCH=none TEST=Verified all keys on keypad work as expected. Change-Id: If23b422c1260b8437c59fd13a9280e8d6e87f94b Reviewed-on: https://chromium-review.googlesource.com/1311374 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cheza: Remove the internal PU for UART pinsWai-Hong Tam2018-10-311-1/+1
| | | | | | | | | | | | | | | | | | It is not needed; otherwise, it pulls the UART_DB_TX_EC_RX to 1.8V and and may affect cr50 servo detection. BRANCH=none BUG=b:117296184 TEST=Measured the voltage level of UART_DBG_TX_EC_RX. When servo plugged and CCD unplugged, it shows 3.3V. When servo unplugged and CCD unplugged, it shows 0V (was 1.8V). When servo unplugged and CCD plugged, it shows 3.3V. EC console works over either servo and CCD. Change-Id: Ie81d1de0075ea1b2409131471fe8571b5bfdccd1 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1302839 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* cheza: Update battery infoWai-Hong Tam2018-10-311-3/+2
| | | | | | | | | | | | | The min voltage is 6V according to the spec. BRANCH=none BUG=b:74397611 TEST=Tested charge and discharge. Change-Id: Icf82e7299dbe3175c5b4dbe824108f11888c2ff5 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1299713 Reviewed-by: Philip Chen <philipchen@chromium.org>
* cheza: Add internal PU for GPIO USB_C1_OC_ODLWai-Hong Tam2018-10-311-1/+1
| | | | | | | | | | | | | This is an open-drain output from NX5P3290. Need an internal PU in EC. BRANCH=none BUG=b:118342484 TEST=Ran EC command "gpioget USB_C1_OC_ODL" and checked it high. Change-Id: I1e38b9c64a163740c65256fbf551ac28feaade49 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1298368 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Delan: LED Color Changekoko2018-10-313-14/+14
| | | | | | | | | | | | | | | Changing Delan led color from blue to white BUG=b:118418060 BRANCH=none TEST=none Change-Id: I41dbf9df8798c2fd69b328eed690fe43167654d0 Signed-off-by: koko <ko_ko@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1304157 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* cheza: Configure GPIO RCAM_VSYNC to operate at 1.8VWai-Hong Tam2018-10-311-1/+1
| | | | | | | | | | | | | | This GPIO is connected to 1.8V devices (AP GPIO and camera connector). BRANCH=none BUG=b:118342270 TEST=Checked the schematic. Can't verify on real hardware, camera stack not ready yet. Change-Id: Ic3a61e680d0982b956d986505c5f2d44fe270131 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1298367 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* cheza: Remove the unnecessary GPIO_SEL_1P8V flagsWai-Hong Tam2018-10-311-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | The GPIOs which are powered by VHIF/VSPI are already operating at 1.8V. Don't need to configure them. Powered by VHIF: GPIO54: POWER_GOOD GPIO53: SHI_CS_L GPIO57: AP_SUSPEND_L Powered by VSPI: GPIOA0: USB_C0_PD_INT_ODL GPIOA2: EC_INT_L BRANCH=none BUG=b:118336977 TEST=Verified AP power-on and power-off sequence, host command, port-0 plug and unplug for PD communication. Change-Id: I6369a6d8d343e4d8d5c33fef0f971e5cb09622ec Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1298366 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* kukui/emmc: Share EXTI15 interrupt between SPI and eMMCNicolas Boichat2018-10-302-33/+48
| | | | | | | | | | | | | | | | | | | | | | | | We never need to have interrupts enabled on both SPI1_NSS and EMMC_CMD, so we can actually share the interrupt selection EXTI15 between the 2 pins. This frees up PA14 (and EXTI14) for future interrupt needs. To make sure that we can answer host commands as soon as the AP as booted, we quickly poll for the eMMC bootblock switch to turn away from EC, and switch interrupt from eMMC to SPI. Also, we clear exit_events in chip/stm32/gpio.c, so that we do not report a override warning if we disable then re-enable another interrupt on the same EXTI. BRANCH=none BUG=b:113370127 TEST=Boot kukui rev1, check that EC commands works after boot Change-Id: Ib1f0a56a9f37e1bda01dc4e6b55734196bb3ff50 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1195345 Reviewed-by: Yilun Lin <yllin@chromium.org>
* octopus: update active_mask for consistencyJett Rink2018-10-304-13/+13
| | | | | | | | | | | | | | | | | The base gyro and base accel are the same chip and they are on in S3 and S0 and off in S5. Update the active_make for all other octopus boards that haven't already updated it. BRANCH=none BUG=none TEST=build and sensors still work. Change-Id: I96004ba0b20dd9366848bb2fe610c250e07850aa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1302833 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Kalista: Update baseboard directoryDaisuke Nojiri2018-10-301-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates Kalista as follows: - Update BJ adapter list and current limit handling - Remove unused code (mostly for Proto Fizz) - Remove unused fan configurations - Change CBI field sizes (board version:1, OEM:1, SKU:4) - Update I2C port map: charger -> backlight - Simplify board_set_active_charge_port This patch updates GPIO list as follows: - Use GPIO34 for current limit control (and remove 33 and 34) - Remove ADP_IN_L (Power source is only BJ) - Remove AC_JACK_CHARGE (Power source is only BJ) Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:111571989 BRANCH=none TEST=build karma Change-Id: I2af208df28d6e7b3472eeb8929d055b93b661af8 Reviewed-on: https://chromium-review.googlesource.com/1298318 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* dptf: Get rid of CONFIG_DPTF_DEVICE_ORIENTATIONFurquan Shaikh2018-10-309-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DPTF_DEVICE_ORIENTATION was added to indicate mode change to the host to allow it to read the tablet mode flag from shared EC memory and select the right DPTF table to load (if supported). However, this config seems unnecessary because of the following reasons: 1. Host sets SCI mask to indicate to the EC which events it wants to process. Thus, even if the EC sets mode change flag, it will not be notified to the host unless it supports mode change event. 2. Additionally, if host supports mode change event, but does not support multiple DPTF tables, then EC ACPI code takes care of ensuring that there is a thermal event handler present to reload tables. 3. CONFIG_DPTF_DEVICE_ORIENTATION was defined for almost all new x86 boards. BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Ic4097ae047e2d559673a321da4df86514f902993 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1292359 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Liara: Update battery manufacture nameRuby Lee2018-10-301-3/+3
| | | | | | | | | | | | | | | | | | | The battery manufacture name contain improper character, update it with renew battery firmware. BUG=b:113823864,b:117629139 BRANCH=none TEST=Check found batt message via EC console in the beginning of EC reset Change-Id: I7bedfa6086222ccf95e9ce166dbd11a27023e3b7 Signed-off-by: Ruby Lee <ruby_lee@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1297869 Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Raymond Chou <raymond_chou@compal.corp-partner.google.com> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
* cheza: Monitor the WARM_RESET_L signal to hold APWai-Hong Tam2018-10-303-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is a backup solution if JTAG_SRST gets fused out. The WARM_RESET_L signal is wired to JTAG_SRST, such that we can hold AP when servo/H1 programs the AP SPI flash. But when JTAG_SRST gets fused out (just in case it happens), still have a way to hold AP, i.e. overdriving the AP_RST_L and PS_HOLD signals. The WARM_RESET_L signal is pulled by a rail from PMIC, the same as POWER_GOOD. The drop of WARM_RESET_L may be caused by either servo/ cr50 holds the signal or its pull-up rail drops. We should handle both cases. Also add WARM_RESET_L as one of the power signals for debug purpose. BRANCH=none BUG=b:78194018, b:112723105, b:112564635 TEST=Ran "dut-control warm_reset:on" and "dut-control warm_reset:off". Scoped the signal of AP_RST_L and PS_HOLD to verify the correctness. Verified AP hold and back booting up. TEST=Changed to the gpio.inc to swap LID_OPEN and WARM_RESET_L and ran "dut-control lid_open:no" and "dut-control lid_open:yes" to emualte the case JTAG_SRST gets fused out. Scoped the signal correctness. Verified AP hold and back booting up. Ran flashrom to program AP SPI flash through servo. Change-Id: I71ebd920171da9994192f7742675feb7cb39ce2f Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1234743
* kukui: Enable CONFIG_CMD_AP_RESET_LOGNicolas Boichat2018-10-291-0/+1
| | | | | | | | | | | | | | | | Will be useful to understand cause of last reboot. BRANCH=none BUG=b:109900671 TEST=Trigger watchdog (test-wd), ectool uptimeinfo: EC reset flags at last EC boot: reset-pin | ap-watchdog TEST=Trigger normal reboot, ectool uptimeinfo: EC reset flags at last EC boot: reset-pin Change-Id: If739c8b0ff23be9ea21168c51599458abebf9dd7 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1295891 Reviewed-by: Jett Rink <jettrink@chromium.org>
* delan: Use CBI EEPROM for board version and SKU IDEdward Hill2018-10-281-0/+7
| | | | | | | | | | | | | | Use board version and SKU ID from CBI EEPROM on Delan if the SKU ID set via resistors + ADC is not valid. BUG=b:76018320 BRANCH=grunt TEST=Read CBI values from EEPROM Change-Id: Ie37336934bd6687e46ad6ae62bc1b2e12355c83c Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1301933 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* Kalista: Create baseboard directoryDaisuke Nojiri2018-10-275-0/+209
| | | | | | | | | | | | | | | | | | | This patch creates a baseboard directory for Kalista, derived from Fizz. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:116764443 BRANCH=none TEST=make BOARD=karma Change-Id: Ib8c9dfd56658fd8b6bd39a0a01e22a05dbed477b Reviewed-on: https://chromium-review.googlesource.com/1298319 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: David Huang <David.Huang@quantatw.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Vincent Wang <vwang@chromium.org>
* Add nami_fp configurationNicolas Norvez2018-10-261-0/+1
| | | | | | | | | | | | | | Just an alias for now. BRANCH=nocturne BUG=b:117297043 TEST=make BOARD=nami_fp -j Change-Id: I92685ba23782e120f88a41bbf31adce082e95af5 Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1300375 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Shelley Chen <shchen@chromium.org>
* atlas_ish: initial board files for atlas_ishli feng2018-10-265-0/+162
| | | | | | | | | | | | | | BUG=b:117807679 BRANCH=none TEST=build with BOARD=atlas_ish is successful Change-Id: Iddb9a8a5ced24e9b99753a876ec52b0062b80344 Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1003393 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Li1 Feng <li1.feng@intel.com>
* Bobba: support factory keyboard test.Ryan Zhang2018-10-252-0/+23
| | | | | | | | | | | | | | | | | | | | | | | connector-to-GPIO map: {-1, -1}, {0, 5}, {1, 1}, {1, 0}, {0, 6}, {0, 7}, {-1, -1}, {-1, -1}, {1, 4}, {1, 3}, {-1, -1}, {1, 6}, {1, 7}, {3, 1}, {2, 0}, {1, 5}, {2, 6}, {2, 7}, {2, 1}, {2, 4}, {2, 5}, {1, 2}, {2, 3},{2, 2}, {3, 0}, {-1, -1}, {0, 4}, {-1, -1}, {8, 2}, {-1, -1}, {-1, -1}, BUG=b:110011097 BRANCH=master TEST=`ectool kbfactorytest` PASS. Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Change-Id: I5da949ae73617c50382f0491c030d693f43b2676 Reviewed-on: https://chromium-review.googlesource.com/1297871 Commit-Ready: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* power/mt8183: Implement watchdog-initiated resetNicolas Boichat2018-10-252-26/+3
| | | | | | | | | | | | | | | | | | | | | | | | | AP watchdog line can fall in either of 2 cases: - AP asserts watchdog while the AP is on: this is a real AP-initiated reset. - EC asserted GPIO_AP_SYS_RST_L, so the AP is in reset and AP watchdog falls as well. This is _not_ a watchdog reset. We mask these cases by disabling the interrupt just before shutting down the AP, and re-enabling it before starting the AP. Also, take the opportunity to move warm reset code out of board file into generic MT8183 power code, as well as code to enable interrupts. BRANCH=none BUG=b:109900671 TEST=apshutdown => EC understand this is an EC-initiated shutdown TEST=Use test-wd from bug, see that EC detects it is a watchdog. Change-Id: I02037e5be0254fef991ae2459be35e4561e0994c Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1293132 Reviewed-by: Jett Rink <jettrink@chromium.org>
* rammus: V1.0A power rail should be in 1V during S0ixZhuohao Lee2018-10-251-18/+0
| | | | | | | | | | | | | | | Per b:116180071 discussion, the V1.0A power rail should keep at 1V during S0ix. This patch fixes the pmic setting to avoid the potential stability issue. BUG=b:116180071 BRANCH=master TEST=Measure the V1.0A power rail during S0ix Change-Id: Ic1d883d7d2427cdb2b8b871df17fbe701904e73e Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1282550 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Nami: Add keypad supportDaisuke Nojiri2018-10-242-1/+11
| | | | | | | | | | | | | | | | | | | With this patch, the EC will scan KSO13 and KSO14 to read keypad buttons. If SKU_ID doesn't have SKU_ID_MASK_KEYPAD bit, the column size will be set to the current value (=13). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:117126568 BRANCH=none TEST=Tested by shortening KSO13 and KSO14 to KSI5. Run buildall. Run emerge-nami chromeos-ec. Change-Id: I2e41f832d82b36dedea187ff6a794d7c82a8463f Reviewed-on: https://chromium-review.googlesource.com/1287149 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* atlas: Remove VR decay for V1.00A power railGaggery Tsai2018-10-241-18/+0
| | | | | | | | | | | | | | | | | | | This patches removes the VR decay for V1.00A power rail when system enters low power mode. According to PAG #543977, V1.00A power has tolerance from -6.7% to 5% but it doens't support LPM like VccPRIM_CORE which could down to 0.75v in low power mode. BUG=b:116180071 BRANCH=None TEST=Measure V1.00A power rail when system is in S0iX and ensure it keeps at 1.0v Change-Id: I68f035510141db7a674828037fcc2af49cc35860 Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1292731 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Caveh Jalali <caveh@google.com>
* bobba: Hookup the vsync pin and the sync driverHeng-Ruey Hsu2018-10-233-14/+34
| | | | | | | | | | | | | | | Hook up VSYNC the way other boards on ToT do. BUG=b:114915792,b:117962233 BRANCH=master TEST=builds. This prepares us for more HW testing Change-Id: I9e222443a8472f4b362eebebdcc387c46b9928d3 Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org> Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1253368 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Ampton: add battery configurationJames_Chao2018-10-232-3/+29
| | | | | | | | | | | | | | BUG=b:115502621 BRANCH=master TEST=Build success now. Check the battery is working after we got proto board. Change-Id: I5a3f14e118b474767ec885137448c776c215e0fa Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1267760 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* board/meep: Add magnetometer configKarthikeyan Ramasubramanian2018-10-192-1/+31
| | | | | | | | | | | | | | | Enable the required modules to support magnetometer module and add magnetometer configuration. BRANCH=none BUG=b:115587004 TEST=Collect magnetometer readings through ectool motionsense Change-Id: Ibe2b624716b3a9a1ffba93e0b1b7edf3b718b6f9 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1257505 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: implement the LED function to follow BipJames_Chao2018-10-193-1/+78
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=Flash to ampton, check the LED is working Change-Id: Ib81e1744540f3c4cae9cb5704a3fe0398a1c2281 Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1288649 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Keyboard: switch column and row of scancode tableDaisuke Nojiri2018-10-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch switches column and row of scancode_set2. That is, scancode_set2[ROWS][COLS] = {0x00, 0x01, 0x02, ..., 0x10, 0x11, ..., 0x20, ..., becomes scancode_set2[COLS][ROWS] = {0x00, 0x10, 0x20, ..., 0x01, 0x11, ..., 0x02, ..., This will allow us to extend the table for a keypad without losing too much readability. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:117126568 BRANCH=none TEST=Verify keyboard functionality on Sona. Change-Id: I49a7c0796d5c91989f1d3686c80743fb4bcd5ba7 Reviewed-on: https://chromium-review.googlesource.com/1285291 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Extend SKU from 16 bit to 32 bitDaisuke Nojiri2018-10-192-4/+4
| | | | | | | | | | | | | | | | | | Currently, EC is internally using uint16_t to store SKU_ID. This patch extends it to 32 bit to support additional hardware features. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:112876867,b:117126568 BRANCH=none TEST=Boot Sona Change-Id: Ibd2b7b714222e6fa4bf22604437c8c4d2ba5ee7d Reviewed-on: https://chromium-review.googlesource.com/1289310 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* dragonegg: make PD interrupt use higher priority taskJett Rink2018-10-182-7/+16
| | | | | | | | | | | | | | | | | Start using the higher priority task to handle PD interrupts from C2. Remove higher priority tasks for C0 and C1 since they are handle by chip code in interrupt context method already. BRANCH=none BUG=b:112088135 TEST=dragonegg PD still works Change-Id: I90f2557b73ce6331f012057839e5de22646183c6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1283243 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* rammus: Fix ectool LED controlmichael_chen2018-10-181-3/+3
| | | | | | | | | | | | | | | | | | | | | | | Fix ectool led command fail issue. BUG=b:117631122 BRANCH=ToT TEST=Manual using ectool command to verify. ectool led battery off => Check battery LED is off. ectool led battery amber => Check battery LED is amber. ectool led battery green => Check battery LED is green. ectool led battery auto => Check battery LED is controlled by EC. ectool led power off => Check power LED is off. ectool led power white => Check power LED is white. ectool led power auto => Check power LED is controlled by EC. Change-Id: I9320f7a1880ff3949a90f66416520dfd56cde639 Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/1288177 Commit-Ready: michael chen <michael5_chen@pegatroncorp.com> Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* atlas: set VCCIOVSEL to 0.85vCaveh Jalali2018-10-171-7/+2
| | | | | | | | | | | | | | | | | | initialize VCCIOVSEL to 0.85v when initializing the ROP PMIC. we already do this when resuming from S0ix, but should really also do this on first boot... just call the same function to set things up. BUG=b:75070158 BRANCH=none TEST=boots on atlas, verified register setting from EC console Change-Id: I046775d45361a2d64b412d0115ebd7a742d12b89 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1275429 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* cheza: start using higher priority taskJett Rink2018-10-171-4/+14
| | | | | | | | | | | | | | | The last step to convert cheze over to using a higher priority USB-PD interrupt is to update the interrupt handler BRANCH=none BUG=b:117498337 TEST=verified that HARD RST goes away after Source_Cap Change-Id: Ibb4afec382845e6505425778473c795909a3c9b1 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1283240 Tested-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* kukui/emmc: Remove obsolete code for rev0+reworkNicolas Boichat2018-10-171-34/+0
| | | | | | | | | | | | | | The code that uses LDO was only useful for a few rev0 boards with reworked power supply, let's drop it. BRANCH=none BUG=b:111773571 TEST=N/A Change-Id: I48e3a8995b4d45369f1410585a66808210761e83 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1282526 Reviewed-by: Yilun Lin <yllin@chromium.org>
* kukui/emmc: Wait for SPI FIFO to become empty (instead of 200us sleep)Nicolas Boichat2018-10-171-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | It appears that the SPI FIFO takes about ~160us to become empty (because the eMMC master stops clocking CLK), which is why adding a delay of 200us (instead of 100us) helped get rid of the issue described in: c08473231923 "kukui/emmc: Wait 200us between dma_disable and flush SPI TX FIFO" Instead of a fixed sleep time, just wait for the FIFO to become empty, up to 1 ms (if we have to wait that long, we may hit the bug again, but something else is probably broken). Also, just disable TX DMA in emmc_disable_spi: we can only boot the AP once per EC reboot anyway, so it does not matter if we are able to feed the AP another bootblock. BRANCH=none BUG=b:117253718 TEST=Put kukui in a reboot loop, ~1000 sucessful boots without ever requiring a 4th transfer. Change-Id: I94a4b367264704d141321a54b2f2ec9616429bd9 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1282525 Reviewed-by: Yilun Lin <yllin@chromium.org>
* touchpad_st: embed FTB header in unpacked TP FWWei-Han Chen2018-10-151-1/+1
| | | | | | | | | | | | | | | | | | | To make it easier to decide if full panel initialization is required, we put the original FTB header in the beginning of unpacked TP FW. touchpad_update_write will clear CX data if CX version will be different. CQ-DEPEND=CL:*697971 BRANCH=nocturne BUG=b:117203130 TEST=manual on whiskers Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I60351783b8c015fcb23431811c156bfca8d15b67 Reviewed-on: https://chromium-review.googlesource.com/1267876 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* phaser: add sku 4Jett Rink2018-10-151-1/+1
| | | | | | | | | | | | | | Add new SKU that is also a convertible. BRANCH=none BUG=b:117711323 TEST=builds Change-Id: I89bfdb49b0e23b96e5aacb8b085e9300433c6461 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1280922 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@google.com>
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