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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-051-480/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* adc: Remove adc_chip.h where adc.h is usedCaveh Jalali2021-08-271-1/+0
| | | | | | | | | | | | | | This removes the use of adc_chip.h where adc.h is also used. In this case, adc_chip.h is redundant. BRANCH=none BUG=b:181271666 TEST=buildall passes Change-Id: Id7baf9aef949447a4d47934242f9bae97c971262 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120317 Reviewed-by: Keith Short <keithshort@chromium.org>
* include/flash: rename the APIsTim Lin2021-06-091-2/+2
| | | | | | | | | | | | | | | | The names conflict when enabling both Zephyr's flash driver and CONFIG_FLASH_CROS option. Rename all the APIs in include/flash.h BUG=b:187192628 BRANCH=none TEST=make buildall -j4 Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com> Change-Id: If1fd0ea28fa9f5cec1c1daa8f72f63eb7a0e6500 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2931749 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+2
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-261-23/+23
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* stm32: cleanup flash-f by using constant from register.hGwendal Grignou2017-06-021-1/+1
| | | | | | | | | | | | | | Use constants from registers.h, to easily support other ECs. Fix indentation in registers.h BRANCH=none TEST=compile + following patches tested on STM32F411 BUG=None Change-Id: Iecb3ce759a5c4ff13463e7df1cb7e03fc1ce6f69 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/264030 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* cleanup: Rename geometry constantsShawn Nematbakhsh2015-09-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename and add geometry constants to match spec doc - https://goo.gl/fnzTvr. CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and CONFIG_MAPPED_STORAGE_BASE where appropriate. This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up CL. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297484 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* zinger: enable RO partition write-protectionVincent Palatin2015-01-051-0/+79
| | | | | | | | | | | | | | | | | | | | | Check the flash protection at startup, if the RDP is still at level 0 (no read protection) or if the RO partition is not write protected : - set the write protection on the first 16KB of flash (4 LSB of WRP0) - push the RDP to level 1, so SWD/serial monitor needs to fully erase the part before re-writing the code or the write-protection. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:34935 TEST=dump the content of the option bytes. Change-Id: I11af64365a6fbc34327b2e463eb8e2d369ffacd2 Reviewed-on: https://chromium-review.googlesource.com/238262 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* zinger: maintain a 64-bit time counterVincent Palatin2015-01-031-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Keep track of the high 32-bit of the microsecond time counter to avoid rollback issues. Just activate the timer "update" interrupt (aka UIE) and increment the high word on every update interrupt. Also disable STOP mode when we are going to roll-over during sleep to avoid missing the event. Given that's only happening every hour, we should not waste too much power. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:34159 TEST=patch the code to set the initial TIM2 value to 0xFC000000, wait for 67s, see the counter rolling and the high word incrementing, then verify that Zinger is still functional. Change-Id: I3a2f8fc09104d8ac75c581b2abcbcef99344def7 Reviewed-on: https://chromium-review.googlesource.com/238220 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* pd: Re-factor common flash vdms.Todd Broch2014-12-051-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CL to migrate the flashing VDMs from zinger's custom vdm to common/usb_pd_flash.c such that other updateable type-C devices can share. Additionally adds gaskets to call standard runtime flashing facilities for USB-PD devices using it. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:31192,chrome-os-partner:31193 TEST=manual, Try following: 1. From samus_pd console w/ zinger in port 1 pd 1 flash version pd 1 flash reboot pd 1 flash info 2. From samus linux prompt w/ zinger in port 1 ectool --name cros_pd flashpd 1 1 <zinger RW payload> Reading 16384 bytes from /usr/local/zinger_v1.1.2528-d809e42.ec.RW.bin... Erasing expected RW hash Rebooting Erasing RW flash Writing RW flash Rebooting PD into new RW Complete 3. Repeat 1&2 above on hoho & dingdong. Change-Id: I018055fa9de128f937c57debdc21dea026137bcf Reviewed-on: https://chromium-review.googlesource.com/231835 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
* pd: move get_info to common file.Todd Broch2014-12-051-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | get_info command needs to be used by all type-C accessories that would entertain being updated in the field. This CL migrates function to common/usb_pd_protocol.c for other boards to use. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:31192,chrome-os-partner:31193 TEST=manual, Using ectool --name=cros_pd infopddev <0|1> Port:1 Devid 1.1 Hash: 0x00ec9619 0x811f3e68 0x4b90c8e9 0xd5b98fa8 0xfd373777 Port:1 Devid 3.0 Hash: 0x682fd366 0x7213f55e 0xddefb802 0xbedfec42 0x5cdcc226 Port:0 Devid 4.0 Hash: 0x57b1e4e0 0x7204075f 0x65c0fa72 0xdcca15ed 0xf3231237 Change-Id: Iffa8699056351f62cf90fdecbc7ef5cee81e67bb Reviewed-on: https://chromium-review.googlesource.com/226891 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* pd: zinger: add firmware update alternate mode to zingerstabilize-6480.BAlec Berg2014-11-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a Google Firmware Update alternate mode to zinger. This mode must be entered in order to allow the unstructured VDMs that we use for sending a new firmware. BUG=chrome-os-partner:33754 BRANCH=samus TEST=load on samus and zinger. see that "GFU" is printed on zinger console to represent that it entered GFU mode. use twinkie to see that samus sent discover identity, discover svids, discover modes, enter mode, and then read info. See on samus pd console that we received result of read info. from samus pd console with zinger attached: > pe 1 dump IDENT: [ID Header] 2c0018d1 :: AMA, VID:18d1 [Cert Stat] 00000000 [2] 50100001 [3] 00000003 [4] 52136b91 [5] 0401137d SVID[0]: 18d1 MODES: [1] 00000000 MODE[1]: svid:18d1 caps:00000000 Also, use a samus with cros_pd_update running in kernel, and see that zinger auto-updates when plugged in. Performed 10 updates with no failures. Change-Id: I8d4d38e4a9f649fe0889f688f262630ef55106ee Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/229622 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32f0: fix potential hang in adc initializationAlec Berg2014-10-081-7/+9
| | | | | | | | | | | | | | | | | | | | | | Fix bug that can cause ADC initialization to hang and eventually watchdog. Problem was that you need at least 4 ADC clock cycles between end of ADC calibration and enabling ADC (setting ADEN). Fix is to (1) move some ADC configuration to between end of cal and setting ADEN, and then just to be safe, (2) continually set ADEN until we see ADRDY (ADC ready). See bug report for more information. BUG=chrome-os-partner:32561 BRANCH=samus TEST=load onto a samus that regularly has ADC problems on boot. Using power+refresh verify that without this change PD hangs some of the time, and with this change it never hangs. Change-Id: Ifa4c3240ad7e1612647cc74e2105e6545ed19db4 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/221984 Reviewed-by: Vic Yang <victoryang@chromium.org>
* zinger: add hibernate if disconnected for 60sAlec Berg2014-10-031-0/+27
| | | | | | | | | | | | | | | | | Automatically go into hibernate (standby mode) if not powering anything for 60 seconds. Will wake up when it is plugged into something (senses pull-down on CC line). BUG=chrome-os-partner:28335 BRANCH=samus TEST=load onto zinger. if disconnected for 60s, see hibernate print on zinger console. when connected to a device, verified it boots again. Change-Id: I2564c6192395bb5e4f6d7586c2725f13a4581049 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/220837 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* zinger: check RW firmware signatureVincent Palatin2014-10-021-6/+7
| | | | | | | | | | | | | | | | | | | | | | | The Zinger RW is now signed with 2048-bit RSA key (using SHA-256 as digest). This CL implements the verification mechanism. note: the RSA key used for signing must be provided as a .pem file. The path to .pem file must be provided in the PEM environment variable. By default, it's using the dev key stored in zinger_dev_key.pem. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:28336 TEST=on Zinger, run with properly signed RW firmware and corrupted firmware and check the serial traces. Change-Id: Ia58482458904a3ed72d6b0e95996cae86a0ead83 Reviewed-on: https://chromium-review.googlesource.com/220178 Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* zinger: add low power stop modeAlec Berg2014-09-291-27/+17
| | | | | | | | | | | | | | | | Add low power mode for zinger. This uses stop mode in task_wait_event(), the non-runtime equivalent of the idle task. BUG=chrome-os-partner:28335 BRANCH=samus TEST=load onto zinger and plug and unplug into samus a bunch of times to make sure it negotiates to 20V every time. also send custom vdm's from samus_pd and make sure those always succeed. Change-Id: I626365e7d22e030792d28dbf7eafaeb8f54f8a74 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/219933 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32f0: enable flash prefetch bufferAlec Berg2014-09-251-2/+5
| | | | | | | | | | | | | | | | Enable flash prefetch buffer for stm32f0 chips to make for faster CPU execution. BUG=none BRANCH=none TEST=load onto samus_pd and zinger. let run for a while. connect/disconnect AC a few times. boot samus. Change-Id: I88c0ae67a3205987344552f5b44952f9890c8177 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/219921 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alexandru Stan <amstan@chromium.org>
* stm32f0: fix rare ADC initialization bugAlec Berg2014-09-251-3/+7
| | | | | | | | | | | | | | | | | | | | Fix potential bug in ADC initialization. After setting ADEN bit to enable ADC module, we must wait for ADRDY (ADC ready) bit before continuing. This bug only affects a few chips, and only some of the time. BUG=chrome-os-partner:31978 BRANCH=none TEST=Used a samus board where the PD MCU fails ADC initialization quite often. Without this fix, if you reboot the PD MCU, it will sometimes come up with all ADC's reading 0 and ADEN reading 0. With this fix, it always boots with the ADC's working Change-Id: Iba1d0e56006ba1ad6d9f0eee964a70ef2d0f8dcf Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/219522 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* zinger: add voltage dischargeVincent Palatin2014-08-231-0/+2
| | | | | | | | | | | | | | | | | | | | | When the power supply voltage is transitioning to a lower value, use the discharging FET to ensure that the voltage is acceptable before re-enabling the output. Note: when discharging, we must disable the fast OCP ADC interrupt, but that is ok because we still have the slow OCP check in board_checks(). BRANCH=none BUG=chrome-os-partner:28332 TEST=on Zinger, transition from 20V to 5V using Firefly buttons and observe that we no longer have an over-voltage event. Also, verified that fast OCP triggering still works after a discharge. Change-Id: Ie327645e74819aebd1260f5ce16b2ba46a674a7b Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/201577 Reviewed-by: Todd Broch <tbroch@chromium.org>
* zinger: always disable adc watchdog before reading ADC channelAlec Berg2014-08-221-0/+25
| | | | | | | | | | | | | | | | | | | This fixes a bug where we were reading the CC line ADC without disabling the adc watchdog, which caused misreads. Instead, I changed adc_read_channel so that every ADC read disables and restores the ADC watchdog. BUG=chrome-os-partner:31454 BRANCH=none TEST=tested on EVT zinger. Added debug code to print out CC line voltage after reading it in usb_pd_protocol.c. Before the change the CC voltage is mostly wrong, unless you read the ADC twice back to back and look at the second read value. After this change, the CC voltage ADC reading always matches the real voltage. Change-Id: I9d3aa02b3d22defb9cf6f5a866de2b846a6b8a35 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/213253 Reviewed-by: Todd Broch <tbroch@chromium.org>
* zinger: change behavior of pin PA0 for wakeup functionalityAlec Berg2014-07-291-3/+3
| | | | | | | | | | | | | | | | | Zinger EVT units will have hardware change for PA0 to be able to wake up from standby. Part of the change is that we have to output high on PA0 in order for the comparator to compare against 0.65V, which is inverted from the previous version. BUG=chrome-os-partner:28335 BRANCH=none TEST=reworked a p2 zinger with PA0 changes, plugged into samus, and verified we still charge. Change-Id: I7344f1d1decddc4e6600e41c313e1e7a5a5de067 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209832 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* zinger: fix USART register macro bugAlec Berg2014-07-251-4/+4
| | | | | | | | | | | | | | | Fix bug in which we were using the wrong index to the USART register macros. This bug was recently introduced in: https://chromium-review.googlesource.com/208488 BUG=none BRANCH=none TEST=load code on zinger and verify serial console works Change-Id: I03142a8cafb68e0cbbcba4b720e7ec89fe20110b Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209557 Reviewed-by: Anton Staaf <robotboy@chromium.org>
* zinger: tune over-current protectionVincent Palatin2014-06-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | As per the new spec, use the fast OCP to protect against the short-circuits by putting the threshold at 4.5A. Set the slow OCP (a few dozen milliseconds latency) at 3.6A to limit the accepted current range. Also sample the current/voltage over a larger period (5us) to limit noise issues. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:28331 TEST=plug Zinger on an electronic load and trigger the OCP with various pulses. Change-Id: Ia66cd186716aebf88646cbf5fd340388f8cdd48d Reviewed-on: https://chromium-review.googlesource.com/204590 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* zinger: activate the watchdog.Vincent Palatin2014-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | Ensure we are never stuck somewhere without doing the safety checks by enabling the watchdog and reloading it in the safaty checks function. I have kept the default timing constants, so on STM32F0xx the watchdog period should be between 1.2s (LSI at 30kHz) and 2.0s (LSI at 50kHz). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=add a 2s loop in the serial port interrupt handler and see the power supply rebooting. Change-Id: I000f2a36a31e1166adf63a36c2b7f52999adc928 Reviewed-on: https://chromium-review.googlesource.com/201575 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* zinger: fast over-current protectionVincent Palatin2014-05-171-1/+39
| | | | | | | | | | | | | | | | | | When the supply output is enabled, ensure that we detect quickly any over-current situation by setting an analog watchdog in continuous conversion mode. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:28331 TEST=plug an electronic load to Zinger and see the OCP triggered quickly when we go above the current threshold. Change-Id: I7da50ef242addbd2f4f48f624494daa321ac22b2 Reviewed-on: https://chromium-review.googlesource.com/199924 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* zinger: add support to flash RW firmwareVincent Palatin2014-05-171-5/+145
| | | | | | | | | | | | | | | | | | | | | | | Allow flashing the RW firmware by sending Vendor-Defined Messages over the USB-PD link. This is not the secure update whose design is still under discussion, it's a simple update with integrity check. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:28330 TEST=using the following CLs, ./util/flash_pd.py ./build/zinger/ec.RW.flat and see Zinger booting on RW, repeat the operations with different builds of the RW firmware. Change-Id: Icd90eb92f7321ccd66341a50b9dabd73c59c68c1 Reviewed-on: https://chromium-review.googlesource.com/197948 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* zinger: invert output controlVincent Palatin2014-05-071-3/+3
| | | | | | | | | | | | | | | | | | | | The electrical design has changed : the output enable GPIO (PF0) has switched from being the LM5050 shutdown pin to controlling directly the FET enabling. We need to invert the control logic and use it in push-pull mode rather than open-drain. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:28332 TEST=plug a reworked Zinger to a firefly and check the firefly LED is displaying a solid ON (meaning the voltage is right). Change-Id: Iee79b07f49eade1fee7cac1986bc38ba21e04b25 Reviewed-on: https://chromium-review.googlesource.com/198240 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Zinger board configurationVincent Palatin2014-04-121-0/+180
Add the USB Power delivery PHY configuration, and all the pins and details to use the real Zinger board. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=none Change-Id: Ic2d3616c9fd2bf3ebeccba74a5519697e7c3e899 Reviewed-on: https://chromium-review.googlesource.com/194220 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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