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* Add config for boards that cannot distinguish reset typeDuncan Laurie2018-03-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | We have a growing list of boards in chip/npcx/system.c that are unable to distinguish a reset from a power-on or a reset-pin type. Instead of being a temporary issue this is now solidified in the design on some kabylake boards. Instead of defining board-specific checks in the chip code this change adds a config option that the relevant boards can define. BUG=none BRANCH=none TEST=make -j buildall passes Change-Id: I76e0f011d70ce6f778b1fb6a56c2779c39c3cbd6 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/979575 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/982340 Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
* board: In motion sensor array, remove assignment to 0Gwendal Grignou2018-03-151-51/+0
| | | | | | | | | | | | | | | | | | Assignment to 0 are no necessary. BUG=none TEST=compile, check nami. BRANCH=none Change-Id: I1bc11efcff31cbfe2947580e7b8db0d5ba72d444 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/959502 (cherry picked from commit abde1bca995f018f4c1df8dc24a0a33c18557871) Reviewed-on: https://chromium-review.googlesource.com/963746 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
* npcx: remove optional CONFIG_PECI since no one is using it with npcxJett Rink2018-03-081-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Some boards have forgotten to undef CONFIG_PECI but it is benign. This should be an opt-in feature instead of an opt-out feature. No one is using it, so no one will opt-in. BRANCH=none BUG=none TEST=Verified that grunt, kahlee, meowth, and zoombini are not using the PECI bus for Soc temperature via schematics (GPIO81). Other boards are a no-op. See cl:951407 for steps taken to ensure all npcx boards were accounted for. Change-Id: I6ca4b9d22b7cb23c9842729658810ebe165ff6cc Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/951408 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit f238375e1a7315bc7c713bf2989d19582daa1e95) Reviewed-on: https://chromium-review.googlesource.com/954986 Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
* npcx: Conforming CONFIG_UART_HOST define to match intentionJett Rink2018-03-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_UART_HOST is supposed to be defined to the index of the UART we want to use. It is not supposed to be defined as a boolean. Updated npcx and all incorrect uses. BRANCH=none BUG=none TEST=Added the following diff to ensure that everything still built: diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index 446baa842..826233744 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -897,6 +897,9 @@ static void lpc_init(void) /* Initialize Hardware for UART Host */ #ifdef CONFIG_UART_HOST +#if !CONFIG_UART_HOST +#error "Fix me" +#endif /* Init COMx LPC UART */ /* FMCLK have to using 50MHz */ NPCX_DEVALT(0xB) = 0xFF; Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/949308 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 9ea3cbecb8d3fca58baf4aff8d7e97480fe25860) Change-Id: Ia46c7cb86c6040a5c75dddf23d5ccd8e33210581 Reviewed-on: https://chromium-review.googlesource.com/953790 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
* power: introducing pwr_avg console commandRuben Rodriguez Buchillon2018-01-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | pwr_avg provides an average voltage, current, and power over the last 1 minute. It's up to the battery drivers to implement this functionality. This change allows us to have better power tracking while minimizing the power impact on the EC, because - the pwr_avg command only needs to be called once every minute, and is short, thus less expensive to parse on ECs without a UART buffer - the work done to keep the avg is partially done by the batteries already and it's just a question of retrieving it. undefined on wheatley since no power debugging planned on that board. usage: > pwr_avg mv = 7153 ma = -605 mw = -4327 BUG=chromium:752320 BRANCH=None TEST=make buildall -j Change-Id: Id1a3479d277aedf90dfa965afb4ee9136654b1cf Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/823884 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver/charger/isl923x: Make sure CONFIG_CHARGER_NARROW_VDC is setNicolas Boichat2018-01-101-1/+0
| | | | | | | | | | | | | | | | | | Without this, the battery will discharge if we disallow battery charging (e.g. calling charge_request with either voltage == 0 or current == 0, either by policy, or when the battery is full). Also update config.h to set the option whenever isl923x is used. BRANCH=none BUG=b:66575472 BUG=b:35585464 TEST=make buildall -j Change-Id: Id5515d5ea82a393a3693a3da44cbdc2778296a95 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/856538 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* wheatly: Disable console commands to free up flash spaceJenny TC2017-12-061-0/+2
| | | | | | | | | | | | | | | | | Disable following configs to free up some flash space CONFIG_CMD_I2C_SCAN CONFIG_CONSOLE_HISTORY BRANCH=none BUG=b:63969337 TEST=make buildall -j Change-Id: I3b5db7012825c3785fb72e96f6e08456357335e2 Signed-off-by: Jenny TC <jenny.tc@intel.com> Reviewed-on: https://chromium-review.googlesource.com/806436 Commit-Ready: Jenny Tc <jenny.tc@intel.com> Tested-by: Jenny Tc <jenny.tc@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* buttons: Make buttons[] common.Aseda Aboagye2017-11-172-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Nearly every board had a buttons array defined in which its contents had the standard volume buttons. This commit creates a single common buttons array that can contain the standard volume buttons and recovery buttons. If a board has volume up and down buttons, they can simply define CONFIG_VOLUME_BUTTONS and it will populate the buttons array with the standard definition. The buttons are active low and have a 30 ms debounce period. Similiarly, if a board has a dedicated recovery button, defining CONFIG_DEDICATED_RECOVERY_BUTTON will also populate the buttons array with a recovery button. BUG=chromium:783371 BRANCH=None TEST=make -j buildall. TEST=Flash a device with CONFIG_VOLUME_BUTTONS, verify pressing volume buttons still work. Change-Id: Ie5d63670ca4c6b146ec8ffb64d40ea9ce437b913 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/773794 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: Move *_set_input_current() to common codeShawn Nematbakhsh2017-10-051-22/+0
| | | | | | | | | | | | | | | | | | | Boards that use charge_manager have identical implementations of typec_set_input_current_limit() and pd_set_input_current_limit(), so move these functions to charge_manager. BUG=b:67413505 TEST=`make buildall -j`, also verify that fizz continues to power-on and boot AP, in both protected and unprotected mode, with barrel jack power and with zinger. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I99a5314d02c4696db944c0f8ac689405f4f1f707 Reviewed-on: https://chromium-review.googlesource.com/701412 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* power: Add flags parameter to power_signal_infoFurquan Shaikh2017-10-031-8/+8
| | | | | | | | | | | | | | | | | | | | | | Replace structure member "level" in power_signal_info with "flags". "level" has been used on all boards to indicate active-high or active-low levels. Addition of "flags" allows easy extension of power_signal_info structure to define various flags that might be applicable to power signals (e.g. "level"). Going forward, additional flag will be added in follow-up CLs. Also, provide a helper function power_signal_is_asserted that checks the actual level of a signal and compares it to the flags level to identify if a power signal is asserted. BUG=b:65421825 BRANCH=None TEST=make -j buildall Change-Id: Iacaabd1185b347c17b5159f05520731505b824b8 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/679979 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* usb_mux: Merge PS8743 & PS8740 as PS874XVijay Hiremath2017-08-111-1/+1
| | | | | | | | | | | | | | | | | Merge PS8743 & PS8740 as PS874X as both the drivers are almost same. BUG=b:64598680 BRANCH=glkrvp TEST=make buildall -j On GLKRVP, verify mux setting is correct with Apple dongle (VGA + USB) and Pluggable adapter. Change-Id: Ic6d31979936ee213b07c4c71859809102ee91452 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/612209 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* pd_log: Make PD logging more generic for general purpose loggingShawn Nematbakhsh2017-08-021-1/+0
| | | | | | | | | | | | | | | | | | We can re-use our pd_log FIFO for other purposes, such as TPM logging. Carve out event_log, a generic logging module which pd_log is compatible with. BUG=b:63760920 TEST=On kevin, verify PD logging is still functional and entries are seen in dmesg. BRANCH=None Change-Id: I8e6ad6f93e9eebc676aca64652c60f81da471a94 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/597314 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: Move PI3USB9281 to bc12 directory.Aseda Aboagye2017-07-312-3/+3
| | | | | | | | | | | | | | | | | | | | The primary purpose of the Pericom PI3USB9281 is for BC1.2 detection. Therefore, move the driver to the bc12/ directory. Additonally, rename the config option to match. CONFIG_USB_SWITCH_PI3USB9281 => CONFIG_BC12_DETECT_PI3USB9281 BUG=None BRANCH=None TEST=`make -j buildall` Change-Id: I02f17064c0625e62d6779f895e69899c24898f74 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/594710 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: motion_sense: Remove driver data structure externsShawn Nematbakhsh2017-06-151-2/+2
| | | | | | | | | | | | | | | Driver data structs are now accessed through the drv_data pointer. BUG=chromium:733352 BRANCH=None TEST=`make buildall -j` Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I8fedb425708a08ae6900ade6f17967fe2bc75ebf Reviewed-on: https://chromium-review.googlesource.com/537217 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* pd: ensure tighter timings for IRQ_HPD pulseKevin K Wong2017-05-291-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to ensure we are always meeting the deadlines for the IRQ_HPD pulse, increase the priority of the processing by moving the rising edge from the low-priority HOOK task (in a deferred function) to the caller task (which is the high-priority PD task). The downside is we are now sleeping in the PD task blocking the processing of the PD messages during this time. Changed HPD_DSTREAM_DEBOUNCE_IRQ to 500us instead of 750us. According to DP spec, the IRQ_HPD pulse width is between 500us and 1000us. Ensure there is a minimum of 2ms delay in between each IRQ_HPD as specified by the DP spec, by sleeping before sending the next pulse if needed. (in practice, this should not wait if we are not too off processing the messages) BUG=chromium:711334 BRANCH=glados strago reef oak TEST=manual, on SKL platform with kernel 3.18 and MST, verify display is functional on USB-C dock. Change-Id: Ib2e9dd608c5f1c671cc5a0fd979a5742101375ff Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/508629 Reviewed-by: Todd Broch <tbroch@chromium.org>
* common: sensors: add extra sensor attributesNick Vaccaro2017-05-181-0/+6
| | | | | | | | | | | | | | | | | | | | | | Adds min_frequency and max_frequency to struct motion_sensor_t. New attributes min_frequency and max_frequency are now returned in ectool's MOTIONSENSE_CMD_INFO response. Incremented ectool's MOTIONSENSE_CMD_INFO version to version 3. Add constants for MIN_FREQUENCY and MAX_FREQUENCY to each sensor's header file. BRANCH=none BUG=chromium:615059 TEST=build/boot and verify MOTIONSENSE_CMD_INFO response on kevin, make buildall -j passes. Change-Id: I66db9715c122ef6bb4665ad5d086a9ecc9c7c93a Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/482703 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Allow lid-less configurationDaisuke Nojiri2017-05-091-0/+2
| | | | | | | | | | | | | | | | | | | power_button_x86.c and switch.c assume there is a lid switch. This patch separate them so that a board with power button but with no lid can be configured properly. This patch also moves backlight control to the board directory so that only the boards with a backlight turn it on/off when power state changes. BUG=none BRANCH=none TEST=boot fizz. make buildall. Change-Id: If4070cdc4b1221fae68b35ec3497335d81f192fd Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/489602 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* npcx: gpio: Change second tachometer source from TB2 to TA2.Mulin Chao2017-04-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | In npcx's fan driver, ec selected mode 5 and capturer A as tachometer's input. Choosing TB2 as the second tachometer source is not correct since we didn't initialize the registers for TB2. This patch modified the second tachometer's input from TB2 to TA2 and passed the verification by following changes. 1. Add the second fan settings in pwm_channels, fans, and mft_channels arraies. 2. Modified ALTERNATE marco for pwm-type fans. 3. Set CONFIG_FAN from 1 to 2. 4. Set NPCX_TACH_SEL2 to 1 to test tachometer input 2. (ie.GPIO73/A6) BRANCH=none BUG=none TEST=test dual fans with fanset command on npcx_evb and use faninfo for verifying. Measure the actual rpm by scope. Change-Id: Ia1af2732d9a64e24285d12371223eb0e77e53357 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/472310 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: Move PD_DEFAULT_STATE to a common define in usb_pd.hScott2017-01-261-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Servo_v4 requires the ability to have a different default state per port. In previous devices, the assumption was that each supported port had the same default usb pd state and power role. This CL moves the by the default power role which in turn is derived from CONFIG_USB_PD_DUAL_ROLE. In addiiton to moving the location, it now uses 'port' as argument so it can be port specific if required. PD_DEFAULT_STATE was a board.h specific config, but in practice each instance used to date was set to PD_STATE_SNK_DISCONNECTED if CONFIG_USB_PD_DUAL_ROLE was defined and set to PD_STATE_SRC_DISCONNECTED otherwise. BUG=chrome-os-partner:61878 BRANCH=servo TEST=Manual run 'make -j buildall' to verify that all instances of PD_DEFAULT_STATE were removed. Change-Id: Iaf40718668732f525485ed7942ee7fc246d3f75d Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/431787 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* als: Define CONFIG_ALS when HAS_TASK_ALS is present.Gwendal Grignou2016-12-281-1/+0
| | | | | | | | | | | | | | For oak, set a different list of task (no als, no accel) for compiling revision 4 or less. Fix GPIO include issue. BUG=chrome-os-partner:59423,chrome-os-partner:59084 TEST=compile for oak with board 4 and 5, tested on Reef. BRANCH=kevin,reef Change-Id: I09051a69cbad6d477a7b3bf9907f4c5c144b5136 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/424220 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* driver: Move sensor private struture definition to boards.Gwendal Grignou2016-12-281-1/+1
| | | | | | | | | | | | | | | | sensor private structure for bmi160 and bmp280 were defined in the drivers themselves. It worked because there was only one instance of each sensors on a board. However, this is an error it should be in board files, as it was done for other sensors like the kionix. BUG=none TEST=buildall. BRANCH=kevin,reef Change-Id: Ica3aba358d141a7df9a3e97251d4c1e520cbf2c8 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/424218 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* charge_state_v2: Limit i/p current to meet allowed MAX i/p system powerVijay Hiremath2016-12-051-2/+4
| | | | | | | | | | | | | | | | | | | | | If battery is not present, input current is set to PD_MAX_CURRENT_MA. If the input power set is greater than the maximum allowed system power, system might get damaged. Hence, limit the input current to meet maximum allowed input system power. BUG=chrome-os-partner:58498 BRANCH=none TEST=Manually tested on Reef. Removed the battery & using 'charger' console command observed the following. With Zinger charger at 20V - Input current is set to 2.25A With Type-C & other chargers - Input current is set to 3A Change-Id: Ife8686f322e095aa74b740a7c469bfe87107fb9a Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/397865 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* npcx: flash: Use common code for SPI flash protect reg translationShawn Nematbakhsh2016-12-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | Common code is more flexible and supports more parts, so delete the npcx-only register translation code. BUG=chrome-os-partner:60029 BRANCH=gru TEST=Manual on gru, run 'flashrom -p ec --wp-enable' and check that 0x28 gets written to SR1, which matches our desired 'protect botton 128KB', according to the datasheet. Also run 'flashrom -p ec --erase' then read back EC SPI contents, verify ROM is erased except for first 128KB region. Change-Id: I526401997ff7ec77f2a6047a4a9af74a671ed69a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/413228 Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 43634d36d273887b1f2349c333a7b4b229a83365) Reviewed-on: https://chromium-review.googlesource.com/415498 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org>
* include: Add default state for ESPI and VW_SIGNALSDuncan Laurie2016-10-253-3/+3
| | | | | | | | | | | | | | Add the default undefined state for CONFIG_ESPI and rename CONFIG_VW_SIGNALS to CONFIG_ESPI_VW_SIGNALS. BUG=chrome-os-partner:58666 BRANCH=none TEST=pass presubmit checks Change-Id: I45242d545915c16bb46f751532a01ab937cee5f0 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/400032 Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: Rename charge_temp_sensor_get_val() to charge_get_battery_temp()Vijay Hiremath2016-10-141-1/+1
| | | | | | | | | | | | | | | | | charge_temp_sensor_get_val() is used to get the battery temperature value hence renamed it to charge_get_battery_temp(). BUG=none BRANCH=none TEST=make buildall -j Change-Id: I2b52cac57dcde12a6b7405e7d712240e278954e2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/397962 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* boards: Fix sensors order for devices with BM160 and LPC mode.Gwendal Grignou2016-10-082-64/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the kernel reads sensor data via LPC, it expects the order to be: - ACCEL - ACCEL - GYRO (other sensors data are read through EC commands) BMI160 expects ACCEL, GYRO and MAG to be next to each other. Reorganize motion_sensor array to fit these 2 requirements: If BMI160 in the lid: - BASE_ACCEL - LID_ACCEL - LID_GYRO ... If BMI160 in the base: - LID_ACCEL - BASE_ACCEL - BASE_GRYO ... BUG=none BRANCH=amenia,reef,wheatley TEST=On reef, check the sensor data pull directly by the AP (for chrome for lid angle) is correct. Check ARC++ works are expected. Change-Id: If9477be0de44472e38a057c0b8533cb54acee220 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/394751 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charge_manager: Pass uncapped / max current to current limit callbackShawn Nematbakhsh2016-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | charge_manager may request a charge current limit less than the capability of the supply in certain cases (eg. during PD voltage transition, to make an effort to comply with reduced load spec). Depending on the battery / system state, setting a reduced charge current limit may result in brownout. Pass the uncapped / max negotiated current to board_set_charge_limit() so that boards may use it instead of the requested limit in such circumstances. BUG=chrome-os-partner:56139 BRANCH=gru TEST=Manual on kevin with subsequent commit, boot system with zinger + low-charge battery, verify devices powers up to OS without brownout. Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383732 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* driver: kionix: Remove variant field.Gwendal Grignou2016-09-011-3/+1
| | | | | | | | | | | | | | | Field is not required: sensor->chip already has that information. BRANCH=veyron BUG=none TEST=compile (cherry picked from commit 90fcd6be2b5d2104301efef295113d7816e14042) Reviewed-on: https://chromium-review.googlesource.com/379096 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Change-Id: I6c0bc2e71d7c848968caa78c749dd3fb916f6263 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/379541
* charger: Send host event after charge info is updated.Sam Hurst2016-08-241-3/+0
| | | | | | | | | | | | | | | | When the charger is detached, the host event would sometimes be sent before the charge info was updated, resulting in the host thinking that the charger was still connected. BUG=chrome-os-partner:55584 BRANCH=none TEST=Connected charger to kevin 15 times and verified that the icon was removed in 2-seconds or less. Change-Id: I1a4e4e0f7cc23010210570fc261da8308d8e8070 Reviewed-on: https://chromium-review.googlesource.com/367809 Commit-Ready: Wonjoon Lee <woojoo.lee@samsung.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: DECLARE_CONSOLE_COMMAND only needs 4 argsBill Richardson2016-08-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since pretty much always, we've declared console commands to take a "longhelp" argument with detailed explanations of what the command does. But since almost as long, we've never actually used that argument for anything - we just silently throw it away in the macro. There's only one command (usbchargemode) that even thinks it defines that argument. We're never going to use this, let's just get rid of it. BUG=none BRANCH=none CQ-DEPEND=CL:*279060 CQ-DEPEND=CL:*279158 CQ-DEPEND=CL:*279037 TEST=make buildall; tested on Cr50 hardware Everything builds. Since we never used this arg anyway, there had better not be any difference in the result. Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374163 Reviewed-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* wheatley: Modified board level drivers for eSPI POC on wheatley.Mulin Chao2016-08-123-0/+13
| | | | | | | | | | | | | | | | | | | | | Modified board level drivers for eSPI POC on wheatley. By adding CONFIG_ESPI definition, ec can support espi protocols for host interface on x86 based platform such as skylake and so on. CONFIG_VW_SIGNALS will be used in the future for saving GPIOs during power sequence. Modified sources: 1. wheatley/board.h: Enable/disable espi driver. 2, wheatley/board.c: Add VW signals in power signal list. 3. wheatley/gpio.inc: Save GPIOs if CONFIG_VW_SIGNALS is defined. BRANCH=none BUG=chrome-os-partner:34346 TEST=make BOARD=wheatley; test nuvoton IC specific drivers Change-Id: I0e8a951de6eacd4f8be65ffaac242f38079375d5 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/366520 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Use CONFIG_DPTF flag instead of THROTTLE_AP.Ravi Chandra Sadineni2016-07-302-15/+1
| | | | | | | | | | | | | | | | | Signed-off-by: Ravi Chandra Sadineni <ravisadineni@chromium.org> BRANCH=none BUG=chromium:631848 TEST=make buildall -j CQ-DEPEND=CL:363008 Change-Id: I3c35f5ab2e3a1537ac6e8c750171d5c2b3a6570f Reviewed-on: https://chromium-review.googlesource.com/363583 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* Remove Makefile symlinks under board directoryDaisuke Nojiri2016-07-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This feature is inconsistent. Not all boards have such a symlink (for a obvious reason). This feature is fragile. It's most likely not tested and going to be broken if not already. Developers won't like it if they have to test two different ways to build boards before submitting patches. This feature is not necessary. If you build EC in the standard way (e.g. make BOARD=samus), these symlinks are not needed. This feature is wasteful. Extra disk spaces are used and extra lines are added to Makefile (increasing code complexity slightly). BUG=chromium:626776 BRANCH=none TEST=make buildall Change-Id: Id5444284d773cb0e9225f39abd877441b8f61440 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/359321 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: Decouple temp sensor from thermal throttlingMary Ruthven2016-06-281-0/+1
| | | | | | | | | | | | | | | Not everything with a temperature sensor uses thermal throttling. This change modifies the conditional build to enable building temp sensor source without thermal throttling. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I8c0753f12899e9f203c04477ae520bcda40d5fd8 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/356484 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* BD99955: Added support for 'psys' & 'amonbmon' console commandsVijay Hiremath2016-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | Added console commands for the debugging purpose psys - Can be used to measure the system power amonbmon - Can be used to measure AMON/BMON voltage diff, current BUG=chrome-os-partner:54273 BRANCH=none TEST=Manually tested on Amenia psys - Ran fish task and observed psys value changes. amonbmon - AMON & BMON voltage & current are same as measured across sense resistors. Change-Id: I6653e814d9b00efe7dae9ce1fbd7ddbc2356f8e0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/353043 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: pd: Define VBUS detection sourceShawn Nematbakhsh2016-06-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent: - When operating as a TCPC, it indicated that the VBUS level should be tracked (through GPIO inputs) and sent to the external TCPM when appropriate. - When operating as a TCPM, it indicated that the VBUS level should be obtained by querying the TCPC. These two independent uses have been split into CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which sould be more clear. In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for other means of VBUS detection. BUG=chromium:616580 BRANCH=None TEST=Verify kevin continues to boot + charge. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923 Reviewed-on: https://chromium-review.googlesource.com/348950 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* Driver: BD99955: Enable BC1.2 supportVijay Hiremath2016-05-241-1/+3
| | | | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=Manually tested on Amenia. Connected Zinger, Type-C, DCP & CDP chargers. Device can negotiate to desired current & voltage and the battery can charge. USB2.0 sync device is detected by Kernel. Change-Id: I58cb69289eef9a966e06bef8fe31d35beaec5e27 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/341030 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Deferred: Remove hard coded number of deferredsAnton Staaf2016-04-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Previously the maximum number of deferred routines was specified by the the default maximum number of deferred routines you had to override this, and if you wanted fewer, you still payed the price of having the defer_until array statically allocated to be the maximum size. This change removes that define and instead creates the RAM state of the deferred routine (the time to wait until to call the deferred) when the deferred is declared. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j manually test on discovery-stm32f072 Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc Reviewed-on: https://chromium-review.googlesource.com/335597 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Deferred: Use deferred_data instead of function pointerAnton Staaf2016-04-182-6/+7
| | | | | | | | | | | | | | | | | | | | | Previously calls to hook_call_deferred were passed the function to call, which was then looked up in the .rodata.deferred section with a linear search. This linear search can be replaced with a subtract by passing the pointer to the deferred_data object created when DECLARE_DEFERRED was invoked. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None CQ-DEPEND=CL:*255812 TEST=make buildall -j Change-Id: I951dd1541302875b102dd086154cf05591694440 Reviewed-on: https://chromium-review.googlesource.com/334315 Commit-Ready: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* tcpm: update code to support multiple tcpm driverKevin K Wong2016-04-171-2/+3
| | | | | | | | | | | BUG=chromium:593822 BRANCH=none TEST=make buildall Change-Id: Ic30c1b890da7639aa80a53040ecc5bebfb4be2e8 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/336030 Reviewed-by: Shawn N <shawnn@chromium.org>
* charge_manager: Report UNKNOWN USB charger for 2 seconds after changeShawn Nematbakhsh2016-04-031-1/+1
| | | | | | | | | | | | | | | | | | | After a charger is attached, we may set a charge limit based upon BC1.2 or USB-C Rp before PD negotiation completes. Therefore, allow 2 seconds for all negotiation to complete. Previously this behavior was implicit when using SW charge ramp. BUG=chrome-os-partner:51280 BRANCH=glados TEST=Manual on chell. Insert stock charger, verify that it is detected as TYPE_UNKNOWN until timeout. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I52f02de46fa92b66a9fbaddb94a062310688f028 Reviewed-on: https://chromium-review.googlesource.com/334312 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* sensor: update sensor driver to use I2C port from motion_sensor_tKevin K Wong2016-03-311-0/+3
| | | | | | | | | | | | | this allow motion sensor devices to be locate on different I2C port BUG=none BRANCH=none TEST=make buildall Change-Id: Ia7ba2f5729ebb19561768ec87fdb267e79aafb6a Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/334269 Reviewed-by: Shawn N <shawnn@chromium.org>
* GPIO: Rename and move board_set_gpio_hibernate_stateAnton Staaf2016-03-211-1/+1
| | | | | | | | | | | | | | | | | This function is no longer GPIO specific and fits better as part of the system API, so this moves it there and renames it board_hibernate_late. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I39d3ecedadaaa22142cc82c79f5d25c891f3f38c Reviewed-on: https://chromium-review.googlesource.com/330124 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* npcx: Add CHIP_VARIANT variant for different versions of npcx ec.Mulin Chao2016-03-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support 256 KB ram version of npcx ec, we add CHIP_VARIANT variant to distinguish which verson ec is. In config_chip.h, we use CHIP_VARIANT to specify the size and start address of program memory. Ecst tool also needs a chip parameter to make sure the address range checking of entry pointer won't fail. Modified sources: 1. config_chip.h: Use CHIP_VARIANT to specify the different hardware spec of npcx ec. 2. config_flash_layout.h: Replace constant value with CONFIG_PROGRAM_MEMORY_SIZE for CONFIG_RO_SIZE. 3. build.mk: Add -chip parameter for ecst tool to check entry address. 4. npcx_evb\build.mk: Add CHIP_VARIANT definition (npcx5m5g). 5. npcx_evb_arm\build.mk: Add CHIP_VARIANT definition (npcx5m5g). 6. wheatley\build.mk: Add CHIP_VARIANT definition (npcx5m5g). BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I1b8b9b9d0a59bdc01210f498ac67e4a342743b47 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/330072 Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* NPCX: Convert keyboard pins to use ALTERNATE macroAnton Staaf2016-03-022-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously the keyboard row and column pins could not use the GPIO alternate function mechanism because their DEVALT bits were inverted with respect to all of the others, making it impossible to correctly configure them. With the refactor of the GPIO driver we can now add the keyboard DEVALT entries to the gpio_alt_table, and use the ALTERNATE macro and associated APIs to control the keyboard pin states. The Wheatley RO firmware image is still 320 bytes smaller than before the GPIO refactor. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Ran on Wheatley, manually verified keyboard functionality Change-Id: Id04bc010834b5d95050b03ace6b0e1c5690757bf Reviewed-on: https://chromium-review.googlesource.com/329762 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: Add warning comment to gpio.inc filesBill Richardson2016-02-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | With commit e9883124ff16, a GPIO_INT macro was added. That change also required that all instances of GPIO_INT in a board's gpio.inc file come before any GPIO macros, or the interrupt handler wouldn't work properly. This CL just adds a warning comment about requirement to all gpio.inc files. BUG=chromium:471331 BRANCH=none TEST=make buildall, test image on Cr50 This is a change to comments only. There is no new behavior to verify, although I did run try out one new image just to be sure nothing stupid happened. Change-Id: I83f7819929a53bce3a8bae04d15b3ee3bda11738 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/329334 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* GPIO: Move definitions of GPIO_KB_INPUT and OUTPUTAnton Staaf2016-02-221-3/+0
| | | | | | | | | | | | | | | | | | | | Previously these were often done in board.c files, which made it impossible to include the gpio.inc anywhere else. As part of refactoring the GPIO code we now need to be able to include gpio.inc from common/gpio.c. Moving these defines into gpio.inc makes them available wherever gpio.inc is included. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I28e7b5a1d40b113ae824b18f020b2d1e51e0c08a Reviewed-on: https://chromium-review.googlesource.com/328822 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* wheatley / nuc: Modified the internal ref voltage of ADC to 2.816VMulin Chao2016-02-171-2/+2
| | | | | | | | | | | | | | | | | | | In order to prevent the influence of the deviation of AVCC during ADC conversion, the internal reference voltage (Vref) of ADC is fixed to 2.816V even it derives from AVCC. Modified sources: 1. wheatley/board.c: Modified max adc voltage of ADC to 28.160V. 2. adc_chip.h: Modified internal ref voltage of ADC to 2.816V. BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: Ib514f4bdc114802870eb3c77c650e18c05eb9617 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/327046 Reviewed-by: Shawn N <shawnn@chromium.org>
* nuc: Add support for CONFIG_LOW_POWER_S0.Mulin Chao2016-02-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To get better power consumption in S0, we add FW support for CONFIG_LOW_POWER_S0. Before entering deep idle in S0, we must enable Host interrupt to wake up EC if it needs to service LPC bus. This version also add a new bit of sleep_mask (SLEEP_MASK_FAN) in system.h to prevent EC enter deep idle if fan's duty isn't zero. Normally, the freq of PWM fan is 25 kHz. It means we must select apb2 clock as the source clock of PWM fan. Or fan would stop when ec enters deep idle because of no PWM signal. In hwtimer.c, we reset the preload counter to maximum value in ITEI32's ISR since preload counter is changed by __hw_clock_source_set all the time. We also found there're no event set if it's deadline is over 32 bits but current source clock isn't. To prevent ec doesn't wake-up in deep-idle even if ITIM32 expires, FW set an event for ITIM32 after process_timers(). Modified sources: 1. wheatley/board.h: Add CONFIG_LOW_POWER_S0 definition. 2. clock.c: Enable Host interrupt for LPC. 3. clock.c: Disable LP_WK_CTL for better power consumption. 4. gpio.c: Add ISR for Host interrupt. 5. uart.c: Introduce bit 6 of USTAT to make sure transmitting is completed. 6. register.h: Add uart_clear_pending_wakeup function. 7. hwtimer.c: Fixed watchdog issue when ITIM32 is closed to overflow. 8. fan.c: Enable deep sleep if duty cycle is zero. 9. include/system.h: Add SLEEP_MASK_FAN for fan control loop. 10. core/cortex-m/task.c: Add "isb" to flash the garbage data in the instruction pipeline. BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: Ibe3630d0d68cf3f32206adb2afa1b5958916a2be Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/324651 Reviewed-by: Shawn N <shawnn@chromium.org>
* NPCX: Move control of PD GPIO hibernation state to boardAnton Staaf2016-02-031-1/+9
| | | | | | | | | | | | | | | | | | Use board_set_gpio_hibernate_state to configure the PD GPIO's to support charging while hibernating. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I7b960967670c07f4861a59345bc23c97d3f61cc0 Reviewed-on: https://chromium-review.googlesource.com/325443 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
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