summaryrefslogtreecommitdiff
path: root/board/reef/board.c
Commit message (Collapse)AuthorAgeFilesLines
* tcpm: anx74xx: Improvements to low power mode for S3/G3 chipset stateScott2017-04-111-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before entering standby mode, bit 7 (cable_det) or analog_ctrl_0 is cleared. This allows a new cable detect event to trigger the EC to put the ANX4329 into normal mode. However, in some cases such as when in S3/S5/G3 chipset power states a port will be in sink only mode and therefore won't attach when a sink only adapter is connected to the port. This results in the an indefinite toggle of standby<->normal mode transitions. This constant toggle floods the EC console and more importantly prevents the ANX4329 from remaining in standby mode and the power consumption remains at ~9.5 mW instead of ~1.2 mW when no adapter is connected. This CL adds logic around clearing the cable_det bit so that it's only cleared if both CC lines are open or if an Emark cable is attached. Emark cable is determined from the presence of Ra on one CC line and no Rd on the other CC line. The special consideration for an Emark cable is reqiured because when an Emark cable is connected, the USB PD auto toggle state may require some number of iterations until the attach event is recognized. In order to support handle cases where the drp mode is changed via either the EC console command or host command, added a call to tcpm_set_drp_toggle whenever the drp state is updated. Since the drp mode is updated upon chipset resume events, the chipset resume hook in board.c for anx74xx_cable_det_handler() became redundant and hence it was removed. BUG=b:35775019,b:35586188 BRANCH=reef TEST=Tested the following cases: - Sink, source adapters in chipset S0. Verified that adapters connected as expected. Also, used Emark cable to connect to both USB PD chargers (source) and Pixel phone (sink). - Run 'lidclose' on EC console then connect Type C -> A adatper [3490.370125 TCPC p0 reset!] [3490.389588 TCPC p0 Low Power Mode] It no longer toggles indefintely and after running 'lidopen' verified that port 0 is now in SRC_DISCOVERY. - In S3/G3 connected USB PD charger with regular and Emark typeC cable. Verified that port 0 is in SNK_READY state. - use 'pd dualrole sink' and test with Type C -> A adatper. Verified that tcpc wakes up, but goes into standby mode until entering 'pd dualrole on'. - When sink only adapter is connected in S3/G3, measure power level ~1.2 mW as opposed to ~10 mW in S0. - Repeated similar tests on port 1 (parade tcpc) to verify that adapters connected as expected. Change-Id: Ib8de666f72723934186fee7869f9dda01381c7a8 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/463991 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: S Wang <swang@analogix.corp-partner.google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* tcpm: anx74xx: Take ANX3429 out of suspend state before I2C accessScott2017-04-111-13/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cable_det signal is used to signal to the EC that the tcpc has detected a cable being connected when low power mode is configured. The driver then needs to take the tcpc out of suspend state by setting PWR_EN and RESET_N high. Then bit 7 of analog_ctrl_0 needs to be set properly. The code that is handling this transition was attempting to access the tcpc via I2C before putting the chip in normal mode when transitioning from suspend to normal. In addition there are issues with calling the driver function directly from the hook task (in the delayed ISR handler) and from the USB PD task. This CL changes the delay ISR handler to only set the TCPC_RESET indication so that the call to put the ANX3429 into normal from standby to normal mode only happens in the USB PD task. The TCPC_RESET event is only set if cable_det is high, but reset_n (to the ANX3429) is low which indicates that the ANX3429 is currently in standby mode. BUG=b:35775019 BRANCH=reef TEST=Manual Tested with various adapters in both S0 and S3/G3 chipset states. Verified that adapters connected as expected. When in S3/G3 connecting a sink only adapter still causes an indefinite toggle, but all calls into the driver are executed from within the USB PD 0 task and all ANX3429 I2C accesses work as expected. Change-Id: I6e4843e43f59afbf5ca3251feb68981b815c1c78 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/457103 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* tcpm: Call usb_mux board_init on exit from low power modeDaisuke Nojiri2017-03-161-4/+9
| | | | | | | | | | | | | | | | | PS8751 does not restore all register contents when resuming from low power mode. This change makes tcpm call board_init when it stops auto-toggling so that register contents can be restored. BUG=b:35585399 BRACH=none TEST=On Snappy, the board_init funciton is called every time a device is plugged in and register contents are restored. Change-Id: I50c51334f43c02e3c4d8453e1e966bf6eb3ce769 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/454139 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Electro: DP CTS testing failed in HBR2 deterministic JitterRyan Zhang2017-03-101-0/+4
| | | | | | | | | | | | | | | | | | | | | Uploading CL according EE's requirement. Need to overwrite PS8751 Address: 0x16, offset: 0xD3, Data: 0x98 BUG=b:36044164 BRANCH=firmware-reef-9042.B TEST=`make -j BOARD=reef` Change-Id: I60d5c6724fd047770ddd0af1d204571d59c6e25e Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/451047 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> (cherry picked from commit 1c39223ff9f970be69a62cbf4302fa3aa8f57647) Reviewed-on: https://chromium-review.googlesource.com/452647 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Reef: Fix power-up sequence for Anx3429Daisuke Nojiri2017-02-231-4/+16
| | | | | | | | | | | | | | | Power-up sequence must bring up PWR_NE followed by RESETN according to Figure 5-16 of the datasheet. BUG=chrome-os-partner:63045 BRANCH=none TEST=Test charging, external monitor, usb flash drive in s0/s3/s5. Change-Id: I0e69f0fd0a06f3c828ca59172e0ca045cdc4f5d7 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/445934 Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Reef: Name USB port numbers appropriatelyDaisuke Nojiri2017-02-221-10/+23
| | | | | | | | | | | | | | | Some USB PD port numbers are not named. Some numbers are named using I2C port names. This patch fixes them BUG=none BRANCH=none TEST=make buildall Change-Id: I0c413d2112f8ad5b584d7037519c74cd8cebf54a Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/445866 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
* motion: Add opt3001 as a motion sensorGwendal Grignou2017-02-161-9/+46
| | | | | | | | | | | | | | | | | | Use the motion sensor to manage ALS as well. The current interface (via memmap) is preserved, but we can also access the sensor via cros ec sensor stack and send the ALS information to ARC++. BUG=chrome-os-partner:59423 BRANCH=reef CQ-DEPEND=CL:424217 TEST=Check the sensor is working via ACPI sensor and cros ec sensor. Check ARC++ sees the sensors. Change-Id: Iaf608370454ad582691b72b471ea87b511863a78 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/424323 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* PD: Remove CONFIG_USB_PD_TCPC_FW_VERSIONDaisuke Nojiri2017-02-111-16/+0
| | | | | | | | | | | | | | | This removes CONFIG_USB_PD_TCPC_FW_VERSION. board_print_tcpc_fw_version is removed since it's no longer called. PD chip info is printed in usb_pd_protocol.c. BUG=none BRANCH=none TEST=buildall. Boot Electro, verify chip info is printed. Change-Id: I2ff860c2a1b17ceea124644ba8feb356b9cca2eb Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/434911 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ANX74xx: add TCPC low power mode for different DRP stateKevin K Wong2017-02-111-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added code to put the ANX74xx in low power mode for different DRP state. 1. When nothing attached or system is in S3 or S5 disable the auto toggling and put ANX74xx system in Analog control mode. 2. Using the CABLE_DET interrupt pin (attach event) enable normal power mode. BUG=chrome-os-partner:59841, chrome-os-partner:61640 BRANCH=None TEST=Manually tested on Reef using below dut-control command dut-control pp3300_pd_a_mw -r <n> 1. S0, S3, S5 - Nothing connected, ANX in low power mode. 2. In S0 SNK (display/USB dongle, eMark cable) connected & put system to S3, ANX remains in normal mode. 3. In S0 SNK connected & put system to S5, ANX in low power** mode. 4. In S0 nothing connected, put system to S3 or S5, attach SNK, ANX in low power** mode. 5. Attach SNK at S3/S5 & boot to S0, ANX in normal mode. 6. SRC (AC adapter) with/without eMark cable are detected in S0, S3, S5, and continue to charge the system after S-state transition. low power**: ANX74xx hardware limitation that Ra/Open (Ex: E-Mark cable only) detection will trigger CABLE_DET continuously, therefore ANX74xx will go to normal power mode momentarily and then low power mode in a loop. Change-Id: I30f7fd7a85e31987fb77e2cab2fe140d59dd3629 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/415580 Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Reef-ish: Remove extra newline after board versionDaisuke Nojiri2017-02-101-1/+1
| | | | | | | | | | | | | | This removes the extra newline character after the board version from EC's debug output. BUG=none BRANCH=none TEST=Boot Electro. Change-Id: If6e365a7f175c7e8f2c8db5adbf1780f6715d615 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/441265 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* charge_ramp: Specify port number in board_is_vbus_too_low()Shawn Nematbakhsh2017-02-021-2/+2
| | | | | | | | | | | | | | | | | | | charge_ramp needs to make a decision based upon the VBUS level on one specific port - the port that is ramping. The VBUS level on any other charge ports (if present) is not relevant. BUG=chrome-os-partner:54099 BRANCH=reef, gru TEST=With subsequent patches, verify charge_ramp success with a variety of BC1.2 chargers. Change-Id: Ie0a51a577e2b7491222560cd08dd5321ff3b7975 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/435561 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Disable Trackpad in S5 to save powerVijay Hiremath2017-01-251-0/+6
| | | | | | | | | | | | | BUG=chrome-os-partner:59712 BRANCH=reef TEST=gpioget EN_P3300_TRACKPAD_ODL is 1 in S5 & below, 0 otherwise. Change-Id: Iee55325c20df53aaa7f65c8c3091e343698d70fb Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/433083 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Electro: limit max input current for safetyRyan Zhang2017-01-131-0/+1
| | | | | | | | | | | | | | | | | | | + Max = Max * 95% BUG=chrome-os-partner:61852 BRANCH=reef TEST=Run fish tank + youtube + USB 0.9A * 2 + TypeC 3A * 1 + empty battery, input current from 3.033A become 2.92A Change-Id: I34563a011915c29972835f7d878cad29045d42f0 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/427485 Commit-Ready: Benson Leung <bleung@chromium.org> Tested-by: Benson Leung <bleung@chromium.org> Reviewed-by: Benson Leung <bleung@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* driver: Move sensor private struture definition to boards.Gwendal Grignou2016-12-281-1/+3
| | | | | | | | | | | | | | | | sensor private structure for bmi160 and bmp280 were defined in the drivers themselves. It worked because there was only one instance of each sensors on a board. However, this is an error it should be in board files, as it was done for other sensors like the kionix. BUG=none TEST=buildall. BRANCH=kevin,reef Change-Id: Ica3aba358d141a7df9a3e97251d4c1e520cbf2c8 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/424218 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Electro: Release control of trackpad entirelyDaisuke Nojiri2016-12-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change takes away control of trackpad from EC entirely. This will prevent EC from interfering with the OS's interaction with the trackpad for firmware update, device detection at boot, or entering S3. Disadvantages are the trackpad will stay on (thus can wake up the system unintentionally) when the system enters S3 in laptop mode then transitions to tablet mode, or vice versa: the trackpad will stay off (thus cannot wake up the system) when the system enters S3 in tablet mode then transitions to laptop mode. However, these corner cases can be handled by waking up the system upon mode transition. The OS can then disable or enable the trackpad depending on the transition direction (laptop <-> tablet) and re-enters S3. Or the OS can leave the system running because mode transition implies a user's intention to start interacting with the device. The keyboard will continue to be managed by EC and disabled or enabled upon mode transition. BUG=chrome-os-partner:61058 BRANCH=reef TEST=Put device into S3 in tablet mode. Wake it up. Change-Id: I2f4aa72d704c6562dd861b105225b1995226a09a Reviewed-on: https://chromium-review.googlesource.com/421275 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Electro: Enable accels in S3Daisuke Nojiri2016-12-211-8/+8
| | | | | | | | | | | | | | | | | This patch enables accels in S3. Accels are required to calculate a lid angle. EC enables/disables keyboard based on lid angles. EC needs to be able to control it because the kernel is in sleep state in S3. BUG=chrome-os-partner:58792 BRANCH=reef TEST=lid angles are calculated correctly in S0 and S3. Change-Id: I13c69a47da2c6521cd0c03c66cf061deb3f4fabd Reviewed-on: https://chromium-review.googlesource.com/421276 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* reef: Discharge on AC till charger is detectedVijay Hiremath2016-12-131-0/+8
| | | | | | | | | | | | | | | | | To avoid inrush current from the external charger, enable discharge on AC till the new charger is detected and charge detect delay has passed. BUG=chrome-os-partner:60547 BRANCH=none TEST=Multiple Ramp Resets and inrush current is not observed. Change-Id: Ie3317fa6e6c2e8f00d4ce7cb9c6bee81c50d7bb2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/417168 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef/electro: modify keyboard scan rateDaisuke Nojiri2016-12-131-0/+20
| | | | | | | | | | | | | | | | | (from CL:415672) Slow the keyboard scan rate from 50 us to 80 us. This compensates the additional delay added to the KBO line by Silego / H1. BUG=chrome-os-partner:60335,chrome-os-partner:60615 BRANCH=reef TEST=check press key "f3" then system only output "f3" scan code. Change-Id: Icaa8f040c20f72b1fa1c9260f86b29da8c69ec2b Reviewed-on: https://chromium-review.googlesource.com/419577 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Revert "reef: Add matrix for lid accelerometer."Gwendal Grignou2016-12-051-7/+1
| | | | | | | | | | | | | | | | | The new reef form-factor, Electro, has the lid accelerometer on the reversed side. Undo the matrix setting. BUG=chrome-os-partner:60477 BRANCH=reef TEST=compile, check on reef the value are incorrect. This reverts commit 430dd5e644fb5695848b587cb407d34704bb7ef0. Change-Id: I0a0efc89f0fad6cce3720836caf2c52bdb7e2b8d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/416390 Tested-by: Ryan Zhang <ryan.zhang.quanta@gmail.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* charge_state_v2: Limit i/p current to meet allowed MAX i/p system powerVijay Hiremath2016-12-051-2/+4
| | | | | | | | | | | | | | | | | | | | | If battery is not present, input current is set to PD_MAX_CURRENT_MA. If the input power set is greater than the maximum allowed system power, system might get damaged. Hence, limit the input current to meet maximum allowed input system power. BUG=chrome-os-partner:58498 BRANCH=none TEST=Manually tested on Reef. Removed the battery & using 'charger' console command observed the following. With Zinger charger at 20V - Input current is set to 2.25A With Type-C & other chargers - Input current is set to 3A Change-Id: Ife8686f322e095aa74b740a7c469bfe87107fb9a Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/397865 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: ensure tablet mode state is correct at startupAaron Durbin2016-12-021-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | The tablet mode value is set to 1 on each program start (RO power on reset or any sysjump) in common tablet mode infrastructure. This results in the tablet mode not ever reflecting current reality at the beginning of each program. In addition to not being able to order hook callbacks within a single hook it's the luck of the draw if the tablet mode is set correctly if it was is being set within a hook callback. With a lid accelerometer that doesn't work it results in the input peripherals never being enabled. To fix all this ensure the tablet mode state reflects the current hardware input such that there's no ordering issues in addition to making it reflect reality. BUG=chrome-os-partner:60481 BRANCH=reef TEST=With a machine whose accelerometer is unattached. Keyboard and trackpad continue to work through suspend-resume, EC reboot, etc. Change-Id: I3456a7b578c9752344424721858756a33992a37d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/416348 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Reef: Enable interrupt for BMI160Daisuke Nojiri2016-11-221-0/+3
| | | | | | | | | | | | | | This patch enables an interrupt handler for BMI160. This will improve response time of the motion sense task. BUG=None BRANCH=none TEST=Install and run AIDA64 from Playstore. Wiggle Reef DVT. Verify 'CrosEC Gyroscope' readings change. Change-Id: Ie8dacb51795fa194840817d833cc6356beb01c8f Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/413079
* Reef: Disable keyboard and trackpad in tablet modeDaisuke Nojiri2016-11-221-15/+27
| | | | | | | | | | | | | | | | | | | | | | | | | Enabling/Dislabling keyboard and touchpad is required to prevent EC from waking up the system from S3 in tablet mode. This change disables the keyboard and the trackpad when the lid goes beyond 180 degree. Keyboard and touchpad are also enabled/disabled by the tablet switch. When the lid reaches 360 position, keyboard and touchpad are disabled. And they stay disabled as long as the lid stays at 360 position. This prevents keyboard and touchpad from turning on by the (faulty) lid angle calculation. BUG=chrome-os-partner:58792 BRANCH=none TEST=Keyboard and trackpad are disabled when the lid goes beyond 180 and re-enabled when it's smaller than 180. Keyboard and trackpad are disabled when the lid goes to 360 degree and the system doesn't wake up by a keypress. Change-Id: I48c04bd576f457a899dfdf9b4718d73b59419cbe Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/411395
* reef: add a pull down to KBD_KSO2 during hibernateMary Ruthven2016-11-191-1/+3
| | | | | | | | | | | | | | | Cr50 has an internal pull down. This change changes the PULL_UP on KSO2 to a PULL_DOWN to match Cr50. BUG=chrome-os-partner:60020 BRANCH=none TEST=poweroff the AP, put the EC in hibernate, and verify when cr50 enters deep sleep it consumes around 0.6mW on vddiom. Change-Id: I017094c185f616e018f121ac3ffb0521892aafa1 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/412947 Reviewed-by: Shawn N <shawnn@chromium.org>
* Apollolake: Enter/exit from S0ix based on host commands from kernelArchana Patni2016-11-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the entry/exit model for S0ix from a PCH SLP_S0 signal based model to a hybrid host event/direct interrupt model. The kernel will send host events on kernel freeze/thaw exit; EC will initiate the S0ix entry based on host command and exit via another host command from kernel. The assertion of SLP_S0 comes later than HC(suspend) and deasserion of SLP_S0 comes earlier than HC(resume). ________ ________ SLP_S0 |______________________| _____ ________ HC |___________________________| BRANCH=none BUG=chrome-os-partner:58740 TEST=Build/flash EC and check 'echo freeze > /sys/power/state' command in OS shell. Verify idle state transitions during display off and periodic wakes from S0ix do not lead to state transitions in EC. Change-Id: Ie18c6c2ac8998f59141641567d1d740cd72c2d2e Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Signed-off-by: Subramony Sesha <subramony.sesha@intel.com> Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Signed-off-by: Archana Patni <archana.patni@intel.com> Reviewed-on: https://chromium-review.googlesource.com/401072 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* reef/pyro/eve/snappy: source 3A on one portVincent Palatin2016-11-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add a new source policy to provide 3A if there is only one port used as a source. Also ensure that the load switch on VBUS when sourcing power is properly configured to limit the current to 1.5A or 3.0A depending on the case. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:56110 TEST=manual: connect the laptop to a type-C sink with Twinkie in between, without anything else connected on the laptop, see 3A flowing when measuring with Twinkie ('tw vbus'), plug a dangling C-to-A receptacle dongle on the other port and see 1.5A flowing through Twinkie. Force the input current limit on the sink to 3.0A and see the laptop cutting VBUS. Change-Id: Ic94ba186fc0648e770c8d13be0f96b23e968f855 Reviewed-on: https://chromium-review.googlesource.com/403851 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Add matrix for lid accelerometer.Gwendal Grignou2016-11-161-1/+7
| | | | | | | | | | | | | | | | | No matrix was set, the reported data by the accelerometer was not in the proper referential. BUG=chrome-os-partner:58792 BRANCH=none TEST=with ectool motionsense, check the data matches the standard. Change-Id: I25aa3a1774ba80f1a0f8a41adc976af832436c63 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/411358 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* reef: enable tcpc low power modeKevin K Wong2016-11-111-12/+31
| | | | | | | | | | | BUG=chrome-os-partner:55158,chrome-os-partner:55889,chrome-os-partner:55890 BRANCH=none TEST=on reef use ina (pp3300_pd_a_mw) to check tcpc power consumption Change-Id: I5a2904f4e549b7da22242848bb3b1887331ecadd Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/399882 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* reef/ps8751: Add force wake for PS8751.Kevin K Wong2016-11-111-1/+12
| | | | | | | | | | | | | | | If PS8751 goes into low power mode during sysjump, then tcpm_init will fail since PS8751 is not accessible via I2C, so force it to wake up during hook_init. BUG=chrome-os-partner:59693 BRANCH=none TEST=Verified PS8751 port on reef is functional after sysjump. Change-Id: I2aa5a80b2ea9c17a01e4cba04493f83cb0a39955 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/410132 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* reef: Enable BD9995X power save mode when hibernatedVijay Hiremath2016-10-281-0/+3
| | | | | | | | | | | | | | | | | | | | | Turn off the charger BGATE when the system is hibernated to save maximum power. BUG=chrome-os-partner:59001 BRANCH=none TEST=Manually verified on the Reef. System can boot from hibernate wake sources. Following are the power measurement values at Battery voltage = 8.3V & temperature = 23 deg C. a. Normal operation 540uA, 3.500mW b. BGATE OFF 80uA, 0.592mW Change-Id: Ia30655ccefbf0dded623246150d53b2a815df2de Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/404685 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: clear hpd bit in board level tcpc initli feng2016-10-281-0/+12
| | | | | | | | | | | | | | | | | | | | | PD alternate mode is covered in tcpc interface. So tcpci_tcpm_init() doesn't reset HPD. If keeping HDMI/DP type-C cable connected, doing sysjump sets HPD signal to high while it's already high(this high comes from previous state), then OS doesn't output to HDMI/DP monitor. Reef Type-C port 1 follows TCPCI and has this issue. BUG=chrome-os-partner:57689 BRANCH=none TEST=Connect HDMI/DP type-C dongle, boot up system, OS detects HDMI/DP monitor and extends screen to it; in console doing "sysjump RO" or "sysjump RW", display goes out then comes back. Change-Id: I12239a86490f29d0123fe8bad1b813d3be28d041 Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/398444 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* BD9995X: Disable input to port when sourcingVijay Hiremath2016-10-271-17/+11
| | | | | | | | | | | | | | | | | | POR has both VCC & VBUS enabled. If the port is sourcing VBUS it will also act as sync and AC_OK pin gets enabled. Hence disable the input to the port when sourcing. BUG=chrome-os-partner:59020 BRANCH=none TEST=Manually verified on Reef. Connected HoHo and AC_OK is not enabled. Change-Id: Ic51b81f45759d7dddb2c9744d1c24dbafd1e1293 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/404168 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef/pyro/elm/amenia/snappy: Remove false battery critical messageVijay Hiremath2016-10-251-4/+2
| | | | | | | | | | | | | | | | | | Till the charger task is initialized port is not set for the BD9995X users and a false battery critical message is printed. Removed the false message printed for BD9995X users to avoid confusion. BUG=chrome-os-partner:58972 BRANCH=none TEST=Manually tested on Reef. False battery critical message is not printed on the EC console. Change-Id: Iec8d0f354c4f6dc17efa9da8db38b125e57addab Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/402668 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: Rename charge_temp_sensor_get_val() to charge_get_battery_temp()Vijay Hiremath2016-10-141-1/+1
| | | | | | | | | | | | | | | | | charge_temp_sensor_get_val() is used to get the battery temperature value hence renamed it to charge_get_battery_temp(). BUG=none BRANCH=none TEST=make buildall -j Change-Id: I2b52cac57dcde12a6b7405e7d712240e278954e2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/397962 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* boards: Fix sensors order for devices with BM160 and LPC mode.Gwendal Grignou2016-10-081-41/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the kernel reads sensor data via LPC, it expects the order to be: - ACCEL - ACCEL - GYRO (other sensors data are read through EC commands) BMI160 expects ACCEL, GYRO and MAG to be next to each other. Reorganize motion_sensor array to fit these 2 requirements: If BMI160 in the lid: - BASE_ACCEL - LID_ACCEL - LID_GYRO ... If BMI160 in the base: - LID_ACCEL - BASE_ACCEL - BASE_GRYO ... BUG=none BRANCH=amenia,reef,wheatley TEST=On reef, check the sensor data pull directly by the AP (for chrome for lid angle) is correct. Check ARC++ works are expected. Change-Id: If9477be0de44472e38a057c0b8533cb54acee220 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/394751 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* reef: remove obsolete code for protoKevin K Wong2016-10-081-104/+0
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=booted reef evt Change-Id: I46aa5988a33b349007c3a21048f514b1720aacaf Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/394215 Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* i2c: Add i2ctest console commandVijay Hiremath2016-09-231-0/+63
| | | | | | | | | | | | | | | | | | Added i2ctest console command to test the reliability of the I2C. By reading/writing to the known registers this tests provides the number of successful read and writes. BUG=chrome-os-partner:57487 TEST=Enabled the i2ctest config on Reef and tested the i2c read/writes. BRANCH=none Change-Id: I9e27ff96f2b85422933bc590d112a083990e2dfb Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/290427 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Allow forced/manual hibernation on ACVijay Hiremath2016-09-231-3/+0
| | | | | | | | | | | | | | | | | | Allow hibernation on AC for hibernate console commands and hardware key sequence [ALT + VolumeUp + H]. BUG=chrome-os-partner:57724 BRANCH=none TEST='hibernate' console command & hardware key sequence can successfully hibernate the system on AC. Change-Id: Idfcc37620a712faca4b48a680ec9a7903c26ed88 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/388591 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Fix FAFT failure for firmware_ECUsbPortsDivya Sasidharan2016-09-231-2/+2
| | | | | | | | | | | | | | | | | Modify USB enable GPIO name to comply with FAFT test. It uses this name format USB%d_ENABLE to power on/off all the USB ports. BRANCH=none BUG=none TEST=on Reef FAFT test firmware_ECUsbPorts passes Change-Id: I9b3b5d1668acfca5505dcff6708800f409555040 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/386854 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* BD9995X: Rename common code of BD99955 and BD99956 as BD9995XVijay Hiremath2016-09-211-12/+12
| | | | | | | | | | | | | | | | | | Except the CHIP_ID and charger name code is common between BD99955 and BD99956. Hence renamed the code to BD9995X so that valid output is printed from console commands. BUG=chrome-os-partner:57519 BRANCH=none TEST=Manually tested on Reef. 'charger' console command prints charger name as 'bd99956' Change-Id: I3c995757941bcc5a6a8026dd807d76a7a47c9911 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/387119 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Print tcpc firmware versionDivya Sasidharan2016-09-211-0/+16
| | | | | | | | | | | | | | BUG=chrome-os-partner:56866 BRANCH=master TEST=prints firmware version at boot up;make buildall -j Change-Id: Idb067186924e6706ccfc69a64f2febd61f396074 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/380317 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: More sensor fix.Gwendal Grignou2016-09-161-2/+2
| | | | | | | | | | | | | | | - Fix magnetometer matrix to match BMM150 physical position - Increase HOSTCMD stack size, EC crash when calibrating gyroscope. BUG=none BRANCH=reef TEST=No crash when calibrating from AP (echo 1 > /sys/.../iio:deviceX/calibrate). Change-Id: I2d7b73c295a71649f54ffa61ec8cafa1230c8a7d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/386442 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* reef: Enable sensors for ARC++Gwendal Grignou2016-09-151-7/+13
| | | | | | | | | | | | | | | | | | - Enable MKBP events: Allow EC to send sensor event to the kernel sensor stack. - Disable APCI message display, to avoid overwhelming the console. - Set the rotation matrices to match Android requirement. BUG=b:27849483 CQ-DEPEND=CL:384341 BRANCH=reef TEST=Check we can receive sensor events for ARC++. Check the acceleromter axis are correct. Change-Id: I5fa58e22167f027bd1b84e72f002060d15d882c4 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/385082 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charge_manager: Pass uncapped / max current to current limit callbackShawn Nematbakhsh2016-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | charge_manager may request a charge current limit less than the capability of the supply in certain cases (eg. during PD voltage transition, to make an effort to comply with reduced load spec). Depending on the battery / system state, setting a reduced charge current limit may result in brownout. Pass the uncapped / max negotiated current to board_set_charge_limit() so that boards may use it instead of the requested limit in such circumstances. BUG=chrome-os-partner:56139 BRANCH=gru TEST=Manual on kevin with subsequent commit, boot system with zinger + low-charge battery, verify devices powers up to OS without brownout. Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/383732 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* reef: Prepare LID_OPEN GPIO for hibernationVijay Hiremath2016-09-111-0/+1
| | | | | | | | | | | | | | | | | | | LID_OPEN gpio is interrupt trigger on both the edge. If the system is hibernated when LID is open and then LID is closed, system wakes from hibernation. Hence setting the LID_OPEN GPIO as interrupt raising before hibernation so that system won't wake up upon LID close in hibernation. BUG=chrome-os-partner:57221 BRANCH=none TEST=Issued hibernate when LID is open, closed the LID after hibernation observed system won't boot back till LID is open again. Change-Id: Idc89c3d85b7d246c3e18d0ced48e7d47bebeafec Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/383753 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Update GPIOs for new schematicDavid Hendricks2016-09-091-2/+2
| | | | | | | | | | | | | | | | | | This makes minor changes to GPIOs for the next build: - USB_C0_PD_RST_L is actually push-pull in next build, so remove the comments about USB_C0_PD_RST_ODL. - Added TABLET_MODE - Make the net name for volume up/down buttons match the name in the schematic. BUG=none BRANCH=none TEST=built and booted on Reef EVT Change-Id: I0799de059d71809174e246b6bbd7f3a2fe25686a Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/381791 Reviewed-by: Shawn N <shawnn@chromium.org>
* driver: bmp280: Add rangeGwendal Grignou2016-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | Data from the sensor (in Pa) does not fit in 16 bits. Add set_range/get_range to allow the AP to set the precision. For pressure around ~1000 hPa, we need to right shift by 2 bits. BUG=chrome-os-partner:57117 BRANCH=reef TEST=Check data is not truncated anymore: > accelrange 4 Range for sensor 4: 262144 (Pa ~= 2621 hPa) > accelread 4 Current data 4: 24030 0 0 Last calib. data 4: 24030 0 0 (x4 = 961.2 hPa) Change-Id: I3f7280336e5120d903116612c9c830f4150d2ed7 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/382323 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* reef: Add FIFO supportGwendal Grignou2016-09-091-33/+33
| | | | | | | | | | | | | Add FIFO to allow ARC++ sensors. BUG=b:27849483 BRANCH=reef TEST=Check cros_ec_sensor_ring is loaded. Change-Id: Idca3a324530a29f33face8784dcf260fdafce83f Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/382322 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* reef: Shutdown the AP before hibernatingVijay Hiremath2016-09-021-24/+12
| | | | | | | | | | | | | | | | | To support hibernate called from console commands, ectool commands and key sequence added code to shutdown the AP before hibernating. BUG=chrome-os-partner:56490 BRANCH=none TEST=Using console command, ectool command & key sequence verified both EC and AP are hibernated. Change-Id: I7708377596d7d4175a44c202ae2385a239ca3d01 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/379157 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* driver: kionix: Remove variant field.Gwendal Grignou2016-09-011-3/+1
| | | | | | | | | | | | | | | Field is not required: sensor->chip already has that information. BRANCH=veyron BUG=none TEST=compile (cherry picked from commit 90fcd6be2b5d2104301efef295113d7816e14042) Reviewed-on: https://chromium-review.googlesource.com/379096 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Change-Id: I6c0bc2e71d7c848968caa78c749dd3fb916f6263 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/379541