| Commit message (Collapse) | Author | Age | Files | Lines |
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This feature is inconsistent. Not all boards have such a symlink
(for a obvious reason).
This feature is fragile. It's most likely not tested and going to be
broken if not already. Developers won't like it if they have to test
two different ways to build boards before submitting patches.
This feature is not necessary. If you build EC in the standard way
(e.g. make BOARD=samus), these symlinks are not needed.
This feature is wasteful. Extra disk spaces are used and extra lines
are added to Makefile (increasing code complexity slightly).
BUG=chromium:626776
BRANCH=none
TEST=make buildall
Change-Id: Id5444284d773cb0e9225f39abd877441b8f61440
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359321
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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With commit e9883124ff16, a GPIO_INT macro was added. That change
also required that all instances of GPIO_INT in a board's
gpio.inc file come before any GPIO macros, or the interrupt
handler wouldn't work properly.
This CL just adds a warning comment about requirement to all
gpio.inc files.
BUG=chromium:471331
BRANCH=none
TEST=make buildall, test image on Cr50
This is a change to comments only. There is no new behavior to
verify, although I did run try out one new image just to be sure
nothing stupid happened.
Change-Id: I83f7819929a53bce3a8bae04d15b3ee3bda11738
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329334
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Previously these were often done in board.c files, which made it
impossible to include the gpio.inc anywhere else. As part of
refactoring the GPIO code we now need to be able to include gpio.inc
from common/gpio.c. Moving these defines into gpio.inc makes them
available wherever gpio.inc is included.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I28e7b5a1d40b113ae824b18f020b2d1e51e0c08a
Reviewed-on: https://chromium-review.googlesource.com/328822
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Some chips previously defined CONFIG_I2C and others didn't. Standardize
the usage by removing CONFIG_I2C from all config_chip files and force it
to be defined at the board level. Also, make boards define
CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces
they will use - this will assist with some later cleanup.
BUG=chromium:550206
TEST=`make buildall -j`
BRANCH=None
Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310070
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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(refer to CL:273620) enable the MKBP event feature to send host event
and wire up the PD specific events.
But, CONFIG_MKBP_EVENT conflicts with CONFIG_KEYBOARD_PROTOCOL_MKBP,
due to the GPIO name of EC interrupt pin. Align the GPIO naming of EC
interrupt pin to EC_INT_L.
BRANCH=none
BUG=chrome-os-partner:44643
TEST=On Oak rev3, plug/unplug USB devices and add kernel trace to see
the PD events happening.
Change-Id: I10de9c6611583bb6165bdc1848e542d4b8bba954
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/296012
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
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Now that v3 support is in the cros_ec kernel driver and depthcharge,
deprecate support for the old v2 protocol. At some point in the future,
support for the v2 protocol will dropped entirely.
Boards that require support for the V2 protocol should enable the
following config option.
#define CONFIG_SPI_PROTOCOL_V2
BUG=chrome-os-partner:20533
BRANCH=None
TEST=make -j buildall tests
TEST=Flash jerry, AP & EC boot successful.
TEST=`ectool protoinfo` shows only version 3 supported on jerry.
TEST=Flashrom still works on jerry.
Change-Id: I72d3aee00879314b936cc0b1002c9883550b1f1a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/291411
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Our existing GPIO macros use port# / gpio#, but the concept of different
GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros
for chips which do not have distinct GPIO ports.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b
Signed-off-by: Steven Jian <steven.jian@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/262841
Reviewed-by: Anton Staaf <robotboy@chromium.org>
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In the gpio_info struct, we had a irq_handler pointer defined even
though a majority of the GPIOs did not have irq handlers associated. By
removing the irq_handler pointer out of the struct, we can save some
space with some targets saving more than others. (For example, ~260
bytes for samus_pd).
This change also brings about a new define:
GPIO_INT(name, port, pin, flags, signal)
And the existing GPIO macro has had the signal parameter removed since
they were just NULL.
GPIO(name, port, pin, flags)
In each of the gpio.inc files, all the GPIOs with irq handlers must be
defined at the top of the file. This is because their enum values from
gpio_signal are used as the index to the gpio_irq_handlers table.
BUG=chromium:471331
BRANCH=none
TEST=Flashed ec to samus and samus_pd, verified lightbar tap, lid, power
button, keyboard, charging, all still working.
TEST=Moved a GPIO_INT declaration after a GPIO declaration and watched the build
fail.
TEST=make -j BOARD=peppy tests
TEST=make -j BOARD=auron tests
TEST=make -j BOARD=link tests
Change-Id: Id6e261b0a3cd63223ca92f2e96a80c95e85cdefb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/263973
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Previously if you were working on a single board you had to add BOARD=
to all of your make command lines. Now if you are in a board directory
you can just use "make", or "make clean", or any other top level make
command.
This commit also adds support for a top level "make flash" command that
can be used from the board directories as well. This command uses
openocd and requires that the board provides an openocd-flash.cfg file.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=(from a few board directories) make clean; make -j
(from the discovery-stm32f072 directory) make flash
Change-Id: Ie09a74881371169a2c3cd9cd9922f39f4873f1a6
Reviewed-on: https://chromium-review.googlesource.com/209669
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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This is a straightforward conversion of existing tables
into X-Macro style definitions for the GPIO alternate
functions. This change in itself, is not particularly
powerful, but having all GPIO settings in a single file
makes a board easier to understand.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Followed by manual testing of interrupt on change and UART
functionality on STM32F0 based discovery board.
Change-Id: Ib7f1f014f4bd289d7c0ac3100470ba2dc71ca579
Reviewed-on: https://chromium-review.googlesource.com/207987
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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These files are tabular data more than source code. We discussed
and concluded that the 80-column limit makes them harder to read,
not easier. This commit reformats them to take advantage of
longer lines, mainly by putting per GPIO comments on the end of
the line that defines the GPIO.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Change-Id: I60f3e3620680196eb9462f97b34c453289240465
Reviewed-on: https://chromium-review.googlesource.com/205672
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Previously each board.h and board.c contained an enum and an array
for gpio definitons that had to be manually kept in sync, with no
compiler assistance other than that their lengths matched.
This change adds a single gpio.inc file that declares all gpio's
that a board uses and is used as an X-macro include file to
generate both the gpio_signal enum and the gpio_list array.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Change-Id: If9c9feca968619a59ff9f20701359bcb9374e4da
Reviewed-on: https://chromium-review.googlesource.com/205354
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Refactored the i2c unwedge code to place it in the common directory
so that any EC chip can use it.
Added to the STM32F and LM4 boards, code to automatically detect and
unwedge the i2c bus at the start of an i2c transaction. Note that STM32L
already had this ability.
To enable unwedging of the i2c port though, the gpio pins for SDA and
SCL must be defined in the i2c_ports[] array in the board.c file. This
allows the i2c module to bit bang the unwedging for the given port. If
SDA and SCL are not defined for the port, then the unwedge code will
not run.
BUG=chrome-os-partner:26315, chrome-os-partner:23802
BRANCH=none
TEST=Manual testing on machines with different EC chips.
Testing made extensive use of https://chromium-review.googlesource.com/66389
in order to force wedging of the i2c bus so that we can attempt to unwedge
it. Note that you can easily test if the bus is wedged by running i2cscan.
On pit and spring:
On pit, after each of the following, I verified that the bus was automatically
unwedged.
On spring, the unwedge only runs at reboot, so, for the non-reboot wedge
commands, I manually ran console command unwedge, and verified that the bus
became unwedged.
(1) Bit bang a transaction but only read part of the response.
Command to wedge: i2cwedge 0x90 0 2 2
(2) Bit bang a transaction to do a "write" and stop while the other side is
acking. Command to wedge: i2cwedge 0x90 0 1
(3) Same as (1) but do a reboot instead of returning and see
that the unwedge works at init time w/ no cancelled transactions.
Command to wedge: i2cwedge 0x90 0 6 2
(4) Same as (2) but do a reboot instead of returning and see
that the unwedge works at init time w/ no cancelled transactions.
Command to wedge: i2cwedge 0x90 0 5
On glimmer:
Added code to call i2c_unwedge in accel_init(). Then tested unwedging the
accelerometer with the following. One extra difficulty testing this with
the accelerometer is that sometimes the bit you stop on is high, which
means it won't be wedged at all, the next start transaction will reset
the bus. So, sometimes running i2cwedge won't wedge the bus and sometimes
it will depending on the acceleration data.
(1) Big bang transaction to do a "read" of accelerometer and stop partway:
i2cwedge 0x1c 0x0f 2 2
i2cscan to make sure bus is actually wedged
i2cunwedge
i2cscan to make sure bus is now unwedged.
(2) Bit bang transaction to do a "read" and stop partway, then reboot:
i2cwedge 0x1c 0x0f 6 2.
i2cscan to verify that the bus is working after the reboot.
Change-Id: Ie3328e843ffb40f5001c96626fea131c0f9ad9b1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188422
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Samsung change the temperature range in battery discharing state from (0
<=temp < 100) to (-20 <= temp < 70) from this year. That's why we have to
change the battery_temperature_range structure value as soon as possible
so that our reliability team check the battery.
BUG=chrome-os-partner:25731
TEST=Boot on the pit / pi and then check the battery is working or
not in the oven.
BRANCH=pit
Change-Id: I3289d22176af043e80a881f1626da386e823d857
Signed-off-by: Jaehoon Kim <jh228.kim@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/186040
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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From DV2 board of pit, we'll use 3 color-LED instead of power LED on keyboard.
So, we have to add the function to control 3 color-LED in pmu driver.
BUG=chrome-os-partner:24855
TEST=Tested on the pi and pit board about all power status.
BRANCH=pit
Change-Id: I7b1df39de8fa56eab73779abfa52cf8f72427b44
Signed-off-by: Jaehoon Kim <jh228.kim@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/181588
Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Wonjoon Lee <woojoo.lee@samsung.com>
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From DV2 board of pit, we'll use 3 color-LED instead of power LED on keyboard.
So, we have to remove pwm and power_led task from pit branch.
BUG=chrome-os-partner:24855
TEST=Tested on the pi and pit board about all power status.
BRANCH=pit
Change-Id: I875567d8f7d544cb5b9d6057b94c26d1989b0c67
Signed-off-by: Jaehoon Kim <jh228.kim@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/181607
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
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Vboot hash calculation takes ~350 ms during EC boot. Since the hash
task is higher priority than the hook task, this starves all the hooks
during boot.
We could, in theory, fix that simply by swapping the priority of the
hook and hash tasks. But then watchdog detection (in the hook task)
wouldn't detect hangs in the hash task.
A better fix (implemented here) is to convert the hashing operation to
a series of deferred function calls. This gets rid of the hash task
entirely, and allows all pending hooks and other deferred function
calls to take place between each chunk of hashing.
On STM32-based boards, we need to bump up the hook task stack size,
since hashing is called from several layers deep in the hook task
instead of at the top of its own task, but this is still a net win of
several hundred bytes of SRAM.
BUG=chrome-os-partner:24892
BRANCH=rambi
TEST=Boot EC; look for "hash start" and "hash done" debug output.
'taskinfo' shows at least 32 bytes of unused stack for HOOKS task.
'hash ro' runs properly from EC console.
Change-Id: I9e580dc10fc0bc8e44896d84451218ef67578bbe
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181954
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Rename x86_* to power_signal_* and X86_* to POWER_*.
BUG=chrome-os-partner:24832
BRANCH=link,falco,samus,rambi,peppy,squawks,snow,spring,nyan
TEST=make -j buildall run_tests
Change-Id: Ifaa06391da5a483851ff56eca91fbf6d038dff0a
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181719
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This make minor syntactic changes and renames some camel-cased symbols
to keep checkpatch from complaining. The goal is to reduce the
temptation to use 'repo upload --no-verify'.
This is a big furball of find/replace, but no functional changes.
BUG=chromium:322144
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180495
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This allows boards to detect the battery and return the correct temp
ranges, which will be needed for upcoming boards.
In the board-specific implementations, it's pretty much just moving
the fields from one const struct to another, so the impact is minor.
BUG=chrome-os-partner:24310
BRANCH=none
TEST=build all platforms; verify pit and rambi still charge
Change-Id: I7be075b3abb4039577f6362316adc1860c121d5c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178424
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
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To conform to our mutating naming conventions, let's rename the
chip-specific PWM header file to have the string "_chip" in it.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: I6584be8e54fd24c8638559817e150c707bc0edb5
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174884
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This is tidier than every board defining its own module_id enum, and
encourages standard naming of modules.
A subsequent CL will do more cleanup (standardizing on MODULE_LED
instead of MODULE_POWER_LED and MODULE_LED_KIRBY), but it's easier to
do that as a separate CL than part of this one.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: If0fcef284fb3aa2fa145bc9ff3d1f3f2d25a2e47
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174382
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Originally, the ARM boards printed the keyboard scan matrix whenever
it changed. This generated a lot of output, so we filtered that at
the console channel level. When we refactored the keyboard scan
module, that changed so that the scan matrix was not printed by
default, and the 'ksstate' debug command was used to enable printing
it. But on ARM boards, 'ksstate on' wouldn't do anything without ALSO
using 'chan -1' to turn the keyboard console channel back on. And
without the scan matrix printing by default, there's no reason to keep
the keyboard channel off by default.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards
bang on keyboard on pit and don't see much debug output
ksstate on
now bang on keyboard and see matrix changes
Change-Id: I554b42e7582d507530cdecad7b35df71ca0e634f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174373
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Previously, it was really confusing whether I2C_PORT_HOST meant the
port where the EC was the master, or the port used to talk to the AP.
No functional changes, just a global find/replace and some tidying of
unused comments.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: Ia591ba4577d3399729556e0234ba0db3a0e3c5ea
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174546
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Every chipset had its own header file just to declare a GPIO interrupt
handler. Since this seems to be a common feature of the power
interface, make a standard power_interrupt() API provided by
chipset.h. This lets us get rid of 4 include files, and makes it
easier to add more chipsets in the future.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I1fc5612d42625ea46e0a8e16a83085b66d476664
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173745
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One of our partners was getting confused by the incorrect comments.
Daisy, Snow and Pit use STM32xxxx parts with 128KB flash, but
the comments indicated that they use 64KB parts.
BUG=none
BRANCH=none
TEST=locally compiled
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I13035ca9fb0e4cb05f46df250f6b9079a799dd64
Reviewed-on: https://chromium-review.googlesource.com/172663
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
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If we do this:
enum foo_v {
FOO_A,
FOO_B,
FOO_COUNT
};
struct foo_t foo[] = {
{...},
{...},
};
BUILD_ASSERT(ARRAY_SIZE(foo) == FOO_COUNT);
Then we can be sure we're at least initialized all the elements of foo,
although there's no particular guarantee that the order is correct.
However, if we use this:
struct foo_t foo[] = {
[FOO_A] = {...},
[FOO_B] = {...},
};
and we accidentally get one wrong:
struct foo_t foo[] = {
[FOO_B] = {...},
[FOO_B] = {...},
};
Then the assertion still passes, but we've only initialized one element.
Don't do that.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=manual
Refactoring only. Build everything. It should still work.
Change-Id: I58f659207990f18c6fb74b1cac2ec1163cdb07ea
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172115
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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battery.h is the high-level interface. battery_smart.h is the
low-level interface. Most things don't need the low-level interface,
but were including smart_battery.h solely to get at battery.h. Fixed
this. Also merged battery_pack.h into battery.h, since it was odd to
split that data across multiple header files. Tidied the function
comments in battery.h as well.
No functional changes, just renaming files and adding comments.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I5ef372f0a5f8f5f36e09a3a1ce24008685c1fd0d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171967
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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We only used I2C_PORTS_USED to iterate through the list of hardware ports
actually in use, but we defined it in board.h at the same place where we
matched particular I2C devices to the (possibly shared) buses they're on.
This CL makes I2C_PORTS_USED into a global constant, so it can be set
automatically where we initialize the ports, and doesn't have to be
related to the list of attached devices.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=manual
Build everything, run all tests, should still work.
Change-Id: I65f22f5cadfc4b3afe51af48faa5fb369bc3aa09
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171884
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The kernel driver now correctly handles EC_RES_IN_PROGRESS.
This reverts commit 62e9444161bba05da2dd219214be01084312d2fb.
BRANCH=pit
BUG=chrome-os-partner:22825
TEST=Run flashrom, bang on the keyboard, and issue i2c commands to
TPSCHROME. Observe that I2C_PASSTHRU and MKBP_STATE commands do not
interleave with GET_COMMS_STATUS commands
Change-Id: I8589552f6c7a1506a32b5510fe340dba29702e13
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170844
Reviewed-by: Simon Glass <sjg@chromium.org>
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The charger interrupt is active-low. Snow and Spring properly
triggered on falling (asserting) edge, but Pit (and Daisy/Puppy)
didn't. Fix those boards, and rename the signal to end in _L so we
don't make that mistake again.
BUG=chrome-os-partner:22827
BRANCH=pit
TEST=unplug/replug AC adapter on pit; see debug output as follows:
[batt] state charging -> idle0
Charger IRQ received.
[batt] state idle0 -> charging
Charger IRQ received.
Change-Id: I1f5c9370d1118461dc033955ba77aab2cebb7ece
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170256
Reviewed-by: Jaehoon Kim <jh228.kim@samsung.com>
Tested-by: Jaehoon Kim <jh228.kim@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
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The console task should be higher priority than the host command task,
since that allows debugging problems with host commands.
The keyboard scanning task should be higher priority than both of
them, since it's extremely latency-sensitive. As currently written,
long-running host commands such as I2C passthru can interfere with
keyboard scanning.
BUG=chrome-os-partner:22681
BRANCH=none (potentially affects pit, but apparently not noticeably)
TEST=type bursts of 6-8 characters quickly while doing a flash update
of the EC; should not drop characters.
Change-Id: I48db014053750a5f1fae5d06df34768975bb8297
Reviewed-on: https://chromium-review.googlesource.com/169334
Tested-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
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This timing values act as most similar with 8042 which we used in snow
And some keyscan jig can not regognize current debounce timing, It based
on 8042 timing.
BUG=chrome-os-partner:22019
TEST= build and update ec, reboot and see keyscan is fine
Change-Id: I48f01f2e1247db5fa324b0896301616c42032585
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/168003
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
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ADC module on STM32L is clocked by HSI oscillator, and thus we need to
switch to HSI if using MSI. After the conversion, if the system is not
in S0, clock is switched back to MSI again.
There are several register bits that can only be written when ADC is
powered down. For now, let's just power down the ADC after each
conversion.
Currently ADC watchdog is not working and is disabled on STM32L.
BUG=chrome-os-partner:22242
TEST=Try multiple all-channel and single-channel reads in S0 and S5.
BRANCH=None
Change-Id: I769dda8a9c69ac9de1eb22d6d259034eef8c1ac4
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167454
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This unifies the PWM module interface for LM4 and STM32. Now PWM
channels are defined in board.h/board.c. Instead of calling functions
named pwm_set_fan_duty(x), one can now use pwm_set_duty(PWM_CH_FAN, x),
which prevents additional functions added when we have a new PWM
channel.
BUG=chrome-os-partner:18343
TEST=Limit input current on Spring.
TEST=Check power LED in S0/S3/S5 on Snow.
TEST=Check keyboard backlight functionality on Link.
TEST=Check fan speed control/detecting on Link.
BRANCH=None
Change-Id: Ibac4d79f72e65c94776d503558a7592f7db859dc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/64450
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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With CONFIG_HOST_COMMAND_STATUS, the EC can respond to a command
with EC_RES_IN_PROGRESS, indicating to the AP that it should poll
for completion of the command with EC_CMD_GET_COMMS_STATUS. The
kernel, however, only guarantees the atomicity of single commands.
As a result, i2c passtrough or keyboard commands could be issued
while the AP is polling for completion of a flashrom command. By
disabling CONFIG_HOST_COMMAND_STATUS, we eliminate polling of the
EC status by the AP so that there is no interleaving of commands.
BUG=chrome-os-partner:20978
TEST=flashrom on Pit
BRANCH=pit
Original-Change-Id: I48b29a0dbbcc56fc55f72ca64b8aff51036740e3
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66703
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 2db4fcfb267b938fcc35af2a0d2e374f99551743)
Change-Id: Iac7c15ec337d618cd6d95439d4b922bf3ec43916
Reviewed-on: https://gerrit.chromium.org/gerrit/66828
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
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Rather than have every board check for tasks before declaring their
config macros, have config.h know what configs are invalid without
their corresponding tasks.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms and pass unit tests
Change-Id: Iecf6eb44782e15565eaaf6d69c6288ee8d2e4c4c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65010
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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GPIO alternate functions used to be configured throughout the code,
which made it hard to tell which ones you needed to configure yourself
in board.c. It also sometimes (chip/lm4/i2c.c) led to GPIOs being
configured as alternate functions even if they weren't used on a given
board.
With this change, every board has a table in board.c which lists ALL
GPIOs which have alternate functions. This is now the only place
where alternate functions are configured. Each module then calls
gpio_init_module() to set up its GPIOs.
This also fixes a bug where gpio_set_flags() ignored most of the flags
passed to it (only direction and level were actually used).
On stm32f, gpio_set_alternate() does not exist, and pins are
configured via direct register writes from board.c. Rather than
attempt to change that in the same CL, I've stubbed out
gpio_set_alternate() for stm32f, and will fix the register writes in a
follow-up CL.
BUG=chrome-os-partner:21618
BRANCH=peppy (fixes I2C1 being initialized even though those pins are used
for other things)
TEST=boot link, falco, pit, spring
Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64400
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The power button LED is on PA2, not PB3. Remove a line of code
accidentally left in from copy-paste at the start of pit bringup.
BUG=chrome-os-partner:21676
BRANCH=pit
TEST=boot pit
Change-Id: Id991b16d69bca0a411efa72211c5dc407923240d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64714
Reviewed-by: Vic Yang <victoryang@chromium.org>
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We've been declaring a bunch of statically-sized arrays:
extern struct foo_t foo[FOO_COUNT];
And then initializing them like so:
struct foo_t foo[FOO_COUNT] = {
/* blah */
};
That only catches cases where we initialize with too many entries. It
doesn't catch cases where we haven't initialized enough. This change tests
for both cases like so:
extern struct foo_t foo[];
struct foo_t foo[] = {
/* blah */
};
BUILD_ASSERT(ARRAY_SIZE(foo) == FOO_COUNT);
The affected arrays are:
adc_channels[ADC_CH_COUNT]
gpio_list[GPIO_COUNT]
temp_sensors[TEMP_SENSOR_COUNT]
x86_signal_list[X86_SIGNAL_COUNT]
i2c_ports[I2C_PORTS_USED]
BUG=chrome-os-partner:18343
BRANCH=falco,peppy
TEST=build all platforms
All platforms should still build, all tests should still pass.
Change-Id: Ibb16dc3201f32df7cdc875648e89ba4ffb09f733
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63833
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Before this change, powerinfo host command supports only one target
with USB charging. This change adds a common powerinfo host command
and console command for TPSChrome based targets.
BRANCH=None
BUG=chrome-os-partner:20326
TEST=manual
build and flash pit target, check console command 'powerinfo'.
check ectool powerinfo with and without AC adapter.
Change-Id: I2cfd8dfa011e23f819c6bae19cf22b4a7343f044
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63350
Reviewed-by: Vic Yang <victoryang@chromium.org>
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No functional changes, just renaming config options.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I65b310b670e61bcb3531c581dfc57625df064df2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63248
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No functional changes, just renaming config options.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I91584cb1f8990dd0f980abd32c04465a66243e71
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63244
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This change moves vendor specific temperature ranges to battery pack
files or board setup files. And added a host test case to verify that
does not change x86 smart battery charging state machine behavior.
BUG=chrome-os-partner:21181
BRANCH=None
TEST=manual
build test: util/ecmakeall.sh
hosttests: make hosttests && make runtests
Change-Id: I48e76826b5555f64b78e3c063ce5f02416c72aa2
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62978
Reviewed-by: Vic Yang <victoryang@chromium.org>
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No functional changes, just renaming config options.
Remove README, now that all options described in it have been moved to
config.h, and the remaining information is out of date. (Yes, we
should have a README which describes the organization of the EC
repository, but that's a matter for another CL; this one's about
cleaning up config options.)
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: Iafefbe94369f1217c698f11d358bc0ecac2bdfde
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63145
Reviewed-by: Vic Yang <victoryang@chromium.org>
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All of these were defined on all but a few platforms, and those
explicitly #undef them. So define them as enabled by default in
config.h so the board.h files are cleaner.
No functional changes; just rearranging/renaming config constants.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; FEATURES=test emerge-falco chromeos-ec
Change-Id: I1201a1472ae29641e9e219c2a0347691ca64cd28
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63102
Reviewed-by: Vic Yang <victoryang@chromium.org>
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No functional changes, just documenting and renaming.
All boards which use the PMU must provide pmu_board_init(). This was
already true - except that Daisy's pmu_board_init() was implemented as
part of pmu_init() instead of its code living in board.c; I've moved
the code there now.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I85ad06dc3b6287ad917fe13acf83182f24a8f23d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62906
Reviewed-by: Vic Yang <victoryang@chromium.org>
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No functional changes, just documenting and renaming.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I0b0d3cdce535d90ce437e82e96346fc3ca9be7b0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62673
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Previously, code which needed to work on all STM32F platforms needed
to specify them by name (CHIP_VARIANT_stm32f100 ||
CHIP_VARIANT_stm32f10x), and we needed extra symlinks in the
chip/stm32/ directory to allow the build system to find
family-specific files.
Add a CHIP_FAMILY level of abstraction, so that things which are
common across all STM32F platforms don't need to specify every STM32F
variant. Make the chip build look for family-specific filenames
instead of variant-specific filenames (except for config*.h, which is
actually variant specific).
In the few places where things actually are variant-specific, keep
using the existing CHIP_VARIANT defines.
Code refactoring only; no functional changes.
BUG=chrome-os-partner:20567
BRANCH=none
TEST=build all platforms
Change-Id: I1da831aadabf8b8dd9dfde423cac13c9f43eb953
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/60247
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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