| Commit message (Collapse) | Author | Age | Files | Lines |
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CONFIG_WAKE_ON_VOICE consists 3 features in NPCX:
- DMIC
- I2S_RX
- WOV
These features has broken down into smaller CONFIG options. Deprecates
CONFIG_WAKE_ON_VOICE and prepares to separate smaller features in NPCX.
BRANCH=none
BUG=b:144064048, b:144063867
TEST=make BOARD=trembyle -j
Change-Id: Ieaa123299ea687644f19066cf95ef150a18bf252
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1986687
Commit-Queue: Yu-Hsuan Hsu <yuhsuan@chromium.org>
Tested-by: Yu-Hsuan Hsu <yuhsuan@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Nuvoton NPCX79nxB serie chips include two UART ports.
In this CL, we add the driver support for these two UART modules.
Develoers can select one of the UART ports as EC console by configuring
"CONFIG_CONSOLE_UART" in board.h
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST="#define CONFIG_CONSOLE_UART 0"; build and flash image on npcx7 EVB;
check EC console working via J21.
TEST="#define CONFIG_CONSOLE_UART 1"; build and flash image on npcx7 EVB;
check EC console working via J22. (Note: J16.3-J16.5 and JP6.2-JP6.3
must be connected together.)
TEST=build images of board npcx_evb, poppy, and grunt, make sure EC
console is functional on these boards.
TEST=#define "CONFIG_CONSOLE_UART 0" and "CONFIG_UART_PAD_SWITCH" in
board.h; build and flash image on npcx7_evb. check uart_alt_pad_read_write
function still works by using the console command like:
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/659460/1/board/poppy/board.c
Change-Id: I7de91680e5d4f56c7cae66482c0953d8c324dbe7
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1113269
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This CL adds the driver support for the WoV module which inludes the
following files:
- wov.c
- wov_chip.h
- apm.c
- apm_chip.h
It also supports the console commad "wov" which can test different
configuration and audio quality by entering different parameters.
The detail description of WoV console command is listed below:
------------------------------------------------------------------------
[Note]: Before changing any of settings, please make sure the operation
mode is on the "OFF" state. (ie. run the command wov cfgmod off
first) .
> wov init
Initialize WoV interface, including pin mux and interrupt
registration etc.
> wov mute <enable / disable >
mute enable / disable.
> wov cfgsrc <mono | stereo | left | right>
set audio source, ex: wov cfgsrc left, means audio source from left
MIC.
> wov cfgbis <16|18|20|24>
set audio resolution, ex: wov cfgbit 16 means audio resolution are
16bits.
> wov cfgsfs <8000|12000|16000|24000|32000|48000>
set audio sampling frequency rate, ex: wov cfgsfs 48000 means audio
sampling rate are 48Khz.
> wov cfgbck <32fs|48fs|64fs|128fs|256fs>
set I2S bit clock rate, ex: wov cfgsfs 48000 and wov cfgbck 32fs
means audio sampling rate are 1536Khz (32*48000).
> wov cfgfmt <i2s|right|left|pcma|pcmb|tdm>
set I2S but format, ex: wov cfgfmt right means audio I2S format are
Right-Justify.
> wov cfgmod <off|vad|ram|i2s|rami2s>
set audio operation mode ,ex: wov cfgmod i2s means audio output via
I2S bus.
> wov cfgtdm <0~496 0~496 0~3>
set TDM time slot, the first values is left channel delay counter,
the second is right channel, and the 3rd is startup counting condition.
(chosen LRCK raising or falling edge) .
[Note: this command is just working on cfgmod equal to tdm]
> wov cfgget
retrieve above settings.
> wov vadsens
(currently not support, reserve for next version)
> wov gain (0~31)
set audio data gain value, ex: wov gain 10 means setting audio digital
gain are 10dB.
> wov cfgdck <1.0 | 2.4 | 3.0 >
set digital MIC PDM clock rate. ex: wov cfgdck 2.4 means PDM clock
are 2.4Mhz.
-----------------------------------------------------------------------
This CL also adds the chip ID (0x24) for npcx7m7w. So the console
command "version" can show the chip is npcx7m7w.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST="BOARD=npcx7_evb make"; Flash the image on EVB; Test WoV function
with console commands described above.
Change-Id: Ief2b3e89edbd3e6d2a9d82d317a93c9f0b7a20cd
Signed-off-by: Dror Goldstein <dror.goldstein@nuvoton.com>
Signed-off-by: Simon Liang <CMLiang@nuvoton.com>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/897314
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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Add the evaluation board driver of npcx7 series ec for testing. If you
received the evb which ec is 128-pins package, please notice it has
the following limitations.
a. No GPIOD7/E0 pins.
b. No I2C4_0, I2C4_1, I2C5_1 and I2C6_1 ports.
c. No ADC7, ADC8 and ADC9 channels.
d. No JTAG port 1.
e. Do not enable CONFIG_HIBERNATE_PSL since no PSL circuit on evb.
This CL also includes:
1. Modified reset config from srst to sysresetreq in openocd/npcx.cfg.
Make sure openocd driver can reset ec by using NVIC_SYSRESETREQ.
2. Add flash utilities for npcx7 ec in openocd/npcx_cmds.tcl.
3. Add npcx7_evb support in flash_ec.
BRANCH=none
BUG=none
TEST=Passed all npcx7 drivers verification on the evb no matter which
ec's package is 128 or 144 pins package.
Change-Id: I8224d97cd66ce483d70816f47b2e124308f1b69c
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/505832
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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