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path: root/board/kukui/board.h
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* Remove __7b, __8b and __7bfDenis Brockus2019-08-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767528 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-08-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1767525 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* common: motion_sense: Require CONFIG_MOTION_SENSOR_MAX_COUNTYuval Peress2019-08-021-0/+1
| | | | | | | | | | | | | | | | | | | This changes requires all boards to define the maximum number of sensors they support. This will allow us to later create static arrays with the appropriate length. BUG=chromium:966506 BRANCH=None TEST=make buildall Change-Id: I5a2fa8f0fdcaef69065dfd4c2bfea4e3f371e986 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637414 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719565 Reviewed-by: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* motion: Define macros for custom eventsGwendal Grignou2019-08-021-2/+4
| | | | | | | | | | | | | | | | | | Define macros to define custom events used by sensor interrupt handlers. Remove CONFIG_ for activity events. BUG=none BRANCH=none TEST=compile, sensors work on eve. Change-Id: I08ef6ed2a004466ebc5f7650d6952a150b9de713 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1272189 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719544 Reviewed-by: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* mkbp_event,include/config.h: Clarify MKBP delivery method.Yilun Lin2019-08-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have two MKBP delivery methods: 1. define CONFIG_MKBP_USE_HOST_EVENT to notify via host event 2. undef CONFIG_MKBP_USE_HOST_EVENT to notify via GPIO interrupt It may become more complicated if new notification methods introduced. e.g.: mt_scp uses IPI, rather than host event and GPIO interrupt. This CL does: 1. add CONFIG_MKBP_USE_GPIO to explicilty declare that MKBP event are sent via GPIO interrupt. 2. CONFIG_MKBP_USE_CUSTOM for boards which have custmized methods. 3. Remove weak attribute in mkbp_set_host_active (which can be done with CONFIG_MKBP_USE_CUSTOM now. 4. Removes mkbp_set_host_active function in board Nocturne. It only deliver MKBP events through GPIO interrupt now. BRANCH=None BUG=b:120808999 TEST=grep -rn "CONFIG_MKBP_USE_GPIO\|EC_INT_L" board/ baseboard/ and see the result is reasonable: 1. EC_INT_L must be 1-to-1 mapped to define CONFIG_MKBP_USE_GPIO in every board, except that meep, yorp, ampton which are defined in baseboard octopus. 2. undef CONFIG_MKBP_USE_GPIO in bip and casta, which use host event, but also have baseboard octopus. Change-Id: I4af6110e4fd3c009968075c3623ef2d91cbd770b Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1490794 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719541 Reviewed-by: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* config: Add magnetometer definitionsGwendal Grignou2019-08-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | | Add all possible supported or soon-to-be supported configuration of magnetometer behind accelerometers. Use a more generic variable to indicate the i2c address of the secondary device. BUG=b:110143516,b:115587004 BRANCH=none TEST=compile Change-Id: Ic00c413f2ec5fa0e6bf1c98861daa02f00769a65 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1361989 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719524 Reviewed-by: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* tablet_mode: Fix tablet mode for tablet devicesNicolas Boichat2019-02-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tablet devices would normally only define CONFIG_TABLET_MODE_SWITCH, and not CONFIG_TABLET_MODE, and define a tablet_get_mode function which always returns 1. Since 09a5e0a9398 "dptf: Get rid of CONFIG_DPTF_DEVICE_ORIENTATION", tablet_mode.h, when CONFIG_TABLET_MODE is not set, would define an _inline_ tablet_get_mode function which would always return 0, causing tablets to always be in laptop mode. Fix this by: - Removing the inline in tablet_mode.h. - Add CONFIG_TABLET_MODE to all our tablets (after removing the inline, compilation fails if CONFIG_TABLET_MODE_SWITCH is set, but not CONFIG_TABLET_MODE). - Remove tablet_get_mode from board/*/board.c, as the default mode is tablet, anyway. BRANCH=none BUG=b:120252451 TEST=Boot kukui, onscreen keyboard works TEST=No code size increase: build/kukui/RW/space_free_flash shrank by 36 bytes: (23968 to 23932) build/kukui/RW/space_free_ram shrank by 4 bytes: (10356 to 10352) build/rainier/RW/space_free_flash shrank by 36 bytes: (44296 to 44260) build/rainier/RW/space_free_ram shrank by 4 bytes: (12948 to 12944) build/scarlet/RW/space_free_flash shrank by 36 bytes: (28128 to 28092) build/scarlet/RW/space_free_ram shrank by 4 bytes: (10532 to 10528) Change-Id: Ifea0412bb32f1d701ad2040ad62a5c812705b14a Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1355645 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/1484647 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* kukui: Enable CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLEYilun Lin2018-08-291-0/+1
| | | | | | | | | | | | | | | BRANCH=None BUG=b:112113303 TEST=w/ battery: check state transition behaves correctly when sourcing and sinking. TEST=w/o battery: check sinking behaves correctly when sourcing. Change-Id: I2ae0d1f9266d14f91aa36d6974bf276aeba79b68 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1177466 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* kukui: Switch to rev1 by defaultNicolas Boichat2018-08-291-1/+1
| | | | | | | | | | | BRANCH=none BUG=b:112616655 TEST=Flash P1 Change-Id: I585cc4f60be31ea41df40ca289f7f8824179cf70 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1192662 Reviewed-by: Yilun Lin <yllin@chromium.org>
* kukui: Update GPIO for board rev1.Yilun Lin2018-08-221-0/+7
| | | | | | | | | | | | | | | | | | kukui has many GPIO pin changes in rev1. Getting idea from oak, we use BOARD_REV=n to support building images for different board revisions. BOARD_REV defaults to 0 for now. TEST=make BOARD=kukui -j TEST=make BOARD=kukui -j; modify BOARD_REV=1, make BOARD=kukui -B -j BUG=b:80159522, b:112616655 BRANCH=None Change-Id: I49624d541eb9cc50c5d48abaa8699485b64bac28 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1135880 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* kukui: Disables CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENTYilun Lin2018-08-141-1/+0
| | | | | | | | | | | | | | | | Since mt6370 enables CONFIG_USB_PD_VBUS_MEASURE_CHARGER, flag CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT won't be used. TEST=make BOARD=kukui flash_ec BUG=b:80160408 BRANCH=none Change-Id: I951268b84fb070f8c9b9963c91d064ea4fce08ed Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1170446 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* kukui: Limit the maximum acceptable VBUS to 13.5V.tonycwlin2018-08-071-1/+6
| | | | | | | | | | | | | | | | | The Maximum input voltage is 13.5V, need another 5% tolerance. 12.85V * 1.05 = 13.5V BUG=b:112287986 BRANCH=none TEST=make flash_ec BOARD=kukui -j TEST=plug-in PD charger, check PD negotiation is successful. Change-Id: If764045d05c7d89b3f14f4d4b8e2e633d16dfc6b Signed-off-by: tonycwlin <tonycwlin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1164159 Commit-Ready: Tony Lin <tonycwlin@google.com> Tested-by: Tony Lin <tonycwlin@google.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* kukui: Use MT6370 TCPC.Yilun Lin2018-08-061-3/+4
| | | | | | | | | | | | | | | | | | Turning on CONFIG_USB_PD_DISCHARGE_TCPC. Set PD Max voltage to 12V. BUG=b:80160923 BRANCH=None TEST=make flash_ec BOARD=kukui TEST=plug-in PD charger, check negotiate success, TCPC is sinking 5v/12v. TEST=plug-in peripheral; pd dualrole on; check TCPC is sourcing. Change-Id: Ida0ffb51e2f24b5d311caa31ff7f505b2d3b3867 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1158265 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* board: Fix ADC_VBUS -1 accessing array out-of-boundsWai-Hong Tam2018-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | Some boards still define ADC_VBUS -1. It seems to be an old convention for the case no vbus adc channel, before the change: https://chromium-review.googlesource.com/charge_manager.c It causes reading the adc channel -1 if CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENT not defined. This is an out-of-bounds array access and sometime it causes a "Divide by 0" exception. BRANCH=none BUG=b:112204765 TEST=make buildall -j TEST=Booted cheza and didn't see "Divide by 0" exception. Change-Id: Ic44c3e89023f580d499ed52dc38bef0a3a12a0cf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1162883 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* kukui: Disable CONFIG_[HOST]CMD_RTCNicolas Boichat2018-08-021-2/+0
| | | | | | | | | | | | | | | | | We'll use RTC in PMIC, not the one in EC. Also, in any case, kukui EC does not have external clock source for precise RTC. BRANCH=none BUG=b:80159522 TEST=Boot kukui, check idlestats, see the EC goes into deep sleep. TEST=Check power consumption drops significantly. Change-Id: I088734688dd0190bb06c5fc7b0ec59be562f6043 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1156115 Reviewed-by: Yilun Lin <yllin@chromium.org>
* kukui: Disable CONFIG_STM32_CLOCK_LSENicolas Boichat2018-07-231-1/+0
| | | | | | | | | | | | | We do not have an external clock source on kukui. BRANCH=none BUG=b:80159522 TEST=Boot kukui Change-Id: Id98cc75d4cf0872acc3715ad3b9532161c03fa7f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1146127 Reviewed-by: Yilun Lin <yllin@chromium.org>
* kukui/scarlet: Remove CONFIG_MPUNicolas Boichat2018-07-191-3/+0
| | | | | | | | | | | | | | CONFIG_MPU does not make sense anyway on STM32F0 with Cortex-M0 core. BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6e338cbbf783babd4e2c9dbe0a3188a086b54807 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1143108 Reviewed-by: Yilun Lin <yllin@chromium.org>
* kukui: Disable vsync, motion sensor in RO.Yilun Lin2018-07-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | Kukui's RO flash size (stm32f098VC) is 124KB, and the current EC RO consumes 104616 bytes (102.1KB), besides, the compressed AP FW bootblock takes 25088 bytes (24.5KB). The total size of EC RO and AP FW Bootblock (126.6KB) already exceeds the size limit. Here, we disable vsync and motion sensor in EC RO, and this decrease the EC RO to 92736 byte (90.5KB), saving around 11 KB. TEST=make BOARD=kukui -j BUG=b:80159522 BRANCH=None Change-Id: I7846714c888d95b8dbfd22b475972ecc47c28606 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1141451 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* kukui: emulate eMMC boot mode using SPI controller.Nicolas Boichat2018-07-111-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kukui is not able to boot from SPI-NOR, it can only boot from eMMC or UFS. Here we emulates the eMMC boot using SPI controller. AP tranmits on CMD line, and eMMC replies on DAT0 line. eMMC boot operation looks a lot like SPI: CMD is unidirectional MOSI, DAT is unidirectional MISO. CLK is driven by the master. However, there is no chip-select, and the clock is active for a long time before any command is sent on the CMD line. From SPI perspective, this looks like a lot of '1' are being sent from the master. To catch the commands, we setup DMA to write the data into a circular buffer (in_msg), and monitor for a falling edge on CMD (emmc_cmd_interrupt). Once an interrupt is received, we scan the circular buffer, in reverse, to be as fast as possible and minimize chances of missing the command. We then figure out the bit-wise command alignment, decode it, and, upon receiving BOOT_INITIATION command, setup DMA to respond with the data on the DAT line. The data in bootblock_data.h is preprocessed to include necessary eMMC headers: acknowledge boot mode, start of block, CRC, end of block, etc. The host can only slow down transfer by stopping the clock, which is compatible with SPI. In some cases (e.g. if the BootROM expects data over 8 lanes instead of 1), the BootROM will quickly interrupt the transfer with an IDLE command. In this case we interrupt the transfer, and the BootROM will try again. BRANCH=None BUG=b:110907438 TEST=make BOARD=kukui BOOTBLOCK=abc -j # check build pass Change-Id: I0f1f2d35c525c6475d90fca2cd6e97f87cd747cc Signed-off-by: Yilun Lin <yllin@google.com> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1126579 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* kukui: Initial setup for ec.Yilun Lin2018-06-301-0/+209
Setup initial files and GPIOs for kukui. TEST=make BOARD=kukui -j BUG=b:80159522 b:110243480 BRANCH=none Change-Id: I5c5f1f08d0a0c8e1336a27019ea01b2e0850d3c1 Signed-off-by: Yilun Lin <yllin@google.com> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1041505 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Yilun Lin <yllin@chromium.org>
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